Index: /trunk/modules/vci_cc_vcache_wrapper2_v1/caba/source/src/vci_cc_vcache_wrapper2_v1.cpp
===================================================================
--- /trunk/modules/vci_cc_vcache_wrapper2_v1/caba/source/src/vci_cc_vcache_wrapper2_v1.cpp	(revision 107)
+++ /trunk/modules/vci_cc_vcache_wrapper2_v1/caba/source/src/vci_cc_vcache_wrapper2_v1.cpp	(revision 108)
@@ -700,5 +700,5 @@
 			  (paddr_t)p_vci_tgt.wdata.read() * m_dcache_words * 4; 
 
-            if ( (address & 0x3) == 0x3 ) // broadcast invalidate for data or instruction type
+            if ( (address&0x3) == 0x3 ) // broadcast invalidate for data or instruction type
             {
                 if ( ! p_vci_tgt.eop.read() ) 
@@ -2078,5 +2078,4 @@
     std::cout << name() << " Instruction Response: " << irsp << std::endl;
 #endif
-
     ////////////////////////////////////////////////////////////////////////////////////
     //      INVAL ITLB CHECK FSM 
@@ -4465,18 +4464,19 @@
                 r_dcache_itlb_inval_req = r_dcache_in_itlb[m_dcache_sets*way+set];
                 r_dcache_itlb_inval_line = victim_index;
-                r_dcache_in_itlb[way*m_dcache_sets+set] = false;
 
                 // data tlb invalidate verification
                 r_dcache_dtlb_inval_req = r_dcache_in_dtlb[m_dcache_sets*way+set]; 
                 r_dcache_dtlb_inval_line = victim_index;
-                r_dcache_in_dtlb[way*m_dcache_sets+set] = false;
 
                 r_dcache_cleanup_req = true; 
                 r_dcache_cleanup_line = victim_index;
 		m_cpt_cc_cleanup_data++;
+
 		if ( r_dcache_in_itlb[m_dcache_sets*way+set] || r_dcache_in_dtlb[m_dcache_sets*way+set] )
 		{
 		    r_dcache_fsm = DCACHE_TLB_CC_INVAL;
                     r_dcache_fsm_save = r_dcache_fsm;
+                    r_dcache_in_itlb[way*m_dcache_sets+set] = false;
+                    r_dcache_in_dtlb[way*m_dcache_sets+set] = false;
 		    break;
 		}
@@ -4738,10 +4738,8 @@
                 r_dcache_itlb_inval_req = r_dcache_in_itlb[m_dcache_sets*way+set];
                 r_dcache_itlb_inval_line = victim_index;
-                r_dcache_in_itlb[way*m_dcache_sets+set] = false;
 
                 // data tlb invalidate verification
                 r_dcache_dtlb_inval_req = r_dcache_in_dtlb[m_dcache_sets*way+set]; 
                 r_dcache_dtlb_inval_line = victim_index;
-                r_dcache_in_dtlb[way*m_dcache_sets+set] = false;
 
                 r_dcache_cleanup_req = true; 
@@ -4752,4 +4750,6 @@
 		    r_dcache_fsm = DCACHE_TLB_CC_INVAL;
                     r_dcache_fsm_save = r_dcache_fsm;
+                    r_dcache_in_itlb[way*m_dcache_sets+set] = false;
+                    r_dcache_in_dtlb[way*m_dcache_sets+set] = false;
 		    break;
 		}
@@ -5132,5 +5132,4 @@
     std::cout << name() << " Data Response: " << drsp << std::endl;
 #endif
-
     ////////////////////////////////////////////////////////////////////////////////////
     //      INVAL DTLB CHECK FSM 
@@ -6046,5 +6045,4 @@
 
     } // end switch TGT_FSM
-
 #ifdef SOCLIB_MODULE_DEBUG 
    std::cout << name()