Changeset 116 for trunk/modules/vci_mem_cache_v4/caba/source/include

Timestamp:

Nov 12, 2010, 12:21:16 PM (14 years ago)

Author:

alain

Message:

Introducing a print_trace() method

File:

• trunk/modules/vci_mem_cache_v4/caba/source/include/vci_mem_cache_v4.h (modified) (3 diffs)

trunk/modules/vci_mem_cache_v4/caba/source/include/vci_mem_cache_v4.h

@@ -58 +58 @@
 #include "update_tab_v4.h"
 
-#define TRANSACTION_TAB_LINES 4     // Number of lines in the transaction tab
-#define UPDATE_TAB_LINES 4          // Number of lines in the update tab
-#define BROADCAST_ADDR 0x0000000003 // Address to send the broadcast invalidate
+#define TRANSACTION_TAB_LINES   4               // Number of lines in the transaction tab
+#define UPDATE_TAB_LINES        4               // Number of lines in the update tab
 
 namespace soclib {  namespace caba {
@@ -328 +327 @@
       void print_stats();
 
+      void print_trace();
+
       private:
 
       // Component attributes
-      const size_t              m_initiators;           // Number of initiators
-      const size_t              m_heap_size;            // Size of the heap
-      const size_t              m_ways;                 // Number of ways in a set
-      const size_t              m_sets;                 // Number of cache sets
-      const size_t              m_words;                        // Number of words in a line
-      const size_t              m_srcid_ixr;                // Srcid for requests to XRAM 
-      const size_t              m_srcid_ini;                // Srcid for requests to processors
-      std::list<soclib::common::Segment>  m_seglist;    // memory cached into the cache
-      std::list<soclib::common::Segment>  m_cseglist;   // coherence segment for the cache
+      const size_t                      m_initiators;           // Number of initiators
+      const size_t                      m_heap_size;            // Size of the heap
+      const size_t                      m_ways;                 // Number of ways in a set
+      const size_t                      m_sets;                 // Number of cache sets
+      const size_t                      m_words;                // Number of words in a line
+      const size_t                      m_srcid_ixr;            // Srcid for requests to XRAM 
+      const size_t                      m_srcid_ini;            // Srcid for requests to processors
+      std::list<soclib::common::Segment>  m_seglist;            // memory cached into the cache
+      std::list<soclib::common::Segment>  m_cseglist;           // coherence segment for the cache
       vci_addr_t                        *m_coherence_table;     // address(srcid)
-      TransactionTab                    m_transaction_tab;          // xram transaction table
-      UpdateTab                 m_update_tab;               // pending update & invalidate 
-      CacheDirectory                    m_cache_directory;          // data cache directory
-      HeapDirectory             m_heap_directory;       // heap directory
+      TransactionTab                    m_transaction_tab;      // xram transaction table
+      UpdateTab                         m_update_tab;           // pending update & invalidate 
+      CacheDirectory                    m_cache_directory;      // data cache directory
+      HeapDirectory                     m_heap_directory;       // heap directory
 
       data_t                           ***m_cache_data;         // data array[set][way][word]
@@ -355 +356 @@
 
       // broadcast address
-      vci_addr_t broadcast_addr;
+      vci_addr_t                        m_broadcast_address;
 
       //////////////////////////////////////////////////