Changeset 122

Timestamp:

Dec 23, 2010, 3:31:25 PM (14 years ago)

Author:

choichil

Message:

Synthetic Initiator before being change for multiple requests

Location:

trunk/modules/vci_synthetic_initator/caba/sources

Files:

• include/vci_synthetic_initiator.h (modified) (3 diffs)
• src/vci_synthetic_initiator.cpp (modified) (10 diffs)

trunk/modules/vci_synthetic_initator/caba/sources/include/vci_synthetic_initiator.h

@@ -26 +26 @@
  *
  * Maintainers: christophe.choichillon@lip6.fr
+ */
+ /*
+     TODO : Adding the broadcast latency 
  */
 
@@ -64 +67 @@
         VCI_BC_RECEIVE
       };
-      enum gen_fsm_state_e{
-        A_IDLE,
-        A_DATA
-      };
+//      enum gen_fsm_state_e{
+//        A_IDLE,
+//        A_DATA
+//      };
 
-      uint32_t     m_cpt_cycles;            // Counter of cycles 
+      uint64_t     m_cpt_cycles;            // Counter of cycles 
       
 
@@ -132 +135 @@
       uint64_t                            m_start_latency1;         // Start time of sending packet wanted
       uint64_t                            m_start_latency2;         // Start time of sending packet
-//      float                             m_rhos;                   // Effective Rho during the simulation
+      uint64_t                            m_latency1;               // Average latency wanted
+      uint64_t                            m_latency2;               // Average latency 
       size_t                              m_bc_nrsp;                // Expected number of responses for a broadcast command
       addr_t                              m_address_to_send;        // Address to send the write command
       uint32_t                            m_local_seed;
 
+      uint64_t                            m_start_latency_bc;
+      uint64_t                            m_latency_bc;
+      uint64_t                            m_nb_bc;
+
       // Fifo transmitting date to the VCI FSM
       GenericFifo<uint32_t>    m_date_fifo;
 
+      //sc_signal<int>           r_cmd_fsm;
       sc_signal<int>           r_vci_fsm;
+
+      sc_signal<int>           r_bc_rsp_fsm;
         
       sc_signal<size_t>        r_index;

trunk/modules/vci_synthetic_initator/caba/sources/src/vci_synthetic_initiator.cpp

@@ -32 +32 @@
 
 
-//#define DETERMINISM
+#define DETERMINISTIC
 
 namespace soclib { namespace caba {
@@ -140 +140 @@
   //////////////////////////////////
   {
-        std::cout << m_cpt_cycles << " cycles, " << m_npackets << " packets sent" << std::endl;
+        std::cout << name() << " : "<< std::dec << m_cpt_cycles << " cycles, " << m_npackets << " packets sent" << std::endl;
+        std::cout << ((double)m_latency1/(double)m_npackets) << " | " << ((double)m_latency2/(double)m_npackets) << std::endl;
+        if(m_bc_period)
+          std::cout << ((double)m_latency_bc/(double)m_nb_bc) << std::endl;
   }
 
@@ -150 +153 @@
     if ( ! p_resetn.read() ) {
       // Initializing seed for random numbers generation
-#ifndef DETERMINISM
+#ifndef DETERMINISTIC
       srand(time(NULL));
 #endif
@@ -160 +163 @@
       m_date_fifo.init();
 
+      // Initializing the stats
+      m_latency1 = 0 ;
+      m_latency2 = 0 ;
       // Activity counters
       m_cpt_cycles              = 0;
       m_npackets                = 0;
+      
+      m_start_latency_bc        = 0;
+      m_latency_bc              = 0;
+      m_nb_bc                   = 0;
 
       r_broadcast_req           = false;
@@ -172 +182 @@
     bool    date_fifo_get = false;
 
-//   if (m_cpt_cycles == 0) {
-//           m_rhos = 0.0 ;
-//   } else {
-//           m_rhos = static_cast<float>(m_npackets * m_length) / static_cast<float>(m_cpt_cycles) ;
-//   }
-    
 
 
@@ -193 +197 @@
             } else {
               r_vci_fsm = VCI_SINGLE_SEND ;
-#ifdef DETERMINISM
+#ifdef DETERMINISTIC
               m_address_to_send = destAdress(&m_local_seed) << (vci_param::N)-(soclib::common::uint32_log2((uint32_t)m_xmesh)+soclib::common::uint32_log2((uint32_t)m_ymesh));
 #else
@@ -222 +226 @@
         {
           if (p_vci.rspval.read()) {
-            m_start_latency1 = m_date_fifo.read();
-            m_start_latency2 = m_cpt_cycles;
+            m_latency1 = m_latency1 + (m_cpt_cycles - m_start_latency1);
+            m_latency2 = m_latency2 + (m_cpt_cycles - m_start_latency2);
             m_npackets++;
             date_fifo_get = true;
@@ -236 +240 @@
           if (p_vci.cmdack.read()) {
             m_bc_nrsp = (m_xmax - m_xmin) * (m_ymax - m_ymin) ;
+            m_start_latency_bc = m_cpt_cycles;
             r_vci_fsm = VCI_BC_RECEIVE;
             break;
@@ -247 +252 @@
               r_broadcast_req = false;
               m_address_to_send = 0;
+              date_fifo_get = true;
+              m_latency_bc = m_latency_bc + (m_cpt_cycles - m_start_latency_bc);
+              m_nb_bc++;
               r_vci_fsm = VCI_IDLE ;
             } else {
@@ -259 +267 @@
 
     /////////////////// Filling fifo
-    if( ( (uint64_t)(m_rho*m_cpt_cycles) >= (uint64_t)(m_length*m_npackets*1000)) ){
+    if( ( (uint64_t)(m_rho*m_cpt_cycles) > (uint64_t)(m_length*m_npackets*1000)) ){
       if (m_date_fifo.wok()){
         date_fifo_put = true ;