Changeset 137 for trunk/platforms
- Timestamp:
- Feb 16, 2011, 1:42:13 PM (14 years ago)
- Location:
- trunk/platforms
- Files:
-
- 4 deleted
- 18 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/platforms/caba-new_vdspin-test/Makefile
r87 r137 1 1 ARCH=mips32el 2 2 SIMULATION_ARGS=100000 3 #SOCLIB_CC_ADD_ARGS=-t systemcass3 SOCLIB_CC_ADD_ARGS=-t systemcass 4 4 SOCLIB?=$(shell soclib-cc --getpath) 5 5 export SOCLIB -
trunk/platforms/caba-ring-ccxcachev1_memcachev1-mipsel/Makefile
r3 r137 1 1 ARCH=mips32el 2 2 SIMULATION_ARGS=100000 3 SOCLIB_CC_ADD_ARGS=-I. -t systemcass 3 4 SOCLIB?=$(shell soclib-cc --getpath) 4 5 export SOCLIB -
trunk/platforms/caba-ring-ccxcachev1_memcachev1-mipsel/platform_desc
r85 r137 9 9 Uses('caba:vci_logger'), 10 10 Uses('caba:vci_multi_tty'), 11 Uses('caba:vci_vgmn'), 11 Uses('caba:vci_simple_ring_fast', 12 ring_cmd_data_size = 40, 13 ring_rsp_data_size = 33), 12 14 Uses('caba:vci_mem_cache_v1'), 13 15 Uses('common:elf_file_loader'), … … 20 22 rflag_size = 1, 21 23 srcid_size = 8, 22 pktid_size = 6,23 trdid_size = 6,24 pktid_size = 4, 25 trdid_size = 4, 24 26 wrplen_size = 1 25 27 ) -
trunk/platforms/caba-ring-ccxcachev1_memcachev1-mipsel/segmentation.h
r85 r137 19 19 // base address required by MIPS processor 20 20 ///////////////////////////////////////////////////////////////// 21 #define MMU21 //#define MMU 22 22 23 23 #define RESET_BASE 0xBFC00000 24 #define RESET_SIZE 0x0000 004024 #define RESET_SIZE 0x00001000 25 25 26 26 #define EXCEP_BASE 0x80000000 27 #define EXCEP_SIZE 0x0000 02e027 #define EXCEP_SIZE 0x00001000 28 28 29 29 #define TEXT_BASE 0x00400000 30 #define TEXT_SIZE 0x00 0011c830 #define TEXT_SIZE 0x00100000 31 31 ///////////////////////////////////////////////////////////////// 32 32 // global data segment (initialised) … … 34 34 35 35 #define MC_M_BASE 0x10000000 36 #define MC_M_SIZE 0x00 00eb2036 #define MC_M_SIZE 0x00100000 37 37 38 /////////////////////////////////////////////////////////////////39 // page table (initialised)40 /////////////////////////////////////////////////////////////////41 #define PTD_ADDR 0x4040000042 #define PTE_ADDR 0x4040200043 #define IPTE_ADDR 0x4040300044 #define TAB_SIZE 0x0001000045 46 #define V_TTY_BASE 0x0080000047 #define V_TIMER_BASE 0x00C00000 // timer virtual address48 38 ////////////////////////////////////////////////////////// 49 39 // System devices -
trunk/platforms/caba-ring-ccxcachev1_memcachev1-mipsel/top.cpp
r85 r137 11 11 #include "vci_simple_ram.h" 12 12 #include "vci_multi_tty.h" 13 #include "vci_ vgmn.h"13 #include "vci_simple_ring_fast.h" 14 14 #include "vci_mem_cache_v1.h" 15 15 #include "vci_cc_xcache_wrapper_v1.h" … … 30 30 31 31 // Define VCI parameters 32 typedef soclib::caba::VciParams<4,8,32,1,1,1,8, 6,6,1> vci_param;32 typedef soclib::caba::VciParams<4,8,32,1,1,1,8,4,4,1> vci_param; 33 33 typedef soclib::common::Iss2Simhelper<soclib::common::Mips32ElIss> proc_iss; 34 34 // Mapping table … … 36 36 soclib::common::MappingTable maptabp(32, IntTab(8), IntTab(8), 0x00300000); 37 37 38 maptabp.add(Segment("reset", RESET_BASE, RESET_SIZE, IntTab( 2), true));39 maptabp.add(Segment("excep", EXCEP_BASE, EXCEP_SIZE, IntTab( 2), true));40 maptabp.add(Segment("text" , TEXT_BASE , TEXT_SIZE , IntTab( 2), true));38 maptabp.add(Segment("reset", RESET_BASE, RESET_SIZE, IntTab(0), true)); 39 maptabp.add(Segment("excep", EXCEP_BASE, EXCEP_SIZE, IntTab(0), true)); 40 maptabp.add(Segment("text" , TEXT_BASE , TEXT_SIZE , IntTab(0), true)); 41 41 maptabp.add(Segment("tty" , TTY_BASE , TTY_SIZE , IntTab(1), false)); 42 maptabp.add(Segment("mc_m" , MC_M_BASE , MC_M_SIZE , IntTab( 2), true ));42 maptabp.add(Segment("mc_m" , MC_M_BASE , MC_M_SIZE , IntTab(0), true )); 43 43 44 44 std::cout << maptabp << std::endl; … … 114 114 soclib::caba::VciSignals<vci_param> signal_vci_tgt_tty("vci_tgt_tty"); 115 115 116 soclib::caba::VciSignals<vci_param> signal_vci_tgt_rom("vci_tgt_rom");117 118 116 soclib::caba::VciSignals<vci_param> signal_vci_tgt_xram("vci_tgt_xram"); 119 117 … … 134 132 // Components 135 133 soclib::caba::VciCcXCacheWrapperV1<vci_param, proc_iss > 136 proc0("proc0", 0, maptabp, maptabc, IntTab(0),IntTab(0),IntTab(0),4, 64,16,4,64,16);134 proc0("proc0", 0, maptabp, maptabc, IntTab(0),IntTab(0),IntTab(0),4,4,16,4,4,16); 137 135 138 136 soclib::caba::VciCcXCacheWrapperV1<vci_param, proc_iss > 139 proc1("proc1", 1, maptabp, maptabc, IntTab(1),IntTab(1),IntTab(1),4, 64,16,4,64,16);137 proc1("proc1", 1, maptabp, maptabc, IntTab(1),IntTab(1),IntTab(1),4,4,16,4,4,16); 140 138 141 139 soclib::caba::VciCcXCacheWrapperV1<vci_param, proc_iss > 142 proc2("proc2", 2, maptabp, maptabc, IntTab(2),IntTab(2),IntTab(2),4, 64,16,4,64,16);140 proc2("proc2", 2, maptabp, maptabc, IntTab(2),IntTab(2),IntTab(2),4,4,16,4,4,16); 143 141 144 142 soclib::caba::VciCcXCacheWrapperV1<vci_param, proc_iss > 145 proc3("proc3", 3, maptabp, maptabc, IntTab(3),IntTab(3),IntTab(3),4,64,16,4,64,16); 146 147 soclib::caba::VciSimpleRam<vci_param> 148 rom("rom", IntTab(0), maptabp, loader); 143 proc3("proc3", 3, maptabp, maptabc, IntTab(3),IntTab(3),IntTab(3),4,4,16,4,4,16); 149 144 150 145 soclib::caba::VciSimpleRam<vci_param> … … 152 147 153 148 soclib::caba::VciMemCacheV1<vci_param> 154 memc("memc",maptabp,maptabc,maptabx,IntTab(0),IntTab(4),IntTab( 2), IntTab(4),4,16,16);149 memc("memc",maptabp,maptabc,maptabx,IntTab(0),IntTab(4),IntTab(0), IntTab(4),16,16,16); 155 150 156 151 soclib::caba::VciMultiTty<vci_param> … … 163 158 // soclib::caba::VciLogger<vci_param> vci_logger_memc("vci_logger_memc",maptabp); 164 159 165 // soclib::caba::VciSimpleRingNetwork<vci_param>166 // ringd("ringd",maptabp, IntTab(), 2, 4, 3);167 soclib::caba::VciVgmn<vci_param>168 ringd("ringd",maptabp, 4, 3, 2, 2);169 170 // soclib::caba::VciSimpleRingNetwork<vci_param>171 //ringc("ringc",maptabc, IntTab(), 2, 5, 5);172 soclib::caba::VciVgmn<vci_param>173 ringc("ringc",maptabc, 5, 5, 2, 2);174 175 // soclib::caba::VciSimpleRingNetwork<vci_param>176 //ringx("ringx",maptabx, IntTab(), 2, 1, 1);177 soclib::caba::VciVgmn<vci_param>178 ringx("ringx",maptabx, 1, 1, 2, 2);160 soclib::caba::VciSimpleRingFast<vci_param, 40 , 33> 161 ringd("ringd",maptabp, IntTab(), 2, 4, 2); 162 // soclib::caba::VciVgmn<vci_param> 163 // ringd("ringd",maptabp, 4, 3, 2, 2); 164 165 soclib::caba::VciSimpleRingFast<vci_param, 40 , 33> 166 ringc("ringc",maptabc, IntTab(), 2, 5, 5); 167 // soclib::caba::VciVgmn<vci_param> 168 // ringc("ringc",maptabc, 5, 5, 2, 2); 169 170 soclib::caba::VciSimpleRingFast<vci_param, 40 , 33> 171 ringx("ringx",maptabx, IntTab(), 2, 1, 1); 172 // soclib::caba::VciVgmn<vci_param> 173 // ringx("ringx",maptabx, 1, 1, 2, 2); 179 174 180 175 // Net-List … … 228 223 proc3.p_vci_tgt(signal_vci_tgt_proc3); 229 224 230 rom.p_clk(signal_clk);231 rom.p_resetn(signal_resetn);232 rom.p_vci(signal_vci_tgt_rom);233 234 225 // vci_logger_proc0.p_clk(signal_clk); 235 226 // vci_logger_proc0.p_resetn(signal_resetn); … … 277 268 ringd.p_to_initiator[2](signal_vci_ini_rw_proc2); 278 269 ringd.p_to_initiator[3](signal_vci_ini_rw_proc3); 279 ringd.p_to_target[0](signal_vci_tgt_ rom);270 ringd.p_to_target[0](signal_vci_tgt_memc); 280 271 ringd.p_to_target[1](signal_vci_tgt_tty); 281 ringd.p_to_target[2](signal_vci_tgt_memc);282 272 283 273 ringc.p_clk(signal_clk); -
trunk/platforms/caba-ring-ccxcachev1_memcachev3-mipsel/Makefile
r3 r137 1 1 ARCH=mips32el 2 2 SIMULATION_ARGS=100000 3 SOCLIB_CC_ADD_ARGS=-t systemcass 3 4 SOCLIB?=$(shell soclib-cc --getpath) 4 5 export SOCLIB -
trunk/platforms/caba-ring-ccxcachev1_memcachev3-mipsel/segmentation.h
r86 r137 19 19 // base address required by MIPS processor 20 20 ///////////////////////////////////////////////////////////////// 21 #define MMU22 21 23 22 #define RESET_BASE 0xBFC00000 … … 36 35 #define MC_M_SIZE 0x00200000 37 36 38 /////////////////////////////////////////////////////////////////39 // page table (initialised)40 /////////////////////////////////////////////////////////////////41 #define PTD_ADDR 0x4040000042 #define PTE_ADDR 0x4040200043 #define IPTE_ADDR 0x4040300044 #define TAB_SIZE 0x0001000045 46 #define V_TTY_BASE 0x0080000047 #define V_TIMER_BASE 0x00C00000 // timer virtual address48 37 ////////////////////////////////////////////////////////// 49 38 // System devices … … 77 66 #define XRAM_SIZE 0x00000008 78 67 79 #define MC_R_BASE 0x2020000080 #define MC_R_SIZE 0x0000000881 82 #define CLEANUP_OFFSET 0x20200000 -
trunk/platforms/caba-ring-ccxcachev1_memcachev3-mipsel/soft/main.c
r86 r137 8 8 #define NPROCS 4 9 9 #define SIZE 500 10 #define SORT_TYPE 210 #define SORT_TYPE 0 11 11 12 12 volatile int nprocs=NPROCS; -
trunk/platforms/caba-ring-ccxcachev1_memcachev3-mipsel/top.cpp
r86 r137 41 41 maptabp.add(Segment("text" , TEXT_BASE , TEXT_SIZE , IntTab(2), true)); 42 42 maptabp.add(Segment("tty" , TTY_BASE , TTY_SIZE , IntTab(1), false)); 43 maptabp.add(Segment("mc_r" , MC_R_BASE , MC_R_SIZE , IntTab(2), false, true, IntTab(0)));44 43 maptabp.add(Segment("mc_m" , MC_M_BASE , MC_M_SIZE , IntTab(2), true )); 45 maptabp.add(Segment("ptba" , PTD_ADDR , TAB_SIZE , IntTab(2), true));46 44 47 45 std::cout << maptabp << std::endl; … … 52 50 maptabc.add(Segment("c_proc2" , C_PROC2_BASE , C_PROC2_SIZE , IntTab(2), false, true, IntTab(2))); 53 51 maptabc.add(Segment("c_proc3" , C_PROC3_BASE , C_PROC3_SIZE , IntTab(3), false, true, IntTab(3))); 54 maptabc.add(Segment("mc_r" , MC_R_BASE , MC_R_SIZE , IntTab(4), false, false));55 52 maptabc.add(Segment("mc_m" , MC_M_BASE , MC_M_SIZE , IntTab(4), false, false)); 56 53 maptabc.add(Segment("reset", RESET_BASE, RESET_SIZE, IntTab(4), false, false)); 57 54 maptabc.add(Segment("excep", EXCEP_BASE, EXCEP_SIZE, IntTab(4), false, false)); 58 55 maptabc.add(Segment("text" , TEXT_BASE , TEXT_SIZE , IntTab(4), false, false)); 59 maptabc.add(Segment("ptba" , PTD_ADDR , TAB_SIZE , IntTab(4), false, false));60 56 61 57 std::cout << maptabc << std::endl; … … 66 62 maptabx.add(Segment("excep", EXCEP_BASE, EXCEP_SIZE, IntTab(0), false)); 67 63 maptabx.add(Segment("text" , TEXT_BASE , TEXT_SIZE , IntTab(0), false)); 68 maptabx.add(Segment("ptba" , PTD_ADDR , TAB_SIZE , IntTab(0), false));69 64 70 65 std::cout << maptabx << std::endl; -
trunk/platforms/caba-ring-ccxcachev4_memcachev4-mips32el/Makefile
r134 r137 3 3 #SIMULATION_ARGS = 100000 4 4 #SOCLIB_CC_ADD_ARGS = "-DCC_XCACHE_WRAPPER_DEBUG=1" 5 SOCLIB_CC_ADD_ARGS=-t systemcass 5 6 SOCLIB ?= $(shell soclib-cc --getpath) 6 7 export SOCLIB -
trunk/platforms/caba-ring-ccxcachev4_memcachev4-mips32el/platform_desc
r134 r137 9 9 Uses('caba:vci_simhelper'), 10 10 Uses('caba:vci_multi_tty'), 11 Uses('caba:vci_vgmn'), 12 Uses('caba:vci_simple_ring_network_2', 13 ring_cmd_data_size = 37, 11 Uses('caba:vci_simple_ring_fast', 12 ring_cmd_data_size = 40, 14 13 ring_rsp_data_size = 33), 15 14 Uses('caba:vci_mem_cache_v4'), -
trunk/platforms/caba-ring-ccxcachev4_memcachev4-mips32el/top.cpp
r134 r137 14 14 #include "vci_multi_tty.h" 15 15 #include "vci_xicu.h" 16 #include "vci_simple_ring_network_2.h" 17 #include "vci_vgmn.h" 16 #include "vci_simple_ring_fast.h" 18 17 #include "vci_mem_cache_v4.h" 19 18 #include "vci_cc_xcache_wrapper_v4.h" … … 32 31 # define PARAM_VCI 4,8,32,1,1,1,8,4,4,1 33 32 34 # define USE_OLD_XCACHE 135 # define USE_VGMN 136 33 # define NB_PROC_MIN 1 37 34 # define NB_PROC_MAX 15 38 35 // min_latency, fifo_depth 39 # define PARAM_VGMN_P 1 , 840 # define PARAM_VGMN_C 1 , 841 # define PARAM_VGMN_X 2 , 842 // wrapper_fifo_depth43 36 # define PARAM_RING_P 2 44 37 # define PARAM_RING_C 2 … … 61 54 { 62 55 std::cout << funcname << " [nb_cycle [file [soft]]] " << std::endl; 63 std::cout << " * nb_cycle : number of simulated cycle, if 0 then no stop condition. (default : " << NCYCLES_DEFAULT << " cycle(s))" << endl;64 std::cout << " * file : Configuration file : nb_proc, iways, isets, iwords, dways, dsets, dwords, wnwords, wnlines, wtimeout, memc_nways, memc_nsets, memc_words, memc_heap_size. (default : " << FILE_DEFAULT << " cycle(s))" << endl;65 std::cout << " * soft : software executed by this platforms. (default : \"" << SOFT_DEFAULT << "\")" << endl;56 std::cout << " * nb_cycle : number of simulated cycle, if 0 then no stop condition. (default : " << NCYCLES_DEFAULT << " cycle(s))" << std::endl; 57 std::cout << " * file : Configuration file : nb_proc, iways, isets, iwords, dways, dsets, dwords, wnwords, wnlines, wtimeout, memc_nways, memc_nsets, memc_words, memc_heap_size. (default : " << FILE_DEFAULT << " cycle(s))" << std::endl; 58 std::cout << " * soft : software executed by this platforms. (default : \"" << SOFT_DEFAULT << "\")" << std::endl; 66 59 67 60 exit(1); … … 256 249 257 250 proc[i] = new soclib::caba::VciCcXCacheWrapperV4<vci_param, proc_iss > (str.str().c_str(), i, maptabp, maptabc, IntTab(i),IntTab(i),IntTab(i) 258 #if USE_OLD_XCACHE259 ,iways, isets, iwords260 ,dways, dsets, dwords261 #else262 251 ,iways, isets, iwords 263 252 ,dways, dsets, dwords 264 253 ,wnwords, wnlines, wtimeout 265 #endif266 254 ); 267 255 … … 307 295 // interconnect_x : memc | xram 308 296 309 #if USE_VGMN 310 soclib::caba::VciVgmn<vci_param> 311 interconnect_p("interconnect_p",maptabp, nb_proc , 5 , PARAM_VGMN_P); 312 313 soclib::caba::VciVgmn<vci_param> 314 interconnect_c("interconnect_c",maptabc, nb_proc+1, nb_proc+1, PARAM_VGMN_C); 315 316 soclib::caba::VciVgmn<vci_param> 317 interconnect_x("interconnect_x",maptabx, 1 , 1 , PARAM_VGMN_X); 318 #else 319 soclib::caba::VciSimpleRingNetwork2<vci_param,37,33> 297 soclib::caba::VciSimpleRingFast<vci_param,40,33> 320 298 interconnect_p("interconnect_p",maptabp, IntTab(), PARAM_RING_P,nb_proc , 5 ); 321 299 322 soclib::caba::VciSimpleRing Network2<vci_param,37,33>300 soclib::caba::VciSimpleRingFast<vci_param,40,33> 323 301 interconnect_c("interconnect_c",maptabc, IntTab(), PARAM_RING_C,nb_proc+1, nb_proc+1); 324 302 325 soclib::caba::VciSimpleRing Network2<vci_param,37,33>303 soclib::caba::VciSimpleRingFast<vci_param,40,33> 326 304 interconnect_x("interconnect_x",maptabx, IntTab(), PARAM_RING_X,1 , 1 ); 327 #endif328 305 329 306 // Net-List -
trunk/platforms/caba-ring-vcache2_memcache-mipsel/Makefile
r3 r137 1 1 ARCH=mips32el 2 2 SIMULATION_ARGS=100000 3 SOCLIB_CC_ADD_ARGS=-t systemcass 3 4 SOCLIB?=$(shell soclib-cc --getpath) 4 5 export SOCLIB -
trunk/platforms/caba-ring-vcache2_memcache-mipsel/platform_desc
r3 r137 8 8 Uses('caba:vci_simple_ram'), 9 9 Uses('caba:vci_multi_tty'), 10 Uses('caba:vci_simple_ring_network'), 10 Uses('caba:vci_simple_ring_fast', 11 ring_cmd_data_size = 40, 12 ring_rsp_data_size = 33, 13 ), 11 14 Uses('caba:vci_mem_cache2'), 12 15 Uses('common:elf_file_loader'), -
trunk/platforms/caba-ring-vcache2_memcache-mipsel/top.cpp
r3 r137 11 11 #include "vci_simple_ram.h" 12 12 #include "vci_multi_tty.h" 13 #include "vci_simple_ring_ network.h"13 #include "vci_simple_ring_fast.h" 14 14 #include "vci_mem_cache2.h" 15 15 #include "vci_cc_vcache_wrapper2_ring.h" … … 165 165 tty("tty",IntTab(1),maptabp,"tty0","tty1","tty2","tty3",NULL); 166 166 167 soclib::caba::VciSimpleRing Network<vci_param>168 ringp("ringp",maptabp, IntT ab(), 2, 4, 3);169 170 soclib::caba::VciSimpleRing Network<vci_param>171 ringc("ringc",maptabc, IntT ab(), 2, 5, 5);172 173 soclib::caba::VciSimpleRing Network<vci_param>167 soclib::caba::VciSimpleRingFast<vci_param, 40, 33> 168 ringp("ringp",maptabp, IntTFast, 4, 3); 169 170 soclib::caba::VciSimpleRingFast<vci_param, 40, 33> 171 ringc("ringc",maptabc, IntTFast, 5, 5); 172 173 soclib::caba::VciSimpleRingFast<vci_param, 40, 33> 174 174 ringx("ringx",maptabx, IntTab(), 2, 1, 1); 175 175 -
trunk/platforms/fpga_3_tsar_v1/platform_desc
r42 r137 12 12 Uses('caba:vci_multi_tty'), 13 13 Uses('caba:vci_vgmn'), 14 Uses('caba:vci_simple_ring_ network_2',15 ring_cmd_data_size = 37,14 Uses('caba:vci_simple_ring_fast', 15 ring_cmd_data_size = 40, 16 16 ring_rsp_data_size = 33), 17 17 Uses('caba:vci_mem_cache_v2'), -
trunk/platforms/fpga_3_tsar_v1/top.cpp
r42 r137 10 10 #include "vci_simple_ram.h" 11 11 #include "vci_multi_tty.h" 12 #include "vci_simple_ring_ network_2.h"12 #include "vci_simple_ring_fast.h" 13 13 #include "vci_vgmn.h" 14 14 #include "vci_mem_cache_v2.h" … … 21 21 //#define VCI_LOGGER 22 22 #include "segmentation.h" 23 #define USE_VGMN23 //#define USE_VGMN 24 24 25 25 int _main(int argc, char *argv[]) … … 198 198 #else 199 199 200 soclib::caba::VciSimpleRing Network2<vci_param,37,33>200 soclib::caba::VciSimpleRingFast<vci_param,40,33> 201 201 ringp("ringp",maptabp, IntTab(), 2, 4, 3); 202 202 203 soclib::caba::VciSimpleRing Network2<vci_param,37,33>203 soclib::caba::VciSimpleRingFast<vci_param,40,33> 204 204 ringc("ringc",maptabc, IntTab(), 2, 5, 5); 205 205 206 soclib::caba::VciSimpleRing Network2<vci_param,37,33>206 soclib::caba::VciSimpleRingFast<vci_param,40,33> 207 207 ringx("ringx",maptabx, IntTab(), 2, 1, 1); 208 208 #endif -
trunk/platforms/tsarv2_mutekh/top.cpp
r8 r137 10 10 #include "vci_simple_ram.h" 11 11 #include "vci_multi_tty.h" 12 #include "vci_simple_ring_ network_2.h"12 #include "vci_simple_ring_fast.h" 13 13 #include "vci_vgmn.h" 14 14 #include "vci_mem_cache_v2.h" … … 218 218 219 219 #else 220 soclib::caba::VciSimpleRing Network2<vci_param, 37, 33>220 soclib::caba::VciSimpleRingFast<vci_param, 40, 33> 221 221 ringp("ringp",maptabp, IntTab(), 2, 4, 4); 222 222 223 soclib::caba::VciSimpleRing Network2<vci_param, 37, 33>223 soclib::caba::VciSimpleRingFast<vci_param, 40, 33> 224 224 ringc("ringc",maptabc, IntTab(), 2, 5, 5); 225 225
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