Index: trunk/modules/vci_cc_vcache_wrapper2_v1/caba/source/include/vci_cc_vcache_wrapper2_v1.h =================================================================== --- trunk/modules/vci_cc_vcache_wrapper2_v1/caba/source/include/vci_cc_vcache_wrapper2_v1.h (revision 138) +++ trunk/modules/vci_cc_vcache_wrapper2_v1/caba/source/include/vci_cc_vcache_wrapper2_v1.h (revision 139) @@ -169,8 +169,14 @@ RSP_DATA_WRITE, // 0d }; - enum cleanup_fsm_state_e { - CLEANUP_IDLE, // 00 - CLEANUP_DATA, // 01 - CLEANUP_INS, // 02 + enum cleanup_cmd_fsm_state_e { + CLEANUP_CMD_IDLE, // 00 + CLEANUP_CMD_DATA, // 01 + CLEANUP_CMD_INS, // 02 + }; + + enum cleanup_rsp_fsm_state_e { + CLEANUP_RSP_IDLE, // 00 + CLEANUP_RSP_DATA, // 01 + CLEANUP_RSP_INS, // 02 }; @@ -385,5 +391,6 @@ data_t *r_dcache_miss_buf; - sc_signal r_cleanup_fsm; + sc_signal r_cleanup_cmd_fsm; + sc_signal r_cleanup_rsp_fsm; // VCI_TGT FSM REGISTERS @@ -523,4 +530,10 @@ uint32_t m_cpt_cc_inval_data; // number of coherence inval data packets uint32_t m_cpt_cc_broadcast; // number of coherence broadcast packets + + uint32_t m_cost_updt_data_frz; // number of frozen cycles related to coherence update data packets + uint32_t m_cost_inval_ins_frz; // number of frozen cycles related to coherence inval instruction packets + uint32_t m_cost_inval_data_frz; // number of frozen cycles related to coherence inval data packets + uint32_t m_cost_broadcast_frz; // number of frozen cycles related to coherence broadcast packets + uint32_t m_cpt_cc_cleanup_ins; // number of coherence cleanup packets uint32_t m_cpt_cc_cleanup_data; // number of coherence cleanup packets Index: trunk/modules/vci_cc_vcache_wrapper2_v1/caba/source/src/vci_cc_vcache_wrapper2_v1.cpp =================================================================== --- trunk/modules/vci_cc_vcache_wrapper2_v1/caba/source/src/vci_cc_vcache_wrapper2_v1.cpp (revision 138) +++ trunk/modules/vci_cc_vcache_wrapper2_v1/caba/source/src/vci_cc_vcache_wrapper2_v1.cpp (revision 139) @@ -140,8 +140,13 @@ "RSP_DATA_WRITE", }; -const char *cleanup_fsm_state_str[] = { - "CLEANUP_IDLE", - "CLEANUP_DATA", - "CLEANUP_INS", +const char *cleanup_cmd_fsm_state_str[] = { + "CLEANUP_CMD_IDLE", + "CLEANUP_CMD_DATA", + "CLEANUP_CMD_INS", + }; +const char *cleanup_rsp_fsm_state_str[] = { + "CLEANUP_RSP_IDLE", + "CLEANUP_RSP_DATA", + "CLEANUP_RSP_INS", }; const char *tgt_fsm_state_str[] = { @@ -284,5 +289,6 @@ r_dcache_tlb_sc_fail("r_dcache_tlb_sc_fail"), - r_cleanup_fsm("r_cleanup_fsm"), + r_cleanup_cmd_fsm("r_cleanup_cmd_fsm"), + r_cleanup_rsp_fsm("r_cleanup_rsp_fsm"), r_vci_tgt_fsm("r_vci_tgt_fsm"), @@ -389,5 +395,6 @@ << " cmd fsm: " << cmd_fsm_state_str[r_vci_cmd_fsm] << " rsp fsm: " << rsp_fsm_state_str[r_vci_rsp_fsm] - << " cleanup fsm: " << cleanup_fsm_state_str[r_cleanup_fsm] + << " cleanup cmd fsm: " << cleanup_cmd_fsm_state_str[r_cleanup_cmd_fsm] + << " cleanup rsp fsm: " << cleanup_rsp_fsm_state_str[r_cleanup_rsp_fsm] << " inval itlb fsm: " << inval_itlb_fsm_state_str[r_inval_itlb_fsm] << " inval dtlb fsm: " << inval_dtlb_fsm_state_str[r_inval_dtlb_fsm] << std::endl; @@ -428,5 +435,5 @@ << "- ITLB HIT IN DCACHE RATE= " << (float)m_cpt_ins_tlb_hit_dcache/m_cpt_ins_tlb_miss << std::endl << "- DTLB HIT IN DCACHE RATE= " << (float)m_cpt_data_tlb_hit_dcache/m_cpt_data_tlb_miss << std::endl - << "- DCACHE FROZEN BY TLB OP= " << (float)(m_cost_ins_tlb_occup_cache_frz+m_cost_data_tlb_occup_cache_frz)/m_cpt_dcache_frz_cycles << std::endl + << "- DCACHE FROZEN BY ITLB = " << (float)m_cost_ins_tlb_occup_cache_frz/m_cpt_dcache_frz_cycles << std::endl << "- DCACHE FOR TLB % = " << (float)m_cpt_tlb_occup_dcache/(m_dcache_ways*m_dcache_sets) << std::endl << "- NB CC BROADCAST = " << m_cpt_cc_broadcast << std::endl @@ -434,4 +441,8 @@ << "- NB CC INVAL DATA = " << m_cpt_cc_inval_data << std::endl << "- NB CC INVAL INS = " << m_cpt_cc_inval_ins << std::endl + << "- CC BROADCAST COST = " << (float)m_cost_broadcast_frz/m_cpt_cc_broadcast << std::endl + << "- CC UPDATE DATA COST = " << (float)m_cost_updt_data_frz/m_cpt_cc_update_data << std::endl + << "- CC INVAL DATA COST = " << (float)m_cost_inval_data_frz/m_cpt_cc_inval_data << std::endl + << "- CC INVAL INS COST = " << (float)m_cost_inval_ins_frz/m_cpt_cc_inval_ins << std::endl << "- NB CC CLEANUP DATA = " << m_cpt_cc_cleanup_data << std::endl << "- NB CC CLEANUP INS = " << m_cpt_cc_cleanup_ins << std::endl @@ -458,7 +469,7 @@ m_cpt_icache_dir_write = 0; - m_cpt_frz_cycles = 0; + m_cpt_frz_cycles = 0; m_cpt_dcache_frz_cycles = 0; - m_cpt_total_cycles = 0; + m_cpt_total_cycles = 0; m_cpt_read = 0; @@ -527,10 +538,16 @@ m_cost_dtlb_sc_dirty_transaction = 0; - m_cpt_cc_broadcast = 0; m_cpt_cc_update_data = 0; - m_cpt_cc_inval_data = 0; - m_cpt_cc_inval_ins = 0; + m_cpt_cc_inval_ins = 0; + m_cpt_cc_inval_data = 0; + m_cpt_cc_broadcast = 0; + + m_cost_updt_data_frz = 0; + m_cost_inval_ins_frz = 0; + m_cost_inval_data_frz = 0; + m_cost_broadcast_frz = 0; + m_cpt_cc_cleanup_data = 0; - m_cpt_cc_cleanup_ins = 0; + m_cpt_cc_cleanup_ins = 0; } @@ -550,5 +567,6 @@ r_inval_itlb_fsm = INVAL_ITLB_IDLE; r_inval_dtlb_fsm = INVAL_DTLB_IDLE; - r_cleanup_fsm = CLEANUP_IDLE; + r_cleanup_cmd_fsm = CLEANUP_CMD_IDLE; + r_cleanup_rsp_fsm = CLEANUP_RSP_IDLE; // write buffer & caches @@ -723,4 +741,22 @@ m_cost_ins_tlb_occup_cache_frz = 0; m_cost_data_tlb_occup_cache_frz = 0; + + m_cpt_ins_tlb_inval = 0; + m_cpt_data_tlb_inval = 0; + m_cost_ins_tlb_inval_frz = 0; + m_cost_data_tlb_inval_frz = 0; + + m_cpt_cc_update_data = 0; + m_cpt_cc_inval_ins = 0; + m_cpt_cc_inval_data = 0; + m_cpt_cc_broadcast = 0; + + m_cost_updt_data_frz = 0; + m_cost_inval_ins_frz = 0; + m_cost_inval_data_frz = 0; + m_cost_broadcast_frz = 0; + + m_cpt_cc_cleanup_data = 0; + m_cpt_cc_cleanup_ins = 0; m_cpt_itlbmiss_transaction = 0; @@ -751,5 +787,6 @@ << " cmd fsm: " << cmd_fsm_state_str[r_vci_cmd_fsm] << " rsp fsm: " << rsp_fsm_state_str[r_vci_rsp_fsm] - << " cleanup fsm: " << cleanup_fsm_state_str[r_cleanup_fsm] + << " cleanup cmd fsm: " << cleanup_cmd_fsm_state_str[r_cleanup_cmd_fsm] + << " cleanup rsp fsm: " << cleanup_rsp_fsm_state_str[r_cleanup_rsp_fsm] << " inval itlb fsm: " << inval_itlb_fsm_state_str[r_inval_itlb_fsm] << " inval dtlb fsm: " << inval_dtlb_fsm_state_str[r_inval_dtlb_fsm] << std::endl; @@ -843,4 +880,5 @@ r_vci_tgt_fsm = TGT_REQ_BROADCAST; m_cpt_cc_broadcast++; + m_cost_broadcast_frz++; } else // multi-update or multi-invalidate for data type @@ -859,4 +897,5 @@ r_vci_tgt_fsm = TGT_REQ_DCACHE; m_cpt_cc_inval_data++ ; + m_cost_inval_data_frz++; } else if (cell == 4) // update @@ -871,4 +910,5 @@ r_vci_tgt_fsm = TGT_UPDT_WORD; m_cpt_cc_update_data++ ; + m_cost_updt_data_frz++; } else if (cell == 8) @@ -883,4 +923,5 @@ r_vci_tgt_fsm = TGT_REQ_ICACHE; m_cpt_cc_inval_ins++ ; + m_cost_inval_ins_frz++; } } // end if address @@ -891,4 +932,6 @@ case TGT_UPDT_WORD: { + m_cost_updt_data_frz++; + if (p_vci_tgt.cmdval.read()) { @@ -908,4 +951,6 @@ case TGT_UPDT_DATA: { + m_cost_updt_data_frz++; + if (p_vci_tgt.cmdval.read()) { @@ -927,4 +972,6 @@ case TGT_REQ_BROADCAST: { + m_cost_broadcast_frz++; + if ( !r_tgt_icache_req.read() && !r_tgt_dcache_req.read() ) { @@ -938,4 +985,6 @@ case TGT_REQ_ICACHE: { + m_cost_inval_ins_frz++; + if ( !r_tgt_icache_req.read() ) { @@ -948,4 +997,9 @@ case TGT_REQ_DCACHE: { + if (r_tgt_update) + m_cost_updt_data_frz++; + else + m_cost_inval_data_frz++; + if ( !r_tgt_dcache_req.read() ) { @@ -958,4 +1012,6 @@ case TGT_RSP_BROADCAST: { + m_cost_broadcast_frz++; + // no response if ( !r_tgt_icache_rsp.read() && !r_tgt_dcache_rsp.read() && !r_tgt_icache_req.read() && !r_tgt_dcache_req.read() ) @@ -986,4 +1042,6 @@ case TGT_RSP_ICACHE: { + m_cost_inval_ins_frz++; + if ( (p_vci_tgt.rspack.read() || !r_tgt_icache_rsp.read()) && !r_tgt_icache_req.read() ) { @@ -996,4 +1054,9 @@ case TGT_RSP_DCACHE: { + if (r_tgt_update) + m_cost_updt_data_frz++; + else + m_cost_inval_data_frz++; + if ( (p_vci_tgt.rspack.read() || !r_tgt_dcache_rsp.read()) && !r_tgt_dcache_req.read() ) { @@ -1241,5 +1304,5 @@ r_icache_vaddr_req = ireq.addr; r_icache_fsm = ICACHE_BIS; - m_cost_ins_miss_frz++; + //m_cost_ins_miss_frz++; } else // cached or uncached access with a correct speculative physical address @@ -1281,6 +1344,4 @@ case ICACHE_BIS: { - //if ( ireq.valid ) m_cost_ins_miss_frz++; - // external cache invalidate request if ( r_tgt_icache_req ) @@ -1585,5 +1646,5 @@ r_dcache_itlb_cleanup_req = true; r_dcache_itlb_cleanup_line = victim_index; - m_cpt_cc_cleanup_ins++; + //m_cpt_cc_cleanup_ins++; } r_icache_fsm = ICACHE_TLB1_UPDT; @@ -1642,5 +1703,4 @@ r_itlb_acc_redo_req = false; r_itlb_read_dcache_req = true; - //r_icache_fsm = ICACHE_IDLE; } else if ( !(r_dcache_rsp_itlb_miss >> PTE_V_SHIFT) ) // unmapped @@ -1822,5 +1882,5 @@ r_dcache_itlb_cleanup_req = true; r_dcache_itlb_cleanup_line = victim_index; - m_cpt_cc_cleanup_ins++; + //m_cpt_cc_cleanup_ins++; } r_icache_fsm = ICACHE_TLB2_UPDT; @@ -1941,7 +2001,8 @@ if ( !r_dcache_itlb_cleanup_req ) { - r_dcache_itlb_cleanup_req = icache_tlb.inval(r_dcache_wdata_save, &victim_index); + bool dcache_itlb_cleanup_req = icache_tlb.inval(r_dcache_wdata_save, &victim_index); + r_dcache_itlb_cleanup_req = dcache_itlb_cleanup_req; r_dcache_itlb_cleanup_line = victim_index; - m_cpt_cc_cleanup_ins++; + //if (dcache_itlb_cleanup_req) m_cpt_cc_cleanup_ins++; r_dcache_xtn_req = false; r_itlb_translation_valid = false; @@ -1979,7 +2040,8 @@ { // invalidate and cleanup if necessary - r_icache_cleanup_req = r_icache.inval(ipaddr); + bool icache_cleanup_req = r_icache.inval(ipaddr); + r_icache_cleanup_req = icache_cleanup_req; r_icache_cleanup_line = ipaddr >> (uint32_log2(m_icache_words) + 2); - m_cpt_cc_cleanup_ins++; + if (icache_cleanup_req) m_cpt_cc_cleanup_ins++; } r_dcache_xtn_req = false; @@ -2004,7 +2066,8 @@ { // invalidate and cleanup if necessary - r_icache_cleanup_req = r_icache.inval(ipaddr); + bool icache_cleanup_req = r_icache.inval(ipaddr); + r_icache_cleanup_req = icache_cleanup_req; r_icache_cleanup_line = ipaddr >> (uint32_log2(m_icache_words) + 2); - m_cpt_cc_cleanup_ins++; + if (icache_cleanup_req) m_cpt_cc_cleanup_ins++; r_dcache_xtn_req = false; r_icache_fsm = ICACHE_IDLE; @@ -2102,5 +2165,4 @@ if ( r_icache_inval_tlb_rsp ) r_icache_inval_tlb_rsp = false; - //if ( r_icache_inval_rsp ) r_icache_inval_rsp = false; break; } @@ -2170,7 +2232,8 @@ m_cpt_icache_data_write++; - r_icache_cleanup_req = r_icache.update(r_icache_paddr_save.read(), buf, &victim_index); + bool icache_cleanup_req = r_icache.update(r_icache_paddr_save.read(), buf, &victim_index); + r_icache_cleanup_req = icache_cleanup_req; r_icache_cleanup_line = victim_index; - m_cpt_cc_cleanup_ins++; + if (icache_cleanup_req) m_cpt_cc_cleanup_ins++; r_icache_fsm = ICACHE_IDLE; } @@ -2258,7 +2321,9 @@ } } // end switch r_icache_fsm + #ifdef SOCLIB_MODULE_DEBUG std::cout << name() << " Instruction Response: " << irsp << std::endl; #endif + //////////////////////////////////////////////////////////////////////////////////// // INVAL ITLB CHECK FSM @@ -3039,6 +3104,4 @@ case DCACHE_BIS: { - //if ( dreq.valid ) m_cost_data_miss_frz++; - // external cache invalidate request if ( r_tgt_dcache_req ) @@ -3295,4 +3358,5 @@ { m_cost_data_tlb_miss_frz++; + if ( r_dcache_tlb_ptba_read ) m_cost_data_tlb_update_dirty_frz++; // external cache invalidate request @@ -3349,6 +3413,4 @@ r_dcache_tlb_ll_dirty_req = true; r_dcache_fsm = DCACHE_LL_DIRTY_WAIT; - m_cpt_data_tlb_update_dirty++; - m_cost_data_tlb_update_dirty_frz++; } else @@ -3546,4 +3608,5 @@ { if ( dreq.valid ) m_cost_data_tlb_miss_frz++; + if ( r_dcache_tlb_ptba_read ) m_cost_data_tlb_update_dirty_frz++; // external cache invalidate request @@ -3605,4 +3668,5 @@ { m_cost_data_tlb_miss_frz++; + if ( r_dcache_tlb_ptba_read ) m_cost_data_tlb_update_dirty_frz++; // external cache invalidate request @@ -3700,6 +3764,4 @@ r_dcache_tlb_ll_dirty_req = true; r_dcache_fsm = DCACHE_LL_DIRTY_WAIT; - m_cpt_data_tlb_update_dirty++; - m_cost_data_tlb_update_dirty_frz++; } else @@ -3776,5 +3838,5 @@ r_dcache_dtlb_cleanup_req = true; r_dcache_dtlb_cleanup_line = victim_index; - m_cpt_cc_cleanup_data++; + //m_cpt_cc_cleanup_data++; } r_dcache_way = way; @@ -4121,5 +4183,4 @@ data_t rsp_dtlb_miss; data_t tlb_data_ppn; - //bool write_hit = false; paddr_t victim_index = 0; size_t way = 0; @@ -4251,5 +4312,5 @@ r_dcache_dtlb_cleanup_req = true; r_dcache_dtlb_cleanup_line = victim_index; - m_cpt_cc_cleanup_data++; + //m_cpt_cc_cleanup_data++; } r_dcache_way = way; @@ -4436,7 +4497,8 @@ if ( dcache_hit_t ) { - r_dcache_cleanup_req = r_dcache.inval(dpaddr, &way, &set); + bool dcache_cleanup_req = r_dcache.inval(dpaddr, &way, &set); + r_dcache_cleanup_req = dcache_cleanup_req; r_dcache_cleanup_line = dpaddr >> (uint32_log2(m_dcache_words)+2); - m_cpt_cc_cleanup_data++; + if (dcache_cleanup_req) m_cpt_cc_cleanup_data++; if ( r_dcache_in_itlb[way*m_dcache_sets+set] || r_dcache_in_dtlb[way*m_dcache_sets+set] ) @@ -4478,7 +4540,8 @@ if ( !r_dcache_cleanup_req ) { - r_dcache_cleanup_req = r_dcache.inval(dpaddr, &way, &set); + bool dcache_cleanup_req = r_dcache.inval(dpaddr, &way, &set); + r_dcache_cleanup_req = dcache_cleanup_req; r_dcache_cleanup_line = dpaddr >> (uint32_log2(m_dcache_words)+2); - m_cpt_cc_cleanup_data++; + if (dcache_cleanup_req) m_cpt_cc_cleanup_data++; if ( r_dcache_in_itlb[way*m_dcache_sets+set] || r_dcache_in_dtlb[way*m_dcache_sets+set] ) @@ -5055,4 +5118,9 @@ } + if ( ( r_dcache_fsm_save == DCACHE_ITLB_READ ) ||( r_dcache_fsm_save == DCACHE_ITLB_UPDT ) || ( r_dcache_fsm_save == DCACHE_ITLB_LL_WAIT ) || ( r_dcache_fsm_save == DCACHE_ITLB_SC_WAIT ) ) + { + m_cost_ins_tlb_occup_cache_frz++; + } + // DCACHE_TLB1_LL_WAIT DCACHE_TLB1_SC_WAIT DCACHE_LL_DIRTY_WAIT DCACHE_WRITE_DIRTY DCACHE_ITLB_LL_WAIT DCACHE_ITLB_SC_WAIT // DCACHE_TLB2_LL_WAIT DCACHE_TLB2_SC_WAIT DCACHE_SC_DIRTY_WAIT @@ -5061,13 +5129,7 @@ ( (r_dcache_paddr_save.read() & ~((m_dcache_words<<2)-1)) == (r_tgt_addr.read() & ~((m_dcache_words<<2)-1)))) || (( ( r_dcache_fsm_save == DCACHE_TLB1_READ ) || ( r_dcache_fsm_save == DCACHE_TLB2_READ ) || - ( r_dcache_fsm_save == DCACHE_TLB1_READ_UPDT ) || ( r_dcache_fsm_save == DCACHE_TLB2_READ_UPDT ) /*|| - ( r_dcache_fsm_save == DCACHE_TLB1_UPDT ) || ( r_dcache_fsm_save == DCACHE_TLB2_UPDT ) || - ( r_dcache_fsm_save == DCACHE_TLB1_LL_WAIT ) || ( r_dcache_fsm_save == DCACHE_TLB2_LL_WAIT ) || - ( r_dcache_fsm_save == DCACHE_TLB1_SC_WAIT ) || ( r_dcache_fsm_save == DCACHE_TLB2_SC_WAIT ) || - ( r_dcache_fsm_save == DCACHE_LL_DIRTY_WAIT ) || ( r_dcache_fsm_save == DCACHE_SC_DIRTY_WAIT ) || - ( r_dcache_fsm_save == DCACHE_WRITE_DIRTY )*/ ) && + ( r_dcache_fsm_save == DCACHE_TLB1_READ_UPDT ) || ( r_dcache_fsm_save == DCACHE_TLB2_READ_UPDT ) ) && ( (r_dcache_tlb_paddr.read() & ~((m_dcache_words<<2)-1)) == (r_tgt_addr.read() & ~((m_dcache_words<<2)-1))) ) - || (( ( r_dcache_fsm_save == DCACHE_ITLB_READ ) /*|| ( r_dcache_fsm_save == DCACHE_ITLB_UPDT ) || - ( r_dcache_fsm_save == DCACHE_ITLB_LL_WAIT ) || ( r_dcache_fsm_save == DCACHE_ITLB_SC_WAIT )*/ ) && + || (( ( r_dcache_fsm_save == DCACHE_ITLB_READ ) ) && ( (r_icache_paddr_save.read() & ~((m_dcache_words<<2)-1)) == (r_tgt_addr.read() & ~((m_dcache_words<<2)-1))) ) ) { @@ -5158,4 +5220,9 @@ } + if ( ( r_dcache_fsm_save == DCACHE_ITLB_READ ) ||( r_dcache_fsm_save == DCACHE_ITLB_UPDT ) || ( r_dcache_fsm_save == DCACHE_ITLB_LL_WAIT ) || ( r_dcache_fsm_save == DCACHE_ITLB_SC_WAIT ) ) + { + m_cost_ins_tlb_occup_cache_frz++; + } + m_cpt_dcache_dir_write++; m_cpt_dcache_data_write++; @@ -5188,4 +5255,8 @@ m_cost_data_tlb_miss_frz++; } + if ( ( r_dcache_fsm_save == DCACHE_ITLB_READ ) ||( r_dcache_fsm_save == DCACHE_ITLB_UPDT ) || ( r_dcache_fsm_save == DCACHE_ITLB_LL_WAIT ) || ( r_dcache_fsm_save == DCACHE_ITLB_SC_WAIT ) ) + { + m_cost_ins_tlb_occup_cache_frz++; + } r_tgt_dcache_rsp = r_dcache.inval(r_tgt_addr.read()); @@ -5210,4 +5281,8 @@ { m_cost_data_tlb_miss_frz++; + } + if ( ( r_dcache_fsm_save == DCACHE_ITLB_READ ) ||( r_dcache_fsm_save == DCACHE_ITLB_UPDT ) || ( r_dcache_fsm_save == DCACHE_ITLB_LL_WAIT ) || ( r_dcache_fsm_save == DCACHE_ITLB_SC_WAIT ) ) + { + m_cost_ins_tlb_occup_cache_frz++; } @@ -5241,4 +5316,8 @@ { m_cost_data_tlb_miss_frz++; + } + if ( ( r_dcache_fsm_save == DCACHE_ITLB_READ ) ||( r_dcache_fsm_save == DCACHE_ITLB_UPDT ) || ( r_dcache_fsm_save == DCACHE_ITLB_LL_WAIT ) || ( r_dcache_fsm_save == DCACHE_ITLB_SC_WAIT ) ) + { + m_cost_ins_tlb_occup_cache_frz++; } @@ -5281,6 +5360,4 @@ case DCACHE_ITLB_CLEANUP: { - //if ( dreq.valid ) m_cost_data_miss_frz++; - r_dcache.setinbit(((paddr_t)r_dcache_itlb_cleanup_line.read()<<(uint32_log2(m_dcache_words)+2)), r_dcache_in_itlb, false); r_dcache_itlb_cleanup_req = false; @@ -5762,5 +5839,4 @@ { r_dcache_tlb_sc_fail = true; - //r_dcache_tlb_ll_acc_req = true; } r_dcache_tlb_sc_acc_req = false; @@ -5803,5 +5879,4 @@ { r_dcache_tlb_sc_fail = true; - //r_dcache_tlb_ll_dirty_req = true; } r_dcache_tlb_sc_dirty_req = false; @@ -5870,27 +5945,81 @@ } // end switch r_vci_rsp_fsm -// add for blocage - switch (r_cleanup_fsm) { - - case CLEANUP_IDLE: - { - if ( p_vci_ini_c.cmdack.read() ) - { - if (r_dcache_cleanup_req) - { - r_cleanup_fsm = CLEANUP_DATA; + ////////////////////////////////////////////////////////////////////////// + // CLEANUP CMD FSM + // + // This FSM is synchronized with the CLEANUP RSP FSM, as both FSMs exit the + // IDLE state simultaneously. + ////////////////////////////////////////////////////////////////////////// + + switch (r_cleanup_cmd_fsm) { + + case CLEANUP_CMD_IDLE: + if (r_cleanup_rsp_fsm != CLEANUP_RSP_IDLE) + break; + + if (r_dcache_cleanup_req) + { + r_cleanup_cmd_fsm = CLEANUP_CMD_DATA; m_cpt_dcleanup_transaction++; - } - else if (r_icache_cleanup_req) - { - r_cleanup_fsm = CLEANUP_INS; + } + else if (r_icache_cleanup_req) + { + r_cleanup_cmd_fsm = CLEANUP_CMD_INS; m_cpt_icleanup_transaction++; - } - } - break; - } - case CLEANUP_DATA: - { - m_cost_dcleanup_transaction++; + } + break; + + default: + if ( p_vci_ini_c.cmdack.read() ) + { + r_cleanup_cmd_fsm = CLEANUP_CMD_IDLE; + } + break; + + } // end switch r_vci_cmd_fsm + + ////////////////////////////////////////////////////////////////////////// + // CLEANUP RSP FSM + // + // This FSM is synchronized with the CLEANUP CMD FSM, as both FSMs exit the + // IDLE state simultaneously. + ////////////////////////////////////////////////////////////////////////// + + switch (r_cleanup_rsp_fsm) { + + case CLEANUP_RSP_IDLE: + { + assert(!p_vci_ini_c.rspval.read() && "Unexpected response" ); + + if (r_cleanup_cmd_fsm != CLEANUP_CMD_IDLE) + break; + + if (r_dcache_cleanup_req) + { + r_cleanup_rsp_fsm = CLEANUP_RSP_DATA; + } + else if (r_icache_cleanup_req) + { + r_cleanup_rsp_fsm = CLEANUP_RSP_INS; + } + break; + } + case CLEANUP_RSP_DATA: + { + m_cost_dcleanup_transaction++; + if ( ! p_vci_ini_c.rspval.read() ) + break; + assert( p_vci_ini_c.reop.read() && + "illegal VCI response packet for dcache cleanup"); + assert( (p_vci_ini_c.rerror.read() == vci_param::ERR_NORMAL) && + "error in response packet for dcache cleanup"); + + r_dcache_cleanup_req = false; + r_cleanup_rsp_fsm = CLEANUP_RSP_IDLE; + break; + } + case CLEANUP_RSP_INS: + { + m_cost_icleanup_transaction++; if ( ! p_vci_ini_c.rspval.read() ) break; @@ -5900,20 +6029,6 @@ "error in response packet for icache cleanup"); - r_dcache_cleanup_req = false; - r_cleanup_fsm = CLEANUP_IDLE; - break; - } - case CLEANUP_INS: - { - m_cost_icleanup_transaction++; - if ( ! p_vci_ini_c.rspval.read() ) - break; - assert( p_vci_ini_c.reop.read() && - "illegal VCI response packet for icache cleanup"); - assert( (p_vci_ini_c.rerror.read() == vci_param::ERR_NORMAL) && - "error in response packet for icache cleanup"); - r_icache_cleanup_req = false; - r_cleanup_fsm = CLEANUP_IDLE; + r_cleanup_rsp_fsm = CLEANUP_RSP_IDLE; break; } @@ -6111,39 +6226,10 @@ } // end switch r_vci_cmd_fsm - - // VCI initiator command - switch (r_cleanup_fsm) { - - case CLEANUP_IDLE: - p_vci_ini_c.cmdval = r_icache_cleanup_req || r_dcache_cleanup_req; - p_vci_ini_c.rspack = false; - if ( r_icache_cleanup_req ) - { - p_vci_ini_c.address = r_icache_cleanup_line.read() * (m_icache_words<<2); - p_vci_ini_c.trdid = 1; // cleanup instruction - } - else - { - p_vci_ini_c.address = r_dcache_cleanup_line.read() * (m_dcache_words<<2); - p_vci_ini_c.trdid = 0; // cleanup data - } - p_vci_ini_c.wdata = 0; - p_vci_ini_c.be = 0; - p_vci_ini_c.plen = 4; - p_vci_ini_c.cmd = vci_param::CMD_WRITE; - p_vci_ini_c.pktid = 0; - p_vci_ini_c.srcid = m_srcid_c; - p_vci_ini_c.cons = false; - p_vci_ini_c.wrap = false; - p_vci_ini_c.contig = false; - p_vci_ini_c.clen = 0; - p_vci_ini_c.cfixed = false; - p_vci_ini_c.eop = true; - break; - - case CLEANUP_DATA: - case CLEANUP_INS: + p_vci_ini_c.rspack = true; + + switch (r_cleanup_cmd_fsm) { + + case CLEANUP_CMD_IDLE: p_vci_ini_c.cmdval = false; - p_vci_ini_c.rspack = true; p_vci_ini_c.address = 0; p_vci_ini_c.trdid = 0; @@ -6162,6 +6248,40 @@ break; + case CLEANUP_CMD_DATA: + p_vci_ini_c.cmdval = true; + p_vci_ini_c.address = r_dcache_cleanup_line.read() * (m_dcache_words<<2); + p_vci_ini_c.trdid = 0; // data cleanup + p_vci_ini_c.wdata = 0; + p_vci_ini_c.be = 0; + p_vci_ini_c.plen = 4; + p_vci_ini_c.cmd = vci_param::CMD_WRITE; + p_vci_ini_c.pktid = 0; + p_vci_ini_c.srcid = m_srcid_c; + p_vci_ini_c.cons = false; + p_vci_ini_c.wrap = false; + p_vci_ini_c.contig = false; + p_vci_ini_c.clen = 0; + p_vci_ini_c.cfixed = false; + p_vci_ini_c.eop = true; + break; + + case CLEANUP_CMD_INS: + p_vci_ini_c.cmdval = true; + p_vci_ini_c.address = r_icache_cleanup_line.read() * (m_icache_words<<2); + p_vci_ini_c.trdid = 1; // ins cleanup + p_vci_ini_c.wdata = 0; + p_vci_ini_c.be = 0; + p_vci_ini_c.plen = 4; + p_vci_ini_c.cmd = vci_param::CMD_WRITE; + p_vci_ini_c.pktid = 0; + p_vci_ini_c.srcid = m_srcid_c; + p_vci_ini_c.cons = false; + p_vci_ini_c.wrap = false; + p_vci_ini_c.contig = false; + p_vci_ini_c.clen = 0; + p_vci_ini_c.cfixed = false; + p_vci_ini_c.eop = true; + break; } // end switch r_vci_cmd_cleanup_fsm - // VCI_TGT