Changeset 149 for trunk/modules/vci_vdspin_target_wrapper/caba
- Timestamp:
- May 2, 2011, 9:19:14 AM (14 years ago)
- Location:
- trunk/modules/vci_vdspin_target_wrapper/caba/source
- Files:
-
- 2 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/modules/vci_vdspin_target_wrapper/caba/source/include/vci_vdspin_target_wrapper.h
r148 r149 69 69 CMD_BROADCAST, 70 70 CMD_RW, 71 CMD_READ, 71 72 CMD_WDATA, 72 73 }; … … 100 101 sc_core::sc_signal<sc_uint<dspin_cmd_width> > r_cmd_buf1; 101 102 sc_core::sc_signal<int> r_rsp_fsm; 103 sc_core::sc_signal<size_t> r_flit_count; 102 104 103 105 // fifos cmd and rsp … … 108 110 void transition(); 109 111 void genMoore(); 112 113 public: 114 void print_trace(); 110 115 111 116 }; -
trunk/modules/vci_vdspin_target_wrapper/caba/source/src/vci_vdspin_target_wrapper.cpp
r148 r149 102 102 103 103 // r_rsp_fsm, rsp_fifo_write and rsp_fifo_data 104 rsp_fifo_write = false; // default value 105 104 106 switch(r_rsp_fsm) { 105 107 case RSP_IDLE: // write first DSPIN flit into rsp_fifo … … 123 125 } 124 126 } 125 else126 {127 rsp_fifo_write = false;128 }129 127 break; 130 128 } … … 140 138 r_rsp_fsm = RSP_IDLE; 141 139 } 142 }143 else144 {145 rsp_fifo_write = false;146 140 } 147 141 break; … … 171 165 // - A N+2 flits DSPIN write command is translated 172 166 // to a N flits VCI write command. 173 // The VCI flits are sent in the CMD_R W, CMD_WDATA167 // The VCI flits are sent in the CMD_READ, CMD_WDATA 174 168 // & CMD_BROADCAST states. 175 169 // The r_cmd_buf0 et r_cmd_buf1 buffers are used to store … … 182 176 183 177 // r_cmd_fsm, cmd_fifo_read 178 cmd_fifo_read = false; // default value 179 184 180 switch(r_cmd_fsm) { 185 181 case CMD_IDLE: 186 182 { 187 if( r_fifo_cmd.rok() && p_vci.cmdack)183 if( r_fifo_cmd.rok() ) 188 184 { 189 185 bool is_broadcast = ( (r_fifo_cmd.read() & 0x1) == 0x1); 190 186 191 187 cmd_fifo_read = true; 192 r_cmd_buf0 = r_fifo_cmd.read(); 188 r_cmd_buf0 = r_fifo_cmd.read(); // save address 193 189 if ( is_broadcast ) r_cmd_fsm = CMD_BROADCAST; 194 190 else r_cmd_fsm = CMD_RW; 195 191 } 196 else197 {198 cmd_fifo_read = false;199 }200 192 break; 201 193 } … … 207 199 r_cmd_fsm = CMD_IDLE; 208 200 } 209 else210 {211 cmd_fifo_read = false;212 }213 201 break; 214 202 } 215 203 case CMD_RW: 216 204 { 217 if( r_fifo_cmd.rok() && p_vci.cmdack)205 if( r_fifo_cmd.rok() ) 218 206 { 219 207 cmd_fifo_read = true; 220 if ( (r_fifo_cmd.read() & 0x8000000000) ) // read command 221 { 222 r_cmd_fsm = CMD_IDLE; 223 } 224 else // write command 225 { 226 r_cmd_fsm = CMD_WDATA; 227 r_cmd_buf1 = r_fifo_cmd.read(); 228 } 208 r_cmd_buf1 = r_fifo_cmd.read(); // save command parameters 209 // read command if EOP 210 if ( (r_fifo_cmd.read() & 0x8000000000) ) r_cmd_fsm = CMD_READ; 211 else r_cmd_fsm = CMD_WDATA; 212 r_flit_count = 0; 229 213 } 230 else231 {232 cmd_fifo_read = false;233 }234 214 break; 235 215 } 216 case CMD_READ: 217 { 218 if ( p_vci.cmdack.read() ) r_cmd_fsm = CMD_IDLE; 219 break; 220 } 236 221 case CMD_WDATA: 237 222 { 238 if( r_fifo_cmd.rok() && p_vci.cmdack ) 239 { 223 if( r_fifo_cmd.rok() && p_vci.cmdack.read() ) 224 { 225 if ( (r_cmd_buf1.read() & 0x0000200000) == 0 ) r_flit_count = r_flit_count + 1; 240 226 cmd_fifo_read = true; 241 227 if ( (r_fifo_cmd.read() & 0x8000000000) ) r_cmd_fsm = CMD_IDLE; 242 228 } 243 else244 {245 cmd_fifo_read = false;246 }247 229 break; 248 230 } … … 264 246 265 247 // VCI CMD interface 266 if ( r_cmd_fsm.read() == CMD_IDLE)248 if ( (r_cmd_fsm.read() == CMD_IDLE) || (r_cmd_fsm.read() == CMD_RW) ) 267 249 { 268 250 p_vci.cmdval = false; … … 272 254 if ( r_fifo_cmd.rok() ) 273 255 { 256 sc_uint<dspin_cmd_width> minmax = r_cmd_buf0.read() & 0x7FFFF80000; 257 if ( vci_param::N == 40 ) minmax = (minmax << 1); 258 else minmax = (minmax >> (39 - vci_param::N) ); 274 259 p_vci.cmdval = true; 275 p_vci.address = (sc_uint<vci_param::N>) ((r_cmd_buf0.read() & 0x7FFFF80000) << 1)| 0x3;260 p_vci.address = (sc_uint<vci_param::N>)minmax | 0x3; 276 261 p_vci.cmd = vci_param::CMD_WRITE; 277 262 p_vci.wdata = (sc_uint<8*vci_param::B>)(r_fifo_cmd.read() & 0x00FFFFFFFF); … … 281 266 p_vci.pktid = 0; 282 267 p_vci.plen = vci_param::B; 268 p_vci.contig = true; 269 p_vci.cons = false; 283 270 p_vci.eop = true; 284 271 } … … 288 275 } 289 276 } 290 else if ( r_cmd_fsm.read() == CMD_R W ) // VCI read if eop277 else if ( r_cmd_fsm.read() == CMD_READ ) // VCI CMD read 291 278 { 292 if ( r_fifo_cmd.rok() & ((r_fifo_cmd.read() & 0x8000000000) == 0x8000000000) ) 293 { 294 p_vci.cmdval = true; 295 p_vci.address = (sc_uint<vci_param::N>)((r_cmd_buf0.read() & 0x7FFFFFFFFE) << 1); 296 p_vci.cmd = (sc_uint<2>)((r_fifo_cmd.read() & 0x0001800000) >> 23); 297 p_vci.wdata = 0; 298 p_vci.be = (sc_uint<vci_param::B>)((r_fifo_cmd.read() & 0x000000001E) >> 1); 299 p_vci.srcid = (sc_uint<vci_param::S>)((r_fifo_cmd.read() & 0x7FFE000000) >> 25); 300 p_vci.trdid = (sc_uint<vci_param::T>)((r_fifo_cmd.read() & 0x0000001FE0) >> 5); 301 p_vci.pktid = 0; 302 p_vci.plen = (sc_uint<vci_param::K>)((r_fifo_cmd.read() & 0x00001FE000) >> 13); 303 p_vci.eop = true; 304 } 305 else 306 { 307 p_vci.cmdval = false; 308 } 279 sc_uint<vci_param::N> address; 280 if ( vci_param::N == 40 ) address = (r_cmd_buf0.read() << 1); 281 else address = (r_cmd_buf0.read() >> (39 - vci_param::N) ); 282 p_vci.cmdval = true; 283 p_vci.address = address; 284 p_vci.cmd = (sc_uint<2>)((r_cmd_buf1.read() & 0x0001800000) >> 23); 285 p_vci.wdata = 0; 286 p_vci.be = (sc_uint<vci_param::B>)((r_cmd_buf1.read() & 0x000000001E) >> 1); 287 p_vci.srcid = (sc_uint<vci_param::S>)((r_cmd_buf1.read() & 0x7FFE000000) >> 25); 288 p_vci.trdid = (sc_uint<vci_param::T>)((r_cmd_buf1.read() & 0x0000001FE0) >> 5); 289 p_vci.pktid = 0; 290 p_vci.plen = (sc_uint<vci_param::K>)((r_cmd_buf1.read() & 0x00001FE000) >> 13); 291 p_vci.contig = ((r_cmd_buf1.read() & 0x0000400000) != 0); 292 p_vci.cons = ((r_cmd_buf1.read() & 0x0000200000) != 0); 293 p_vci.eop = true; 309 294 } 310 else if ( r_cmd_fsm.read() == CMD_WDATA ) // VCI write 295 else if ( r_cmd_fsm.read() == CMD_WDATA ) // VCI write command 311 296 { 312 297 if ( r_fifo_cmd.rok() ) 313 298 { 299 sc_uint<vci_param::N> address; 300 if ( vci_param::N == 40 ) address = (r_cmd_buf0.read() << 1); 301 else address = (r_cmd_buf0.read() >> (39 - vci_param::N) ); 314 302 p_vci.cmdval = true; 315 p_vci.address = (sc_uint<vci_param::N>)((r_cmd_buf0.read() & 0x7FFFFFFFFE) << 1);303 p_vci.address = address + (r_flit_count.read()*vci_param::B); 316 304 p_vci.cmd = (sc_uint<2>)((r_cmd_buf1.read() & 0x0001800000) >> 23); 317 305 p_vci.wdata = (sc_uint<8*vci_param::B>)(r_fifo_cmd.read() & 0x00FFFFFFFF); … … 321 309 p_vci.pktid = 0; 322 310 p_vci.plen = (sc_uint<vci_param::K>)((r_cmd_buf1.read() & 0x00001FE000) >> 13); 311 p_vci.contig = ((r_cmd_buf1.read() & 0x0000400000) != 0); 312 p_vci.cons = ((r_cmd_buf1.read() & 0x0000200000) != 0); 323 313 p_vci.eop = ((r_fifo_cmd.read() & 0x8000000000) == 0x8000000000); 324 314 } … … 337 327 338 328 }; // end genMoore 329 330 ///////////////////////// 331 tmpl(void)::print_trace() 332 { 333 const char* cmd_str[] = { 334 "CMD_IDLE ", 335 "CMD_BROADCAST", 336 "CMD_RW ", 337 "CMD_READ ", 338 "CMD_WDATA ", 339 }; 340 const char* rsp_str[] = { 341 "RSP_IDLE ", 342 "RSP_READ ", 343 "RSP_WRITE ", 344 }; 345 std::cout << name() << " : " << cmd_str[r_cmd_fsm.read()] 346 << " | " << rsp_str[r_rsp_fsm.read()] 347 << " | fifo_cmd = " << r_fifo_cmd.filled_status() 348 << " | fifo_rsp = " << r_fifo_rsp.filled_status() 349 << std::endl; 350 } 339 351 340 352 }} // end namespace
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