Index: /trunk/modules/vci_vdspin_target_wrapper/caba/source/include/vci_vdspin_target_wrapper.h
===================================================================
--- /trunk/modules/vci_vdspin_target_wrapper/caba/source/include/vci_vdspin_target_wrapper.h	(revision 148)
+++ /trunk/modules/vci_vdspin_target_wrapper/caba/source/include/vci_vdspin_target_wrapper.h	(revision 149)
@@ -69,4 +69,5 @@
     CMD_BROADCAST,
     CMD_RW,
+    CMD_READ,
     CMD_WDATA,
     };
@@ -100,4 +101,5 @@
     sc_core::sc_signal<sc_uint<dspin_cmd_width>	>		r_cmd_buf1;
     sc_core::sc_signal<int>        				r_rsp_fsm;
+    sc_core::sc_signal<size_t>					r_flit_count;
 
     // fifos cmd and rsp
@@ -108,4 +110,7 @@
     void transition();
     void genMoore();
+
+public:
+    void print_trace();
 
 };
Index: /trunk/modules/vci_vdspin_target_wrapper/caba/source/src/vci_vdspin_target_wrapper.cpp
===================================================================
--- /trunk/modules/vci_vdspin_target_wrapper/caba/source/src/vci_vdspin_target_wrapper.cpp	(revision 148)
+++ /trunk/modules/vci_vdspin_target_wrapper/caba/source/src/vci_vdspin_target_wrapper.cpp	(revision 149)
@@ -102,4 +102,6 @@
 
 	// r_rsp_fsm, rsp_fifo_write and rsp_fifo_data
+        rsp_fifo_write = false;		// default value
+
 	switch(r_rsp_fsm) {
 	    case RSP_IDLE:		// write first DSPIN flit into rsp_fifo
@@ -123,8 +125,4 @@
                     }
 		}
-                else
-                {
-                    rsp_fifo_write = false;
-                }
 	 	break;
             }
@@ -140,8 +138,4 @@
                         r_rsp_fsm = RSP_IDLE;
                     }
-                }
-                else
-                {
-                    rsp_fifo_write = false;
                 }
                 break;
@@ -171,5 +165,5 @@
         // - A N+2 flits DSPIN write command is translated
         //   to a N flits VCI write command. 
-        // The VCI flits are sent in the CMD_RW, CMD_WDATA 
+        // The VCI flits are sent in the CMD_READ, CMD_WDATA 
         // & CMD_BROADCAST states. 
         // The r_cmd_buf0 et r_cmd_buf1 buffers are used to store
@@ -182,20 +176,18 @@
 
 	// r_cmd_fsm, cmd_fifo_read
+        cmd_fifo_read = false; 		// default value
+
 	switch(r_cmd_fsm) {
 	    case CMD_IDLE:
             {
-		if( r_fifo_cmd.rok() && p_vci.cmdack )
+		if( r_fifo_cmd.rok() )
                 {
                     bool is_broadcast = ( (r_fifo_cmd.read() & 0x1) == 0x1);
 
 		    cmd_fifo_read = true;
-                    r_cmd_buf0    = r_fifo_cmd.read();
+                    r_cmd_buf0    = r_fifo_cmd.read(); 		// save address
                     if ( is_broadcast ) r_cmd_fsm = CMD_BROADCAST;
                     else		r_cmd_fsm = CMD_RW;
 		}
-                else
-                {
-		    cmd_fifo_read = false;
-                }
 		break;
             }
@@ -207,42 +199,32 @@
                     r_cmd_fsm = CMD_IDLE;
                 }
-                else
-                {
-		    cmd_fifo_read = false;
-                }
                 break;
             }
             case CMD_RW:
             {
-		if( r_fifo_cmd.rok() && p_vci.cmdack )
+		if( r_fifo_cmd.rok() )
                 {
 		    cmd_fifo_read = true;
-                    if ( (r_fifo_cmd.read() & 0x8000000000) )   // read command
-                    {
-                        r_cmd_fsm = CMD_IDLE;
-                    }
-                    else					// write command
-                    {
-                        r_cmd_fsm  = CMD_WDATA;
-                        r_cmd_buf1 = r_fifo_cmd.read();
-                    }
+                    r_cmd_buf1 = r_fifo_cmd.read();		// save command parameters
+                    // read command if EOP
+                    if ( (r_fifo_cmd.read() & 0x8000000000) )   r_cmd_fsm = CMD_READ;
+                    else					r_cmd_fsm = CMD_WDATA;
+                    r_flit_count = 0;
 		}
-                else
-                {
-		    cmd_fifo_read = false;
-                }
 		break;
             }
+            case CMD_READ:
+            {
+                if ( p_vci.cmdack.read() ) r_cmd_fsm = CMD_IDLE;
+                break;
+            }
             case CMD_WDATA:
             {
-		if( r_fifo_cmd.rok() && p_vci.cmdack )
-                {
+		if( r_fifo_cmd.rok() && p_vci.cmdack.read() )
+                {
+                    if ( (r_cmd_buf1.read() & 0x0000200000) == 0 ) r_flit_count = r_flit_count + 1;
 		    cmd_fifo_read = true;
                     if ( (r_fifo_cmd.read() & 0x8000000000) ) 	r_cmd_fsm = CMD_IDLE;
 		}
-                else
-                {
-		    cmd_fifo_read = false;
-                }
                 break;
             }
@@ -264,5 +246,5 @@
 
 	// VCI CMD interface
-	if ( r_cmd_fsm.read() == CMD_IDLE )
+	if ( (r_cmd_fsm.read() == CMD_IDLE) || (r_cmd_fsm.read() == CMD_RW) )
         {
             p_vci.cmdval = false;
@@ -272,6 +254,9 @@
             if ( r_fifo_cmd.rok() )
             {
+                sc_uint<dspin_cmd_width>  minmax = r_cmd_buf0.read() & 0x7FFFF80000;
+                if ( vci_param::N == 40 ) minmax = (minmax << 1);
+                else			  minmax = (minmax >> (39 - vci_param::N) ); 
                 p_vci.cmdval  = true;
-	        p_vci.address = (sc_uint<vci_param::N>)((r_cmd_buf0.read() & 0x7FFFF80000) << 1) | 0x3;
+	        p_vci.address = (sc_uint<vci_param::N>)minmax | 0x3;
                 p_vci.cmd     = vci_param::CMD_WRITE;
                 p_vci.wdata   = (sc_uint<8*vci_param::B>)(r_fifo_cmd.read() & 0x00FFFFFFFF);
@@ -281,4 +266,6 @@
 		p_vci.pktid   = 0;
                 p_vci.plen    = vci_param::B;
+                p_vci.contig  = true;
+                p_vci.cons    = false;
                 p_vci.eop     = true;
             }
@@ -288,30 +275,31 @@
             }
         }
-        else if ( r_cmd_fsm.read() == CMD_RW )		// VCI read if eop
+        else if ( r_cmd_fsm.read() == CMD_READ )	// VCI CMD read
         {            
-            if ( r_fifo_cmd.rok() & ((r_fifo_cmd.read() & 0x8000000000) == 0x8000000000) )
-            {
-                p_vci.cmdval  = true;
-	        p_vci.address = (sc_uint<vci_param::N>)((r_cmd_buf0.read() & 0x7FFFFFFFFE) << 1);
-                p_vci.cmd     = (sc_uint<2>)((r_fifo_cmd.read()            & 0x0001800000) >> 23);
-		p_vci.wdata   = 0;
-                p_vci.be      = (sc_uint<vci_param::B>)((r_fifo_cmd.read() & 0x000000001E) >> 1);
-                p_vci.srcid   = (sc_uint<vci_param::S>)((r_fifo_cmd.read() & 0x7FFE000000) >> 25);
-                p_vci.trdid   = (sc_uint<vci_param::T>)((r_fifo_cmd.read() & 0x0000001FE0) >> 5);
-		p_vci.pktid   = 0;
-                p_vci.plen    = (sc_uint<vci_param::K>)((r_fifo_cmd.read() & 0x00001FE000) >> 13);
-                p_vci.eop     = true;
-            }
-            else
-            {
-            	p_vci.cmdval = false;
-            }
+            sc_uint<vci_param::N> address;
+            if ( vci_param::N == 40 ) address = (r_cmd_buf0.read() << 1);
+            else                      address = (r_cmd_buf0.read() >> (39 - vci_param::N) ); 
+            p_vci.cmdval  = true;
+	    p_vci.address = address;
+            p_vci.cmd     = (sc_uint<2>)((r_cmd_buf1.read()            & 0x0001800000) >> 23);
+	    p_vci.wdata   = 0;
+            p_vci.be      = (sc_uint<vci_param::B>)((r_cmd_buf1.read() & 0x000000001E) >> 1);
+            p_vci.srcid   = (sc_uint<vci_param::S>)((r_cmd_buf1.read() & 0x7FFE000000) >> 25);
+            p_vci.trdid   = (sc_uint<vci_param::T>)((r_cmd_buf1.read() & 0x0000001FE0) >> 5);
+	    p_vci.pktid   = 0;
+            p_vci.plen    = (sc_uint<vci_param::K>)((r_cmd_buf1.read() & 0x00001FE000) >> 13);
+            p_vci.contig  = ((r_cmd_buf1.read() & 0x0000400000) != 0);
+            p_vci.cons    = ((r_cmd_buf1.read() & 0x0000200000) != 0);
+            p_vci.eop     = true;
 	}
-        else if ( r_cmd_fsm.read() == CMD_WDATA )	// VCI write
+        else if ( r_cmd_fsm.read() == CMD_WDATA )	// VCI write command
         {
             if ( r_fifo_cmd.rok() )  
             {
+                sc_uint<vci_param::N> address;
+                if ( vci_param::N == 40 ) address = (r_cmd_buf0.read() << 1);
+                else                      address = (r_cmd_buf0.read() >> (39 - vci_param::N) ); 
                 p_vci.cmdval  = true;
-	        p_vci.address = (sc_uint<vci_param::N>)((r_cmd_buf0.read()   & 0x7FFFFFFFFE) << 1);
+	        p_vci.address = address + (r_flit_count.read()*vci_param::B);
                 p_vci.cmd     = (sc_uint<2>)((r_cmd_buf1.read()              & 0x0001800000) >> 23);
 		p_vci.wdata   = (sc_uint<8*vci_param::B>)(r_fifo_cmd.read()  & 0x00FFFFFFFF);
@@ -321,4 +309,6 @@
 		p_vci.pktid   = 0;
                 p_vci.plen    = (sc_uint<vci_param::K>)((r_cmd_buf1.read() & 0x00001FE000) >> 13);
+                p_vci.contig  = ((r_cmd_buf1.read() & 0x0000400000) != 0);
+                p_vci.cons    = ((r_cmd_buf1.read() & 0x0000200000) != 0);
 		p_vci.eop     = ((r_fifo_cmd.read() & 0x8000000000) == 0x8000000000); 
             }
@@ -337,4 +327,26 @@
 
 }; // end genMoore
+
+/////////////////////////
+tmpl(void)::print_trace()
+{
+    const char* cmd_str[] = {
+    "CMD_IDLE     ",
+    "CMD_BROADCAST",
+    "CMD_RW       ",
+    "CMD_READ     ",
+    "CMD_WDATA    ",
+    };
+    const char* rsp_str[] = {
+    "RSP_IDLE     ",
+    "RSP_READ     ",
+    "RSP_WRITE    ",
+    };
+    std::cout << name() << " : " << cmd_str[r_cmd_fsm.read()]
+                        << " | " << rsp_str[r_rsp_fsm.read()] 
+                        << " | fifo_cmd = " << r_fifo_cmd.filled_status()
+                        << " | fifo_rsp = " << r_fifo_rsp.filled_status()
+			<< std::endl;
+}
 
 }} // end namespace