Changeset 168
- Timestamp:
- May 11, 2011, 7:56:56 PM (14 years ago)
- File:
-
- 1 edited
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trunk/platforms/tsarv4_generic_xbar/tsarv4_cluster_xbar/caba/source/src/tsarv4_cluster_xbar.cpp
r167 r168 94 94 sproc.str().c_str(), 95 95 cluster_id*nprocs + p, 96 mtd, mtc, 96 mtd, // Mapping Table Direct 97 mtc, // Mapping Table Coherence 97 98 IntTab(cluster_id,p), // SRCID_D 98 99 IntTab(cluster_id,p), // SRCID_C 99 100 IntTab(cluster_id,p), // TGTID_C 101 1, // single core 102 1, // single dcache 100 103 l1_i_ways,l1_i_sets,16, // ICACHE size 101 104 l1_d_ways,l1_d_sets,16, // DCACHE size 102 16, // WBUF width103 1// WBUF depth105 4, // WBUF width 106 4 // WBUF depth 104 107 ); 105 108 } … … 388 391 proc[p]->p_vci_ini_c (signal_vci_ini_c_proc[p]); 389 392 proc[p]->p_vci_tgt (signal_vci_tgt_c_proc[p]); 390 proc[p]->p_irq[0] (signal_proc_it[p]);393 proc[p]->p_irq[0][0] (signal_proc_it[p]); 391 394 for ( size_t j = 1 ; j < 6 ; j++ ) 392 395 { 393 proc[p]->p_irq[ j] (signal_false);396 proc[p]->p_irq[0][j] (signal_false); 394 397 } 395 398 }
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