Index: /trunk/platforms/tsarv4_generic_ring/tsarv4_cluster_ring/caba/source/include/tsarv4_cluster_ring.h
===================================================================
--- /trunk/platforms/tsarv4_generic_ring/tsarv4_cluster_ring/caba/source/include/tsarv4_cluster_ring.h	(revision 168)
+++ /trunk/platforms/tsarv4_generic_ring/tsarv4_cluster_ring/caba/source/include/tsarv4_cluster_ring.h	(revision 169)
@@ -35,4 +35,6 @@
 #include "mapping_table.h"
 #include "mips32.h"
+#include "vci_mem_cache_v4.h"
+#include "vci_cc_xcache_wrapper_v4.h"
 #include "vci_simple_ram.h"
 #include "vci_xicu.h"
@@ -43,6 +45,4 @@
 #include "vci_framebuffer.h"
 #include "vci_multi_dma.h"
-#include "vci_mem_cache_v4.h"
-#include "vci_cc_xcache_wrapper_v4.h"
 
 namespace soclib {
Index: /trunk/platforms/tsarv4_generic_ring/tsarv4_cluster_ring/caba/source/src/tsarv4_cluster_ring.cpp
===================================================================
--- /trunk/platforms/tsarv4_generic_ring/tsarv4_cluster_ring/caba/source/src/tsarv4_cluster_ring.cpp	(revision 168)
+++ /trunk/platforms/tsarv4_generic_ring/tsarv4_cluster_ring/caba/source/src/tsarv4_cluster_ring.cpp	(revision 169)
@@ -98,4 +98,5 @@
                 IntTab(cluster_id,p),    	// SRCID_C
                 IntTab(cluster_id,p),    	// TGTID_C
+		1,1,
                 l1_i_ways,l1_i_sets,16,  	// ICACHE size
                 l1_d_ways,l1_d_sets,16,      	// DCACHE size
@@ -335,8 +336,8 @@
             proc[p]->p_vci_ini_c        	(signal_vci_ini_c_proc[p]);
             proc[p]->p_vci_tgt          	(signal_vci_tgt_c_proc[p]);
-            proc[p]->p_irq[0]           	(signal_proc_it[p]);
+            proc[p]->p_irq[0][0]           	(signal_proc_it[p]);
             for ( size_t j = 1 ; j < 6 ; j++ )
             {
-                proc[p]->p_irq[j]       	(signal_false);
+                proc[p]->p_irq[0][j]       	(signal_false);
             }
         }