Index: trunk/modules/vci_mem_cache_v1/caba/source/src/vci_mem_cache_v1.cpp
===================================================================
--- trunk/modules/vci_mem_cache_v1/caba/source/src/vci_mem_cache_v1.cpp	(revision 32)
+++ trunk/modules/vci_mem_cache_v1/caba/source/src/vci_mem_cache_v1.cpp	(revision 192)
@@ -29,9 +29,9 @@
 #include "../include/vci_mem_cache_v1.h"
 
-#define VHDL_ACCURATE
-
 //#define IDEBUG
 //#define DEBUG_VCI_MEM_CACHE 2
 #define RANDOMIZE_SC
+#define VHDL_ACCURATE
+//#define DEBUG_CLEANUP
 
 namespace soclib { namespace caba {
@@ -109,5 +109,8 @@
     "WRITE_DIR_INVAL",
     "WRITE_INVAL",
-    "WRITE_XRAM_SEND",
+    "WRITE_XRAM_SEND"
+#ifdef VHDL_ACCURATE
+    , "WRITE_RESET"
+#endif
   };
   const char *ixr_rsp_fsm_str[] = {
@@ -282,4 +285,5 @@
       assert(nways <= 32);
 
+      m_broadcast_address = 0x3 | (0x7C1F << (vci_param::N-20));
 
       // Get the segments associated to the MemCache 
@@ -422,8 +426,16 @@
       r_init_rsp_fsm 	= INIT_RSP_IDLE;
       r_read_fsm        = READ_IDLE;
+
+#ifdef VHDL_ACCURATE
+      r_write_fsm       = WRITE_RESET;
+      r_alloc_dir_fsm   = ALLOC_DIR_WRITE;
+#else
       r_write_fsm       = WRITE_IDLE;
+      r_alloc_dir_fsm   = ALLOC_DIR_READ;
+#endif
+
       r_llsc_fsm        = LLSC_IDLE;
-      r_cleanup_fsm 	= CLEANUP_IDLE;
-      r_alloc_dir_fsm   = ALLOC_DIR_READ;
+      r_cleanup_fsm 	  = CLEANUP_IDLE;
+
       r_alloc_trt_fsm   = ALLOC_TRT_READ;
       r_alloc_upt_fsm   = ALLOC_UPT_WRITE;
@@ -433,5 +445,9 @@
 
       //  Initializing Tables
+      //  The Directory is initialized in the WRITE RESET state
+      //  in the VHDL ACCURATE model
+#ifndef VHDL_ACCURATE
       m_cache_directory.init();
+#endif
       m_atomic_tab.init();	
       m_transaction_tab.init();
@@ -486,4 +502,8 @@
 
       r_copies_limit        = 3;
+
+      // Initialize WRITE FSM registers
+      r_write_way     = 0;
+      r_write_address	= 0;
 
       // Activity counters
@@ -912,5 +932,5 @@
           if ( r_alloc_trt_fsm.read() == ALLOC_TRT_READ ) {
 #ifdef IDEBUG
-	std::cout << sc_time_stamp() << " " << name() << " READ_TRT_LOCK " << std::endl;
+            std::cout << sc_time_stamp() << " " << name() << " READ_TRT_LOCK " << std::endl;
 #endif
             size_t index = 0;
@@ -943,7 +963,7 @@
                 std::vector<data_t>(m_words,0));
 #ifdef IDEBUG
-	std::cout << sc_time_stamp() << " " << name() << " READ_TRT_SET transaction table : " << std::endl;
-	for(size_t i = 0 ; i < m_transaction_tab.size() ; i++)
-	  m_transaction_tab.print(i);
+                std::cout << sc_time_stamp() << " " << name() << " READ_TRT_SET transaction table : " << std::endl;
+                for(size_t i = 0 ; i < m_transaction_tab.size() ; i++)
+                  m_transaction_tab.print(i);
 #endif
 
@@ -995,5 +1015,67 @@
 
     switch ( r_write_fsm.read() ) {
-
+#ifdef VHDL_ACCURATE
+      case WRITE_RESET: 
+        {
+          r_write_word_index	= 0;
+          r_write_word_count	= 0;
+
+          for (int i=0; i < m_words ; i++) {
+            r_write_data[i]	= 0;
+          }
+
+          r_write_srcid	      = 0;
+          r_write_trdid	      = 0;
+          r_write_pktid	      = 0;
+          r_write_is_cnt      = false;
+          r_write_lock        = false;
+          r_write_d_copies    = 0;
+          r_write_i_copies    = 0;
+          r_write_count       = 0;
+          r_write_tag         = 0; 
+
+          if ( r_alloc_dir_fsm.read() == ALLOC_DIR_WRITE ) {
+          
+            r_write_way = (r_write_way.read()+1);
+            if(r_write_way.read() == (m_ways-1)) {
+              r_write_way     = 0;
+              
+#define L2 soclib::common::uint32_log2
+              r_write_address	= r_write_address.read() + (1<<(L2(m_words)+2));
+#undef L2
+            }
+
+
+            DirectoryEntry entry;
+            entry.valid	   = false;
+            entry.dirty	   = false;
+            entry.tag	     = 0;
+            entry.is_cnt   = false;
+            entry.lock	   = false;
+            entry.d_copies = 0;
+            entry.i_copies = 0;
+            entry.count    = 0;
+
+            size_t set	   = m_y[(vci_addr_t)(r_write_address.read())];
+            size_t way	   = r_write_way.read();
+
+            m_cache_directory.write(set, way, entry);
+
+#ifdef IDEBUG
+            std::cout  << "Initialize directory entry: "  << std::endl
+                  << "WRITE FSM: Way     = "              << way << std::endl
+                  << "WRITE FSM: Set     = "              << set << std::endl
+                  << "WRITE FSM: Address = "          << r_write_address.read()
+                  << std::endl;
+#endif
+            
+
+            if((set == (m_sets-1)) && (way == (m_ways-1))) {
+              r_write_fsm = WRITE_IDLE;
+            }
+          }
+          break;
+        }
+#endif
       ////////////////
       case WRITE_IDLE:	// copy first word of a write burst in local buffer	
@@ -1772,4 +1854,9 @@
               TransactionTabEntry    trt_entry(m_transaction_tab.read(index));	
 
+#ifdef IDEBUG
+              std::cout << "TRANSACTION ENTRY DEBUG" << std::endl;
+              trt_entry.print();
+#endif
+
               r_xram_rsp_trt_buf.copy(trt_entry);  // TRT entry local buffer
 
@@ -2044,9 +2131,13 @@
       ///////////////////
       case CLEANUP_IDLE:
-        {
-
+        {        
           if ( p_vci_tgt_cleanup.cmdval.read() ) {
+            
             assert( (p_vci_tgt_cleanup.srcid.read() < m_initiators) &&
                 "VCI_MEM_CACHE error in VCI_MEM_CACHE in the CLEANUP network : The received SRCID is larger than 31");
+
+            addr_t nline_addr = ( ((addr_t) p_vci_tgt_cleanup.be.read()) << 32) 
+                                | ((addr_t) p_vci_tgt_cleanup.wdata.read());
+
             bool reached = false;
             for ( size_t index = 0 ; index < ncseg && !reached ; index++ ){
@@ -2056,10 +2147,10 @@
             }
             if ( (p_vci_tgt_cleanup.cmd.read() == vci_param::CMD_WRITE) &&
-                (((addr_t)(p_vci_tgt_cleanup.address.read())) != BROADCAST_ADDR) &&
+                (((addr_t)(p_vci_tgt_cleanup.address.read())) != m_broadcast_address) &&
                 reached) {
 
               m_cpt_cleanup++;
 
-              r_cleanup_nline      = (addr_t)(m_nline[(vci_addr_t)(p_vci_tgt_cleanup.address.read())]) ;
+              r_cleanup_nline      = nline_addr;
               r_cleanup_srcid      = p_vci_tgt_cleanup.srcid.read();
               r_cleanup_trdid      = p_vci_tgt_cleanup.trdid.read();
@@ -2070,4 +2161,17 @@
 #endif
               r_cleanup_fsm        = CLEANUP_DIR_LOCK;
+
+#ifdef DEBUG_CLEANUP
+              std::cout << "Cleanup Received" << std::endl;
+              std::cout << "MemCache address: ";
+              std::cout << std::hex << p_vci_tgt_cleanup.address.read();
+              std::cout << std::endl;
+              std::cout << "SrcId: ";
+              std::cout << std::hex << p_vci_tgt_cleanup.srcid.read();
+              std::cout << std::endl;
+              std::cout << "Cache Line Address: ";
+              std::cout << std::hex << nline_addr;
+              std::cout << std::endl;
+#endif
             }
           }
@@ -2083,5 +2187,5 @@
               // Read the directory
               size_t way = 0;
-	          addr_t cleanup_address = r_cleanup_nline.read() * m_words * 4;
+              addr_t cleanup_address = r_cleanup_nline.read() * m_words * 4;
               DirectoryEntry entry = m_cache_directory.read(cleanup_address , way);
 #ifdef IDEBUG
@@ -2426,5 +2530,6 @@
             cmd_llsc_fifo_get		= true;
             r_llsc_to_tgt_rsp_req	= true;
-            r_llsc_to_tgt_rsp_data	= 1;
+            //r_llsc_to_tgt_rsp_data	= 1;
+            r_llsc_to_tgt_rsp_data	= 1; // FIXME: SC done inverted
             r_llsc_to_tgt_rsp_srcid	= m_cmd_llsc_srcid_fifo.read();
             r_llsc_to_tgt_rsp_trdid	= m_cmd_llsc_trdid_fifo.read();
@@ -2440,5 +2545,6 @@
             cmd_llsc_fifo_get	    = true;
             r_llsc_to_tgt_rsp_req	= true;
-            r_llsc_to_tgt_rsp_data	= 0;
+            //r_llsc_to_tgt_rsp_data	= 0;
+            r_llsc_to_tgt_rsp_data	= 0; // FIXME: SC done inverted
             r_llsc_to_tgt_rsp_srcid	= m_cmd_llsc_srcid_fifo.read();
             r_llsc_to_tgt_rsp_trdid	= m_cmd_llsc_trdid_fifo.read();
@@ -2998,5 +3104,9 @@
         /////////////////////
       case ALLOC_DIR_WRITE:
-        if ( ( (r_write_fsm.read() != WRITE_DIR_LOCK)     &&
+        if (( 
+#ifdef VHDL_ACCURATE
+              (r_write_fsm.read() != WRITE_RESET)     &&
+#endif
+              (r_write_fsm.read() != WRITE_DIR_LOCK)     &&
               (r_write_fsm.read() != WRITE_TRT_LOCK)     &&
               (r_write_fsm.read() != WRITE_DIR_HIT_READ) &&
@@ -3464,12 +3574,17 @@
         p_vci_ini.cmdval  = true;
         if(r_xram_rsp_to_init_cmd_brdcast.read())
-          p_vci_ini.address = BROADCAST_ADDR;
+          p_vci_ini.address = m_broadcast_address;
         else {
           if(r_init_cmd_inst.read()) {
-            p_vci_ini.address = (addr_t)(m_coherence_table[r_init_cmd_target.read()]+8);
+            #define L2 soclib::common::uint32_log2
+            p_vci_ini.address = (addr_t)((r_init_cmd_target.read()<<(vci_param::N - L2(m_initiators))) + 8);
+            //p_vci_ini.address = (addr_t)(m_coherence_table[r_init_cmd_target.read()]+8);
           } else {
-            p_vci_ini.address = (addr_t)(m_coherence_table[r_init_cmd_target.read()]);
-          }
-        }
+            #define L2 soclib::common::uint32_log2
+            p_vci_ini.address = (addr_t)((r_init_cmd_target.read()<<(vci_param::N - L2(m_initiators))));
+            //p_vci_ini.address = (addr_t)(m_coherence_table[r_init_cmd_target.read()]);
+          }
+        }
+
         p_vci_ini.wdata   = (uint32_t)r_xram_rsp_to_init_cmd_nline.read();
         p_vci_ini.be      = ((r_xram_rsp_to_init_cmd_nline.read() >> 32) & 0x3);
@@ -3479,6 +3594,7 @@
         break;
       case INIT_CMD_BRDCAST:
+
         p_vci_ini.cmdval  = true;
-        p_vci_ini.address = BROADCAST_ADDR;
+        p_vci_ini.address = m_broadcast_address;
         p_vci_ini.wdata   = (addr_t)r_write_to_init_cmd_nline.read();
         p_vci_ini.be      = ((r_write_to_init_cmd_nline.read() >> 32) & 0x3);
@@ -3490,8 +3606,15 @@
         p_vci_ini.cmdval  = true;
         if(r_init_cmd_inst.read()){
-          p_vci_ini.address = (addr_t)(m_coherence_table[r_init_cmd_target.read()] + 12);
+          #define L2 soclib::common::uint32_log2
+          p_vci_ini.address = (addr_t)((r_init_cmd_target.read()<<(vci_param::N - L2(m_initiators))) + 12);
+          #undef L2
+          //p_vci_ini.address = (addr_t)(m_coherence_table[r_init_cmd_target.read()] + 12);
         } else {
-          p_vci_ini.address = (addr_t)(m_coherence_table[r_init_cmd_target.read()] + 4);
-        }
+          #define L2 soclib::common::uint32_log2
+          p_vci_ini.address = (addr_t)((r_init_cmd_target.read()<<(vci_param::N - L2(m_initiators))) + 4);
+          #undef L2
+          //p_vci_ini.address = (addr_t)(m_coherence_table[r_init_cmd_target.read()] + 4);
+        }
+
         p_vci_ini.wdata   = (uint32_t)r_write_to_init_cmd_nline.read();
         p_vci_ini.be      = ((r_write_to_init_cmd_nline.read() >> 32 ) & 0x3);
@@ -3503,8 +3626,15 @@
         p_vci_ini.cmdval  = true;
         if(r_init_cmd_inst.read()){
-          p_vci_ini.address = (addr_t)(m_coherence_table[r_init_cmd_target.read()] + 12);
+          #define L2 soclib::common::uint32_log2
+          p_vci_ini.address = (addr_t)((r_init_cmd_target.read()<<(vci_param::N - L2(m_initiators))) + 12);
+          #undef L2
+          //p_vci_ini.address = (addr_t)(m_coherence_table[r_init_cmd_target.read()] + 12);
         } else {
-          p_vci_ini.address = (addr_t)(m_coherence_table[r_init_cmd_target.read()] + 4);
-        }
+          #define L2 soclib::common::uint32_log2
+          p_vci_ini.address = (addr_t)((r_init_cmd_target.read()<<(vci_param::N - L2(m_initiators))) + 4);
+          #undef L2
+          //p_vci_ini.address = (addr_t)(m_coherence_table[r_init_cmd_target.read()] + 4);
+        }
+
         p_vci_ini.wdata   = r_write_to_init_cmd_index.read();
         p_vci_ini.be      = 0xF;
@@ -3516,8 +3646,15 @@
         p_vci_ini.cmdval  = true;
         if(r_init_cmd_inst.read()){
-          p_vci_ini.address = (addr_t)(m_coherence_table[r_init_cmd_target.read()] + 12);
+          #define L2 soclib::common::uint32_log2
+          p_vci_ini.address = (addr_t)((r_init_cmd_target.read()<<(vci_param::N - L2(m_initiators))) + 12);
+          #undef L2
+          //p_vci_ini.address = (addr_t)(m_coherence_table[r_init_cmd_target.read()] + 12);
         } else {
-          p_vci_ini.address = (addr_t)(m_coherence_table[r_init_cmd_target.read()] + 4);
-        }
+          #define L2 soclib::common::uint32_log2
+          p_vci_ini.address = (addr_t)((r_init_cmd_target.read()<<(vci_param::N - L2(m_initiators))) + 4);
+          #undef L2
+          //p_vci_ini.address = (addr_t)(m_coherence_table[r_init_cmd_target.read()] + 4);
+        }
+
         p_vci_ini.wdata   = r_write_to_init_cmd_data[r_init_cmd_cpt.read() +
           r_write_to_init_cmd_index.read()].read();
@@ -3586,4 +3723,4 @@
 // End:
 
-// vim: filetype=cpp:expandtab:shiftwidth=4:tabstop=4:softtabstop=4
-
+// vim: filetype=cpp:expandtab:shiftwidth=2:tabstop=2
+
