Index: /trunk/modules/vci_cc_vcache_wrapper_v4/caba/source/src/vci_cc_vcache_wrapper_v4.cpp
===================================================================
--- /trunk/modules/vci_cc_vcache_wrapper_v4/caba/source/src/vci_cc_vcache_wrapper_v4.cpp	(revision 208)
+++ /trunk/modules/vci_cc_vcache_wrapper_v4/caba/source/src/vci_cc_vcache_wrapper_v4.cpp	(revision 209)
@@ -725,5 +725,4 @@
         m_debug_cleanup_fsm  	  = false;
 
-/*
         // activity counters
         m_cpt_dcache_data_read  = 0;
@@ -737,9 +736,7 @@
 
 	m_cpt_frz_cycles        = 0;
-        m_cpt_dcache_frz_cycles = 0;
 	m_cpt_total_cycles      = 0;
-
-        m_cpt_read              = 0;
-        m_cpt_write             = 0;
+	m_cpt_stop_simulation   = 0;
+
         m_cpt_data_miss         = 0;
         m_cpt_ins_miss          = 0;
@@ -792,7 +789,4 @@
     	m_cost_data_tlb_inval_frz = 0;         
 
-   	m_cpt_cc_update_data = 0;
-   	m_cpt_cc_inval_ins   = 0;
-   	m_cpt_cc_inval_data  = 0;
    	m_cpt_cc_broadcast   = 0;
 
@@ -822,4 +816,12 @@
         m_cost_dtlb_ll_dirty_transaction = 0;   
         m_cost_dtlb_sc_dirty_transaction = 0;    
+/* 
+        m_cpt_dcache_frz_cycles = 0;
+        m_cpt_read              = 0;
+        m_cpt_write             = 0;
+   	m_cpt_cc_update_data = 0;
+   	m_cpt_cc_inval_ins   = 0;
+   	m_cpt_cc_inval_data  = 0;
+  */
 
         for (uint32_t i=0; i<32 ; ++i) m_cpt_fsm_icache      [i]   = 0;
@@ -831,5 +833,4 @@
         for (uint32_t i=0; i<32 ; ++i) m_cpt_fsm_rsp_cleanup [i]   = 0;
 
-*/
         return;
     }
@@ -3869,5 +3870,5 @@
 m_cpt_dcache_data_read++;
 m_cpt_dcache_dir_read++;
-#endif;
+#endif
         assert( hit and "error in DCACHE_DIRTY_TLB_SET: the PTE should be in dcache" );