Index: /trunk/modules/vci_mem_cache_v4/caba/source/include/mem_cache_directory_v4.h
===================================================================
--- /trunk/modules/vci_mem_cache_v4/caba/source/include/mem_cache_directory_v4.h	(revision 282)
+++ /trunk/modules/vci_mem_cache_v4/caba/source/include/mem_cache_directory_v4.h	(revision 283)
@@ -7,5 +7,5 @@
 #include "arithmetics.h"
 
-#define L1_MULTI_CACHE 1
+#define L1_MULTI_CACHE 0
 //#define RANDOM_EVICTION
 
Index: /trunk/modules/vci_mem_cache_v4/caba/source/include/vci_mem_cache_v4.h
===================================================================
--- /trunk/modules/vci_mem_cache_v4/caba/source/include/vci_mem_cache_v4.h	(revision 282)
+++ /trunk/modules/vci_mem_cache_v4/caba/source/include/vci_mem_cache_v4.h	(revision 283)
@@ -529,5 +529,7 @@
       GenericFifo<bool>   m_write_to_init_cmd_inst_fifo;     // fifo for the L1 type
       GenericFifo<size_t> m_write_to_init_cmd_srcid_fifo;    // fifo for srcids
+#if L1_MULTI_CACHE
       GenericFifo<size_t> m_write_to_init_cmd_cache_id_fifo; // fifo for srcids
+#endif
 
       // Buffer between WRITE fsm and INIT_RSP fsm (Decrement UPT entry)
@@ -640,5 +642,7 @@
       GenericFifo<bool>   m_sc_to_init_cmd_inst_fifo;     // fifo for the L1 type
       GenericFifo<size_t> m_sc_to_init_cmd_srcid_fifo;    // fifo for srcids
+#if L1_MULTI_CACHE
       GenericFifo<size_t> m_sc_to_init_cmd_cache_id_fifo; // fifo for srcids
+#endif
 
       // Buffer between SC fsm and INIT_RSP fsm (Decrement UPT entry)
@@ -696,5 +700,7 @@
       GenericFifo<bool>   m_xram_rsp_to_init_cmd_inst_fifo;     // fifo for the L1 type
       GenericFifo<size_t> m_xram_rsp_to_init_cmd_srcid_fifo;    // fifo for srcids
+#if L1_MULTI_CACHE
       GenericFifo<size_t> m_xram_rsp_to_init_cmd_cache_id_fifo; // fifo for srcids
+#endif
 
       // Buffer between XRAM_RSP fsm and IXR_CMD fsm (XRAM write)
Index: /trunk/modules/vci_mem_cache_v4/caba/source/src/vci_mem_cache_v4.cpp
===================================================================
--- /trunk/modules/vci_mem_cache_v4/caba/source/src/vci_mem_cache_v4.cpp	(revision 282)
+++ /trunk/modules/vci_mem_cache_v4/caba/source/src/vci_mem_cache_v4.cpp	(revision 283)
@@ -6487,5 +6487,7 @@
         p_vci_ini.plen    = 4;
         p_vci_ini.trdid   = r_xram_rsp_to_init_cmd_trdid.read();
+#if L1_MULTI_CACHE
         p_vci_ini.pktid   = m_xram_rsp_to_init_cmd_cache_id_fifo.read();
+#endif
         p_vci_ini.eop     = true;
         break;
@@ -6531,5 +6533,7 @@
         p_vci_ini.eop     = false;
         p_vci_ini.trdid   = r_write_to_init_cmd_trdid.read();
+#if L1_MULTI_CACHE
         p_vci_ini.pktid   = m_write_to_init_cmd_cache_id_fifo.read();
+#endif
         break;
       case INIT_CMD_UPDT_INDEX:
@@ -6547,5 +6551,7 @@
         p_vci_ini.plen    = 4 * (r_write_to_init_cmd_count.read() + 2);
         p_vci_ini.trdid   = r_write_to_init_cmd_trdid.read();
+#if L1_MULTI_CACHE
         p_vci_ini.pktid   = m_write_to_init_cmd_cache_id_fifo.read();
+#endif
         p_vci_ini.eop     = false;
         break;
@@ -6566,5 +6572,7 @@
         p_vci_ini.plen    = 4 * (r_write_to_init_cmd_count.read() + 2);
         p_vci_ini.trdid   = r_write_to_init_cmd_trdid.read();
+#if L1_MULTI_CACHE
         p_vci_ini.pktid   = m_write_to_init_cmd_cache_id_fifo.read();
+#endif
         p_vci_ini.eop     = ( r_init_cmd_cpt.read() == (r_write_to_init_cmd_count.read()-1) );
         break;
@@ -6603,5 +6611,7 @@
         p_vci_ini.eop     = false;
         p_vci_ini.trdid   = r_sc_to_init_cmd_trdid.read();
+#if L1_MULTI_CACHE
         p_vci_ini.pktid   = m_sc_to_init_cmd_cache_id_fifo.read();
+#endif
         break;
       case INIT_CMD_SC_UPDT_INDEX:
@@ -6623,5 +6633,7 @@
         }
         p_vci_ini.trdid   = r_sc_to_init_cmd_trdid.read();
+#if L1_MULTI_CACHE
         p_vci_ini.pktid   = m_sc_to_init_cmd_cache_id_fifo.read();
+#endif
         p_vci_ini.eop     = false;
         break;
@@ -6639,5 +6651,7 @@
         p_vci_ini.be      = 0xF;
         p_vci_ini.trdid   = r_sc_to_init_cmd_trdid.read();
+#if L1_MULTI_CACHE
         p_vci_ini.pktid   = m_sc_to_init_cmd_cache_id_fifo.read();
+#endif
         if(r_sc_to_init_cmd_is_long.read()){
             p_vci_ini.plen    = 4 * 4;
@@ -6662,5 +6676,7 @@
         p_vci_ini.plen    = 4 * 4;
         p_vci_ini.trdid   = r_sc_to_init_cmd_trdid.read();
+#if L1_MULTI_CACHE
         p_vci_ini.pktid   = m_sc_to_init_cmd_cache_id_fifo.read();
+#endif
         p_vci_ini.eop     = true;
         break;