Changeset 286

Timestamp:

Jan 14, 2013, 4:39:14 PM (12 years ago)

Author:

cfuguet

Message:

Fixing bug in boot_tty.c:

Use address of tty status when reading with the ioread32 function.

Makefile and ioc.c:
Introducing SYSCLK_FREQ environment variable to choose a clock frequency when
using FPGA platform. 50000000 Hz by default.

Location:

trunk/softs/tsar_boot

Files:

• Makefile (modified) (1 diff)
• boot_loader_entry.c (modified) (3 diffs)
• boot_tty.c (modified) (1 diff)
• io_drivers/ioc.c (modified) (5 diffs)

trunk/softs/tsar_boot/Makefile

@@ -55 +55 @@
 $(info Making for $(PLATFORM_DIR), SocLib variant)
 else
+ifdef SYSCLK_FREQ
+DEFS+= -DSYSCLK_FREQ
+endif
 DTS=platform_fpga.dts
 $(info Making for $(PLATFORM_DIR), FPGA variant)

trunk/softs/tsar_boot/boot_loader_entry.c

@@ -83 +83 @@
     /* Initialize the block device */
     if (_ioc_init() != 0) {
-        boot_puts(start_boot_str_err);
-        while (1);
+        boot_puts(start_boot_str_err);
+        while (1);
     }
 
@@ -93 +93 @@
     nb_available       = 0;
     nb_rest            = sizeof(Elf32_Ehdr);
-    offset                  = 0;
+    offset             = 0;
 
     elf_header         = (Elf32_Ehdr *) elf_header_base;
@@ -108 +108 @@
             if ( _ioc_read(nb_block , boot_loader_buffer, 1) )
             {
-                boot_puts(start_boot_str_err);
-                while (1);
+                boot_puts(start_boot_str_err);
+                while (1);
             }
            

trunk/softs/tsar_boot/boot_tty.c

@@ -7 +7 @@
 in_reset int boot_getc(int *c)
 {
-        unsigned int* tty_address = (unsigned int*) TTY_BASE;
-        if (ioread32(tty_address[TTY_STATUS]) == 0)
+        unsigned int* tty_address = (unsigned int*) TTY_BASE;
+        if (ioread32(&tty_address[TTY_STATUS]) == 0)
                 return 0;
-        *c = ioread32(&tty_address[TTY_READ]);
+
+        *c = ioread32(&tty_address[TTY_READ]);
         return 1;
 }

trunk/softs/tsar_boot/io_drivers/ioc.c

@@ -55 +55 @@
 //    // iterate on lines to invalidate each one of them
 //    for ( i=0; i<size; i+=dcache_line_size )
-//        asm volatile(" cache %0, %1"
-//                :
-//                :"i" (0x11), "R" (*((char*)buffer+i)));
+//        asm volatile
+//            (" mtc2 %0,     $7\n"
+//             :
+//             : "r" (*((char*)buffer+i))
+//             );
 //}
 
@@ -105 +107 @@
     boot_puts(init_begin);
 
+#ifndef SYSCLK_FREQ
+#warning "Using default value for SYSCLK_FREQ = 50000000"
+#define SYSCLK_FREQ 50000000U
+#endif
+
     /**
      * Initializing the SPI controller
@@ -111 +118 @@
       _spi_device   ,
       200000        , /**< SPI_clk: 200 Khz */
-      50000000      , /**< Sys_clk: 50  Mhz */
+      SYSCLK_FREQ   , /**< Sys_clk          */
       8             , /**< Charlen: 8       */
       SPI_TX_NEGEDGE,
@@ -132 +139 @@
         _spi_device ,
         10000000    , /**< SPI_clkL 10 Mhz */
-        50000000    , /**< Sys_clk: 50 Mhz */
+        SYSCLK_FREQ , /**< Sys_clk         */
         -1          , /**< Charlen: 8      */
         -1          ,
@@ -327 +334 @@
 
     //_ioc_lock = 0;
-    //
-    //_dcache_buf_invalidate(buffer, count);
 
     return 0;