Changeset 291 for trunk/modules/vci_cc_vcache_wrapper_v4/caba/source/include

Timestamp:

Jan 28, 2013, 1:59:32 PM (12 years ago)

Author:

joannou

Message:

Introducing new generic_llsc_local_table and generic_llsc_global_table components :
These two tables implement the new scalable LL/SC mechanism for TSAR.

• generic_llsc_local_table, integrated in the vci_cc_vache_wrapper_v4 component. The table is accessed by the DCACHE_FSM. A two step registration (LL cmd/ LL rsp) sets a signature allocated by the global table for the pending LL/SC operation. An SC operation consumes the registration.
• generic_llsc_global_table, integrated in the vci_mem_cache_v4 component. The table is accessed by the READ_FSM, WRITE_FSM, CAS_FSM, when accessing the directory. It generates a signature for LL registrations and performs SC operation by checking registration's valididty with that signature. SW operations simply invalidate a registrations.

N.B. :

• The sizes of the tables are parameters, and are NOT a function of the architecture's size (scalable mechanism).
• The LL are handled by the MEMCACHE in the READ_FSM.
• The SC are handled by the MEMCACHE in the WRITE_FSM, and are no longer CAS emulated. CAS operation is now only performed by hardware mechanisms.
• An extra field is added to the xram transaction table to save a pending LL's signature.

File:

• trunk/modules/vci_cc_vcache_wrapper_v4/caba/source/include/vci_cc_vcache_wrapper_v4.h (modified) (9 diffs)

trunk/modules/vci_cc_vcache_wrapper_v4/caba/source/include/vci_cc_vcache_wrapper_v4.h

@@ -37 +37 @@
 #include "generic_cache.h"
 #include "generic_cam.h"
+#include "generic_llsc_local_table.h"
 #include "vci_initiator.h"
 #include "vci_target.h"
@@ -60 +61 @@
 
     typedef typename vci_param::addr_t  paddr_t;
+    typedef typename vci_param::data_t  vci_data_t;
     typedef typename vci_param::be_t    vci_be_t;
     typedef typename vci_param::srcid_t vci_srcid_t;
@@ -124 +126 @@
         DCACHE_MISS_WAIT,           
         DCACHE_MISS_UPDT,           
-        // handling processor unc and sc requests
+        // handling processor unc, ll and sc requests
         DCACHE_UNC_WAIT,            
+        DCACHE_LL_WAIT,            
         DCACHE_SC_WAIT,            
         // handling coherence requests
@@ -142 +145 @@
         CMD_DATA_UNC,
         CMD_DATA_WRITE,
+        CMD_DATA_LL,
+        CMD_DATA_SC,
         CMD_DATA_CAS, 
     };
@@ -151 +156 @@
         RSP_DATA_MISS,
         RSP_DATA_UNC,
+        RSP_DATA_LL,
         RSP_DATA_WRITE,
     };
@@ -400 +406 @@
     sc_signal<bool>         r_dcache_vci_unc_req;       // uncacheable read request
     sc_signal<bool>         r_dcache_vci_unc_be;        // uncacheable read byte enable
-    sc_signal<bool>         r_dcache_vci_sc_req;        // atomic write request (Compare & swap)
-    sc_signal<uint32_t>     r_dcache_vci_sc_old;        // previous data value for an atomic write
-    sc_signal<uint32_t>     r_dcache_vci_sc_new;        // new data value for an atomic write
+    sc_signal<bool>         r_dcache_vci_cas_req;       // atomic write request CAS
+    sc_signal<uint32_t>     r_dcache_vci_cas_old;       // previous data value for an atomic write CAS
+    sc_signal<uint32_t>     r_dcache_vci_cas_new;       // new data value for an atomic write CAS
+    sc_signal<bool>         r_dcache_vci_ll_req;        // atomic read request LL
+    sc_signal<bool>         r_dcache_vci_sc_req;        // atomic write request SC
+    sc_signal<vci_data_t>   r_dcache_vci_sc_data;       // SC data (command)
 
     // register used for XTN inval
@@ -425 +434 @@
     // dcache flush handling
     sc_signal<size_t>       r_dcache_flush_count;           // slot counter used for cache flush
+
+    // ll rsp handling
+    sc_signal<size_t>       r_dcache_ll_rsp_count;          // flit counter used for ll rsp
+
+    // sc cmd handling
+    sc_signal<vci_data_t>   r_sc_key;                   // SC key returned by local table
 
     // used by the TLB miss sub-fsm
@@ -438 +453 @@
     sc_signal<size_t>       r_dcache_tlb_set;               // selected set in tlb    
 
-    // LL reservation handling
-    sc_signal<bool>         r_dcache_ll_valid;              // valid LL reservation
-    sc_signal<uint32_t>     r_dcache_ll_data;               // LL reserved data
-    sc_signal<paddr_t>      r_dcache_ll_vaddr;              // LL reserved address 
-                            
     // ITLB and DTLB invalidation
     sc_signal<paddr_t>      r_dcache_tlb_inval_line;    // line index 
@@ -517 +527 @@
     GenericTlb<paddr_t>         r_itlb;
     GenericTlb<paddr_t>         r_dtlb;
+
+    //////////////////////////////////////////////////////////////////
+    // llsc local registration table
+    //////////////////////////////////////////////////////////////////
+
+    #define LLSCLocalTable GenericLLSCLocalTable<8000, 1, paddr_t, vci_trdid_t, vci_data_t>
+    LLSCLocalTable r_llsc_table;                    // The llsc local registration table
+
+    typename LLSCLocalTable::in_t   table_in    ;   // llsc local table input signals
+    typename LLSCLocalTable::out_t  table_out   ;   // llsc local table output signals
+
+    #undef LLSCLocalTable
 
     ////////////////////////////////