Changeset 328 for branches/v5/modules/vci_mem_cache_dspin_coherence

Timestamp:

Mar 18, 2013, 3:45:25 PM (12 years ago)

Author:

cfuguet

Message:

Including TYPE_CLEANUP_ACK_INST and TYPE_CLEANUP_ACK_DATA in the
dspin_dhccp_param class. These types will be decoded by the L1 cache to do the
request to the concerned FSM (DATA/INST).

Including a communication register between the CLEANUP FSM and the CC_SEND FSM
to signal if the CLEANUP_ACK to send concerns the DATA or the INSTRUCTION cache
of the L1.

Location:

branches/v5/modules/vci_mem_cache_dspin_coherence/caba/source

Files:

• include/vci_mem_cache.h (modified) (1 diff)
• src/vci_mem_cache.cpp (modified) (9 diffs)

branches/v5/modules/vci_mem_cache_dspin_coherence/caba/source/include/vci_mem_cache.h

@@ -664 +664 @@
       sc_signal<size_t>   r_cleanup_to_cc_send_set_index; // L1 set index
       sc_signal<size_t>   r_cleanup_to_cc_send_way_index; // L1 way index
+      sc_signal<bool>     r_cleanup_to_cc_send_inst;      // Instruction Cleanup Ack
 
       ///////////////////////////////////////////////////////

branches/v5/modules/vci_mem_cache_dspin_coherence/caba/source/src/vci_mem_cache.cpp

@@ -4536 +4536 @@
       r_cleanup_to_cc_send_way_index = r_cleanup_way_index.read();
       r_cleanup_to_cc_send_srcid     = r_cleanup_srcid.read();
+      r_cleanup_to_cc_send_inst      = r_cleanup_inst.read();
 
       r_cleanup_fsm = CLEANUP_IDLE;
@@ -7331 +7332 @@
         uint64_t flit = 0;
   
+        uint8_t cleanup_ack_type;
+        if(r_cleanup_to_cc_send_inst.read())
+        {
+          cleanup_ack_type = DspinDhccpParam::TYPE_CLEANUP_ACK_INST;
+        }
+        else 
+        {
+          cleanup_ack_type = DspinDhccpParam::TYPE_CLEANUP_ACK_DATA;
+        }
+
         DspinDhccpParam::dspin_set(
             flit,
@@ -7353 +7364 @@
         DspinDhccpParam::dspin_set(
             flit,
-            DspinDhccpParam::TYPE_CLEANUP_ACK,
+            cleanup_ack_type,
             DspinDhccpParam::FROM_MC_TYPE);
 
@@ -7364 +7375 @@
     case CC_SEND_XRAM_RSP_INVAL_HEADER:
       {
+        if(not m_xram_rsp_to_cc_send_inst_fifo.rok()) break;
+
         uint8_t multi_inval_type;
         if(m_xram_rsp_to_cc_send_inst_fifo.read())
@@ -7396 +7409 @@
             DspinDhccpParam::FROM_MC_TYPE);
 
-        p_dspin_out.write = m_xram_rsp_to_cc_send_inst_fifo.rok();
+        p_dspin_out.write = true;
         p_dspin_out.data  = flit; 
 
@@ -7512 +7525 @@
     case CC_SEND_WRITE_UPDT_HEADER:
       {
+        if(not m_write_to_cc_send_inst_fifo.rok()) break;
+
         uint8_t multi_updt_type;
         if(m_write_to_cc_send_inst_fifo.read())
@@ -7544 +7559 @@
             DspinDhccpParam::FROM_MC_TYPE);
 
-        p_dspin_out.write = m_write_to_cc_send_inst_fifo.rok();
+        p_dspin_out.write = true;
         p_dspin_out.data  = flit;
 
@@ -7614 +7629 @@
     case CC_SEND_CAS_UPDT_HEADER:
       {
+        if (not m_cas_to_cc_send_inst_fifo.rok()) break;
+
         uint8_t multi_updt_type;
         if(m_cas_to_cc_send_inst_fifo.read())
@@ -7646 +7663 @@
             DspinDhccpParam::FROM_MC_TYPE);
 
-        p_dspin_out.write = m_cas_to_cc_send_inst_fifo.rok();
+        p_dspin_out.write = true;
         p_dspin_out.data  = flit;