Ignore:
Timestamp:
Mar 20, 2013, 10:55:39 AM (12 years ago)
Author:
joannou
Message:
  • Commented debug in dspin_local_ring_fast_c
  • Added test on plen value in case of LL command in mem cache (vci_mem_cache and vci_mem_cache_dspin_coherence)
  • Removed coherence handling in *CACHE_MISS_DATA_UPDT states, in vci_cc_vcache_wrapper_dspin_coherence component
File:
1 edited

Legend:

Unmodified
Added
Removed
  • branches/v5/modules/vci_cc_vcache_wrapper_dspin_coherence/caba/source/src/vci_cc_vcache_wrapper.cpp

    r329 r330  
    16101610    {
    16111611        if ( m_ireq.valid ) m_cost_ins_miss_frz++;
    1612 
    1613         // coherence interrupt
    1614         if ( r_cc_receive_icache_req.read() )
    1615         {
    1616             r_icache_fsm = ICACHE_CC_CHECK;
    1617             r_icache_fsm_save = r_icache_fsm.read();
    1618             break;
    1619         }
    16201612
    16211613        if ( not r_icache_miss_clack.read() ) // waiting cleanup acknowledge for victim line
     
    40394031        if ( m_dreq.valid) m_cost_data_miss_frz++;
    40404032
    4041         // coherence request (from CC_RECEIVE FSM)
    4042         if ( r_cc_receive_dcache_req.read() )
    4043         {
    4044             r_dcache_fsm = DCACHE_CC_CHECK;
    4045             r_dcache_fsm_cc_save = r_dcache_fsm.read();
    4046             break;
    4047         }
    4048 
    40494033        if ( not r_dcache_miss_clack.read() )  // waiting cleanup acknowledge
    40504034        {
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