Index: /branches/v5/modules/vci_mem_cache/caba/source/src/vci_mem_cache.cpp
===================================================================
--- /branches/v5/modules/vci_mem_cache/caba/source/src/vci_mem_cache.cpp	(revision 334)
+++ /branches/v5/modules/vci_mem_cache/caba/source/src/vci_mem_cache.cpp	(revision 335)
@@ -609,4 +609,5 @@
     m_transaction_tab.init();
     m_update_tab.init();
+    m_llsc_table.init();
 
     // initializing FIFOs and communication Buffers
Index: /branches/v5/modules/vci_mem_cache_dspin_coherence/caba/source/src/vci_mem_cache_dspin_coherence.cpp
===================================================================
--- /branches/v5/modules/vci_mem_cache_dspin_coherence/caba/source/src/vci_mem_cache_dspin_coherence.cpp	(revision 334)
+++ /branches/v5/modules/vci_mem_cache_dspin_coherence/caba/source/src/vci_mem_cache_dspin_coherence.cpp	(revision 335)
@@ -668,4 +668,5 @@
     m_transaction_tab.init();
     m_update_tab.init();
+    m_llsc_table.init();
 
     // initializing FIFOs and communication Buffers
@@ -1335,5 +1336,5 @@
         }
 #endif
-/**/
+/*
           if(m_monitor_ok)
           {
@@ -1342,5 +1343,5 @@
             check_monitor_read(buf, m_cmd_read_addr_fifo.read());
           }
-/**/
+*/
         r_read_fsm = READ_DIR_REQ;
       }