Changeset 347 for trunk/softs


Ignore:
Timestamp:
Apr 1, 2013, 8:57:02 PM (12 years ago)
Author:
cfuguet
Message:

Introducing dcache line invalidation mechanism in the boot_ioc_read
function, when using platform without cache coherency.

Introducing two parameters in the defs_platform.h file:

CACHE_COHERENCE

Equals to 0 when no cache coherency

CACHE_LINE_SIZE

Number of bytes in a cache line

  • TODO: Use the config register of the cache models to get

this size

Adding new platform configuration file for the

caba_vgsb_xicu_mmu SOCLIB platform.


Location:
trunk/softs/tsar_boot
Files:
4 added
4 edited

Legend:

Unmodified
Added
Removed

  • trunk/softs/tsar_boot/README.txt

    r302 r347  
    99
    1010conf/       Platform specific files and ldscript.
    11              For each platform, we must define a new directory.
     11            For each platform, we must define a new directory.
    1212
    1313      --->  defs_platform.h:
    … …  
    1616             NB_PROCS per cluster, the NB_CLUSTERS and the base address of
    1717             the TTY, IOC and XICU devices.
    18              It also defines the IRQ_PER_PROC constant. This constant is used
    19              to know how many XICU irq outputs are connected to each processor.
     18             It defines also:
     19              -> CACHE_COHERENCE
     20                 This constant is used by the boot_ioc_read function to know
     21                 if the buffer used to store the blocks from the block_device
     22                 must be invalidated in the dcache after the transfert has
     23                 finished.
     24                                 0 means invalidation must be made.
     25
     26              -> CACHE_LINE_SIZE
     27                 This constant defines the size in bytes of a cache line.
     28
     29              -> IRQ_PER_PROC
     30                 This constant is used to know how many XICU irq outputs are
     31                 connected to each processor.
    2032
    2133      --->  platform_soclib.dts:

  • trunk/softs/tsar_boot/conf/platform_fpga_de2-115/defs_platform.h

    r302 r347  
    1 #define NB_PROCS     4
    2 #define NB_CLUSTERS  1
     1#define NB_PROCS        4
     2#define NB_CLUSTERS     1
    33
    4 #define IRQ_PER_PROC 1
     4#define IRQ_PER_PROC    1
    55
    6 #define IOC_BASE     0xFB000000
    7 #define VCIBD_BASE   0xFB000000
    8 #define TTY_BASE     0xFC000000
    9 #define ICU_BASE     0xFD000000
     6#define CACHE_COHERENCE 1
     7#define CACHE_LINE_SIZE 64//bytes
     8
     9#define IOC_BASE        0xFB000000
     10#define VCIBD_BASE      0xFB000000
     11#define TTY_BASE        0xFC000000
     12#define ICU_BASE        0xFD000000

  • trunk/softs/tsar_boot/include/boot_ioc.h

    r292 r347  
    99#endif
    1010
     11#include <defs.h>
    1112#include <boot_tty.h>
    1213#include <io.h>
    … …  
    3435
    3536/**
     37 * boot_dbuf_invalidate()
     38 *
     39 * Invalidate all data cache lines corresponding to a memory buffer.
     40 */
     41#if (CACHE_COHERENCE == 0)
     42void boot_dbuf_invalidate(
     43        const void * buffer,
     44        unsigned int line_size,
     45        unsigned int size);
     46#endif
     47
     48/**
    3649 * boot_ioc_write()
    3750 *

  • trunk/softs/tsar_boot/src/boot_ioc.c

    r302 r347  
    11#include <boot_ioc.h>
    2 #include <defs.h>
    32
    43#ifndef SOCLIB_IOC
    … …  
    1615int boot_ioc_init()
    1716{
    18 #ifndef SOCLIB_IOC
     17#ifdef SOCLIB_IOC
     18    return 0;
     19#else
    1920    unsigned char sdcard_rsp;
    2021
    … …  
    5556
    5657    boot_puts("Finish block device initialization\n\r");
    57 #endif
    5858
    5959    return 0;
     60#endif
    6061}
    6162
    … …  
    101102 *       has finished
    102103 */
     104
     105#ifdef SOCLIB_IOC
     106///////////////////////////////////////////////////////////////////////////////
     107// SOCLIB version of the boot_ioc_read function
     108
    103109int boot_ioc_read(unsigned int lba, void* buffer, unsigned int count)
    104110{
    105 #ifdef SOCLIB_IOC
    106111
    107112    unsigned int * ioc_address  = (unsigned int*)VCIBD_BASE;
    … …  
    125130    _boot_ioc_completed();
    126131
     132#if (CACHE_COHERENCE == 0)
     133    boot_dbuf_invalidate(buffer, CACHE_LINE_SIZE, count * 512);
     134#endif
     135    return 0;
     136}
     137
    127138#else
     139///////////////////////////////////////////////////////////////////////////////
     140// FPGA version of the boot_ioc_read function
     141
     142int boot_ioc_read(unsigned int lba, void* buffer, unsigned int count)
     143{
    128144    unsigned int sdcard_rsp;
    129145
    … …  
    147163        }   
    148164    }
    149    
    150 #endif
    151165
    152166    return 0;
    153167}
    154 
    155 /**
    156  * boot_ioc_write()
    157  *
    158  * Transfer data from a memory buffer to a file on the block_device.
    159  *
    160  * \param lba    : first block index on the disk
    161  * \param buffer : base address of the memory buffer
    162  * \param count  : number of blocks to be transfered
    163  *
    164  * \note The source buffer must be in user address space.
    165  *
    166  *in_reset int _ioc_write(unsigned int lba, void* buffer, unsigned int count)
    167  *{
    168  *#ifdef SOCLIB_IOC
    169  *
    170  *    unsigned int * ioc_address = ( unsigned int * )VCIBD_BASE;
    171  *
    172  *    // block_device configuration
    173  *    iowrite32( &ioc_address[BLOCK_DEVICE_BUFFER],
    174  *            ( unsigned int ) buffer );
    175  *
    176  *    iowrite32( &ioc_address[BLOCK_DEVICE_COUNT],
    177  *            ( unsigned int ) count );
    178  *
    179  *    iowrite32( &ioc_address[BLOCK_DEVICE_LBA],
    180  *            ( unsigned int ) lba );
    181  *
    182  *    iowrite32( &ioc_address[BLOCK_DEVICE_IRQ_ENABLE],
    183  *            ( unsigned int ) 0 );
    184  *
    185  *    iowrite32( &ioc_address[BLOCK_DEVICE_OP],
    186  *            ( unsigned int ) BLOCK_DEVICE_WRITE);
    187  *
    188  *    _boot_ioc_completed();
    189  *
    190  *#else   
    191  *       
    192  *    sdcard_dev_lseek(&_sdcard_device, lba);
    193  *    sdcard_dev_write(&_sdcard_device, buffer, count*512);
    194  *
    195  *#endif
    196  *
    197  *    return 0;
    198  *}
    199  */
     168#endif
    200169
    201170/**
    202171 * _dcache_buf_invalidate()
    203172 *
    204  * Invalidate all cache lines corresponding to a memory buffer.
    205  * This is used by the block_device driver.
    206  *
    207  *in_reset static void _dcache_buf_invalidate(const void * buffer, unsigned int size)
    208  *{
    209  *    unsigned int i;
    210  *    unsigned int dcache_line_size;
    211  *
    212  *    // retrieve dcache line size from config register (bits 12:10)
    213  *    asm volatile("mfc0 %0, $16, 1" : "=r" (dcache_line_size));
    214  *
    215  *    dcache_line_size = 2 << ((dcache_line_size>>10) & 0x7);
    216  *
    217  *    // iterate on lines to invalidate each one of them
    218  *    for ( i=0; i<size; i+=dcache_line_size )
    219  *        asm volatile
    220  *            (" mtc2 %0,     $7\n"
    221  *             :
    222  *             : "r" (*((char*)buffer+i))
    223  *             );
    224  *}
     173 * Invalidate all data cache lines corresponding to a memory
     174 * buffer (identified by an address and a size).
    225175 */
     176#if (CACHE_COHERENCE == 0)
     177void boot_dbuf_invalidate (
     178        const void * buffer,
     179        unsigned int line_size,
     180        unsigned int size)
     181{
     182    unsigned int i;
     183
     184    // iterate on cache lines
     185    for (i = 0; i < size; i += line_size) {
     186        asm volatile(
     187            " cache %0, %1"
     188            :// no outputs
     189            :"i" (0x11), "R" (*((unsigned char *) buffer + i))
     190            );
     191    }
     192}
     193#endif
    226194
    227195/*
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