Changeset 347 for trunk/softs/tsar_boot/include

Timestamp:

Apr 1, 2013, 8:57:02 PM (12 years ago)

Author:

cfuguet

Message:

Introducing dcache line invalidation mechanism in the boot_ioc_read
function, when using platform without cache coherency.

Introducing two parameters in the defs_platform.h file:

CACHE_COHERENCE

Equals to 0 when no cache coherency

CACHE_LINE_SIZE

Number of bytes in a cache line

• TODO: Use the config register of the cache models to get

this size

Adding new platform configuration file for the

caba_vgsb_xicu_mmu SOCLIB platform.

File:

• trunk/softs/tsar_boot/include/boot_ioc.h (modified) (2 diffs)

trunk/softs/tsar_boot/include/boot_ioc.h

@@ -9 +9 @@
 #endif
 
+#include <defs.h>
 #include <boot_tty.h>
 #include <io.h>
@@ -34 +35 @@
 
 /**
+ * boot_dbuf_invalidate()
+ *
+ * Invalidate all data cache lines corresponding to a memory buffer.
+ */
+#if (CACHE_COHERENCE == 0)
+void boot_dbuf_invalidate(
+        const void * buffer,
+        unsigned int line_size,
+        unsigned int size);
+#endif
+
+/**
  * boot_ioc_write()
  *