Changeset 347 for trunk/softs/tsar_boot/src

Timestamp:

Apr 1, 2013, 8:57:02 PM (12 years ago)

Author:

cfuguet

Message:

Introducing dcache line invalidation mechanism in the boot_ioc_read
function, when using platform without cache coherency.

Introducing two parameters in the defs_platform.h file:

CACHE_COHERENCE

Equals to 0 when no cache coherency

CACHE_LINE_SIZE

Number of bytes in a cache line

• TODO: Use the config register of the cache models to get

this size

Adding new platform configuration file for the

caba_vgsb_xicu_mmu SOCLIB platform.

File:

• trunk/softs/tsar_boot/src/boot_ioc.c (modified) (6 diffs)

trunk/softs/tsar_boot/src/boot_ioc.c

@@ -1 +1 @@
 #include <boot_ioc.h>
-#include <defs.h>
 
 #ifndef SOCLIB_IOC
@@ -16 +15 @@
 int boot_ioc_init()
 {
-#ifndef SOCLIB_IOC
+#ifdef SOCLIB_IOC
+    return 0;
+#else
     unsigned char sdcard_rsp;
 
@@ -55 +56 @@
 
     boot_puts("Finish block device initialization\n\r");
-#endif
 
     return 0;
+#endif
 }
 
@@ -101 +102 @@
  *       has finished
  */
+
+#ifdef SOCLIB_IOC
+///////////////////////////////////////////////////////////////////////////////
+// SOCLIB version of the boot_ioc_read function
+
 int boot_ioc_read(unsigned int lba, void* buffer, unsigned int count)
 {
-#ifdef SOCLIB_IOC
 
     unsigned int * ioc_address  = (unsigned int*)VCIBD_BASE;
@@ -125 +130 @@
     _boot_ioc_completed();
 
+#if (CACHE_COHERENCE == 0)
+    boot_dbuf_invalidate(buffer, CACHE_LINE_SIZE, count * 512);
+#endif
+    return 0;
+}
+
 #else
+///////////////////////////////////////////////////////////////////////////////
+// FPGA version of the boot_ioc_read function
+
+int boot_ioc_read(unsigned int lba, void* buffer, unsigned int count)
+{
     unsigned int sdcard_rsp;
 
@@ -147 +163 @@
         }   
     }
-    
-#endif
 
     return 0;
 }
-
-/**
- * boot_ioc_write()
- *
- * Transfer data from a memory buffer to a file on the block_device.
- *
- * \param lba    : first block index on the disk
- * \param buffer : base address of the memory buffer
- * \param count  : number of blocks to be transfered
- *
- * \note The source buffer must be in user address space.
- *
- *in_reset int _ioc_write(unsigned int lba, void* buffer, unsigned int count)
- *{
- *#ifdef SOCLIB_IOC
- *
- *    unsigned int * ioc_address = ( unsigned int * )VCIBD_BASE;
- *
- *    // block_device configuration
- *    iowrite32( &ioc_address[BLOCK_DEVICE_BUFFER],
- *            ( unsigned int ) buffer );
- *
- *    iowrite32( &ioc_address[BLOCK_DEVICE_COUNT],
- *            ( unsigned int ) count );
- *
- *    iowrite32( &ioc_address[BLOCK_DEVICE_LBA],
- *            ( unsigned int ) lba );
- *
- *    iowrite32( &ioc_address[BLOCK_DEVICE_IRQ_ENABLE],
- *            ( unsigned int ) 0 );
- *
- *    iowrite32( &ioc_address[BLOCK_DEVICE_OP],
- *            ( unsigned int ) BLOCK_DEVICE_WRITE);
- *
- *    _boot_ioc_completed();
- *
- *#else   
- *        
- *    sdcard_dev_lseek(&_sdcard_device, lba);
- *    sdcard_dev_write(&_sdcard_device, buffer, count*512);
- *
- *#endif
- *
- *    return 0;
- *}
- */
+#endif
 
 /**
  * _dcache_buf_invalidate()
  *
- * Invalidate all cache lines corresponding to a memory buffer.
- * This is used by the block_device driver.
- *
- *in_reset static void _dcache_buf_invalidate(const void * buffer, unsigned int size)
- *{
- *    unsigned int i;
- *    unsigned int dcache_line_size;
- *
- *    // retrieve dcache line size from config register (bits 12:10)
- *    asm volatile("mfc0 %0, $16, 1" : "=r" (dcache_line_size));
- *
- *    dcache_line_size = 2 << ((dcache_line_size>>10) & 0x7);
- *
- *    // iterate on lines to invalidate each one of them
- *    for ( i=0; i<size; i+=dcache_line_size )
- *        asm volatile
- *            (" mtc2 %0,     $7\n"
- *             :
- *             : "r" (*((char*)buffer+i))
- *             );
- *}
+ * Invalidate all data cache lines corresponding to a memory 
+ * buffer (identified by an address and a size).
  */
+#if (CACHE_COHERENCE == 0)
+void boot_dbuf_invalidate (
+        const void * buffer,
+        unsigned int line_size,
+        unsigned int size)
+{
+    unsigned int i;
+
+    // iterate on cache lines 
+    for (i = 0; i < size; i += line_size) {
+        asm volatile(
+            " cache %0, %1"
+            :// no outputs
+            :"i" (0x11), "R" (*((unsigned char *) buffer + i))
+            );
+    }
+}
+#endif
 
 /*