Index: /trunk/softs/tsar_boot/README.txt =================================================================== --- /trunk/softs/tsar_boot/README.txt (revision 346) +++ /trunk/softs/tsar_boot/README.txt (revision 347) @@ -9,5 +9,5 @@ conf/ Platform specific files and ldscript. - For each platform, we must define a new directory. + For each platform, we must define a new directory. ---> defs_platform.h: @@ -16,6 +16,18 @@ NB_PROCS per cluster, the NB_CLUSTERS and the base address of the TTY, IOC and XICU devices. - It also defines the IRQ_PER_PROC constant. This constant is used - to know how many XICU irq outputs are connected to each processor. + It defines also: + -> CACHE_COHERENCE + This constant is used by the boot_ioc_read function to know + if the buffer used to store the blocks from the block_device + must be invalidated in the dcache after the transfert has + finished. + 0 means invalidation must be made. + + -> CACHE_LINE_SIZE + This constant defines the size in bytes of a cache line. + + -> IRQ_PER_PROC + This constant is used to know how many XICU irq outputs are + connected to each processor. ---> platform_soclib.dts: Index: /trunk/softs/tsar_boot/conf/platform_fpga_de2-115/defs_platform.h =================================================================== --- /trunk/softs/tsar_boot/conf/platform_fpga_de2-115/defs_platform.h (revision 346) +++ /trunk/softs/tsar_boot/conf/platform_fpga_de2-115/defs_platform.h (revision 347) @@ -1,9 +1,12 @@ -#define NB_PROCS 4 -#define NB_CLUSTERS 1 +#define NB_PROCS 4 +#define NB_CLUSTERS 1 -#define IRQ_PER_PROC 1 +#define IRQ_PER_PROC 1 -#define IOC_BASE 0xFB000000 -#define VCIBD_BASE 0xFB000000 -#define TTY_BASE 0xFC000000 -#define ICU_BASE 0xFD000000 +#define CACHE_COHERENCE 1 +#define CACHE_LINE_SIZE 64//bytes + +#define IOC_BASE 0xFB000000 +#define VCIBD_BASE 0xFB000000 +#define TTY_BASE 0xFC000000 +#define ICU_BASE 0xFD000000 Index: /trunk/softs/tsar_boot/conf/platform_vgsb_xicu_mmu/defs_platform.h =================================================================== --- /trunk/softs/tsar_boot/conf/platform_vgsb_xicu_mmu/defs_platform.h (revision 347) +++ /trunk/softs/tsar_boot/conf/platform_vgsb_xicu_mmu/defs_platform.h (revision 347) @@ -0,0 +1,12 @@ +#define NB_PROCS 4 +#define NB_CLUSTERS 1 + +#define IRQ_PER_PROC 1 + +#define CACHE_COHERENCE 0 +#define CACHE_LINE_SIZE 16//bytes + +#define ICU_BASE 0x00F00000 +#define IOC_BASE 0x00F10000 +#define VCIBD_BASE IOC_BASE +#define TTY_BASE 0x00F20000 Index: /trunk/softs/tsar_boot/include/boot_ioc.h =================================================================== --- /trunk/softs/tsar_boot/include/boot_ioc.h (revision 346) +++ /trunk/softs/tsar_boot/include/boot_ioc.h (revision 347) @@ -9,4 +9,5 @@ #endif +#include #include #include @@ -34,4 +35,16 @@ /** + * boot_dbuf_invalidate() + * + * Invalidate all data cache lines corresponding to a memory buffer. + */ +#if (CACHE_COHERENCE == 0) +void boot_dbuf_invalidate( + const void * buffer, + unsigned int line_size, + unsigned int size); +#endif + +/** * boot_ioc_write() * Index: /trunk/softs/tsar_boot/src/boot_ioc.c =================================================================== --- /trunk/softs/tsar_boot/src/boot_ioc.c (revision 346) +++ /trunk/softs/tsar_boot/src/boot_ioc.c (revision 347) @@ -1,4 +1,3 @@ #include -#include #ifndef SOCLIB_IOC @@ -16,5 +15,7 @@ int boot_ioc_init() { -#ifndef SOCLIB_IOC +#ifdef SOCLIB_IOC + return 0; +#else unsigned char sdcard_rsp; @@ -55,7 +56,7 @@ boot_puts("Finish block device initialization\n\r"); -#endif return 0; +#endif } @@ -101,7 +102,11 @@ * has finished */ + +#ifdef SOCLIB_IOC +/////////////////////////////////////////////////////////////////////////////// +// SOCLIB version of the boot_ioc_read function + int boot_ioc_read(unsigned int lba, void* buffer, unsigned int count) { -#ifdef SOCLIB_IOC unsigned int * ioc_address = (unsigned int*)VCIBD_BASE; @@ -125,5 +130,16 @@ _boot_ioc_completed(); +#if (CACHE_COHERENCE == 0) + boot_dbuf_invalidate(buffer, CACHE_LINE_SIZE, count * 512); +#endif + return 0; +} + #else +/////////////////////////////////////////////////////////////////////////////// +// FPGA version of the boot_ioc_read function + +int boot_ioc_read(unsigned int lba, void* buffer, unsigned int count) +{ unsigned int sdcard_rsp; @@ -147,81 +163,33 @@ } } - -#endif return 0; } - -/** - * boot_ioc_write() - * - * Transfer data from a memory buffer to a file on the block_device. - * - * \param lba : first block index on the disk - * \param buffer : base address of the memory buffer - * \param count : number of blocks to be transfered - * - * \note The source buffer must be in user address space. - * - *in_reset int _ioc_write(unsigned int lba, void* buffer, unsigned int count) - *{ - *#ifdef SOCLIB_IOC - * - * unsigned int * ioc_address = ( unsigned int * )VCIBD_BASE; - * - * // block_device configuration - * iowrite32( &ioc_address[BLOCK_DEVICE_BUFFER], - * ( unsigned int ) buffer ); - * - * iowrite32( &ioc_address[BLOCK_DEVICE_COUNT], - * ( unsigned int ) count ); - * - * iowrite32( &ioc_address[BLOCK_DEVICE_LBA], - * ( unsigned int ) lba ); - * - * iowrite32( &ioc_address[BLOCK_DEVICE_IRQ_ENABLE], - * ( unsigned int ) 0 ); - * - * iowrite32( &ioc_address[BLOCK_DEVICE_OP], - * ( unsigned int ) BLOCK_DEVICE_WRITE); - * - * _boot_ioc_completed(); - * - *#else - * - * sdcard_dev_lseek(&_sdcard_device, lba); - * sdcard_dev_write(&_sdcard_device, buffer, count*512); - * - *#endif - * - * return 0; - *} - */ +#endif /** * _dcache_buf_invalidate() * - * Invalidate all cache lines corresponding to a memory buffer. - * This is used by the block_device driver. - * - *in_reset static void _dcache_buf_invalidate(const void * buffer, unsigned int size) - *{ - * unsigned int i; - * unsigned int dcache_line_size; - * - * // retrieve dcache line size from config register (bits 12:10) - * asm volatile("mfc0 %0, $16, 1" : "=r" (dcache_line_size)); - * - * dcache_line_size = 2 << ((dcache_line_size>>10) & 0x7); - * - * // iterate on lines to invalidate each one of them - * for ( i=0; i