Index: branches/v5/platforms/tsar_generic_mmu/soclib.conf =================================================================== --- branches/v5/platforms/tsar_generic_mmu/soclib.conf (revision 350) +++ branches/v5/platforms/tsar_generic_mmu/soclib.conf (revision 351) @@ -1,5 +1,7 @@ config.default.toolchain.set("cflags", config.default.toolchain.cflags + ['-DI_WANT_ILLEGAL_VCI']) -#config.addDescPath("/path/to/tsar/trunk/lib/") -#config.addDescPath("/path/to/tsar/trunk/modules/") -#config.addDescPath("/path/to/tsar/branches/v5/modules/") +#config.addDescPath("path/to/tsar/trunk/lib/") +#config.addDescPath("path/to/tsar/trunk/modules/") +#config.addDescPath("path/to/tsar/branches/v5/modules/") +#config.addDescPath("path/to/tsar/branches/v5/communication/") +#config.addDescPath("path/to/tsar/branches/v5/platforms/tsar_generic_mmu_dspin_coherence/") Index: branches/v5/platforms/tsar_generic_mmu/top.cpp =================================================================== --- branches/v5/platforms/tsar_generic_mmu/top.cpp (revision 350) +++ branches/v5/platforms/tsar_generic_mmu/top.cpp (revision 351) @@ -171,5 +171,5 @@ #define TRACE_MEMC_ID 0 -#define TRACE_PROC_ID 1000000 +#define TRACE_PROC_ID 0 ///////////////////////////////////////////////////////// @@ -424,35 +424,4 @@ std::cout << maptabd << std::endl; - // coherence network - // - tgtid_c_proc = srcid_c_proc = local procid - // - tgtid_c_memc = srcid_c_memc = NB_PROCS_MAX - MappingTable maptabc(address_width, - IntTab(x_width + y_width, srcid_width - x_width - y_width), - IntTab(x_width + y_width, srcid_width - x_width - y_width), - 0x00FF0000); - - for (size_t x = 0; x < CLUSTER_X; x++) - { - for (size_t y = 0; y < CLUSTER_Y; y++) - { - sc_uint offset = cluster(x,y) << (address_width-x_width-y_width); - - // cleanup requests must be routed to the memory cache - std::ostringstream sh; - sh << "c_seg_memc_" << x << "_" << y; - maptabc.add(Segment(sh.str(), (NB_PROCS_MAX << (address_width - srcid_width)) + offset, - 0x10, IntTab(cluster(x,y), NB_PROCS_MAX), false)); - - // update & invalidate requests must be routed to the proper processor - for ( size_t p = 0 ; p < NB_PROCS_MAX ; p++) - { - std::ostringstream sp; - sp << "c_seg_proc_" << x << "_" << y << "_" << p; - maptabc.add( Segment( sp.str() , (p << (address_width - srcid_width)) + offset , - 0x10 , IntTab(cluster(x,y), p) , false)); - } - } - } - std::cout << maptabc << std::endl; // external network @@ -557,8 +526,8 @@ cluster(x,y), maptabd, - maptabc, maptabx, x_width, y_width, + 4, //local_id_width MEMC_TGTID, XICU_TGTID, @@ -715,4 +684,5 @@ signal_resetn = true; + //clusters[0][0]->memc->start_monitor(0x19000,0x40); for (size_t n = 1; n < ncycles; n++) { @@ -723,7 +693,10 @@ std::cout << " ************************************************" << std::endl; - //clusters[0][0]->memc->print_trace(); +// clusters[0][0]->proc[0]->print_trace(); + // clusters[0][0]->proc[1]->print_trace(); + // clusters[1][0]->proc[2]->print_trace(); + // clusters[0][0]->proc[3]->print_trace(); + // clusters[0][0]->memc->print_trace(); // trace proc[debug_proc_id] -/* if ( debug_proc_id < (CLUSTER_X * CLUSTER_Y * NB_PROCS_MAX) ) { @@ -734,6 +707,6 @@ clusters[proc_x][proc_y]->signal_vci_ini_d_proc[0].print_trace("proc_ini_d"); - clusters[proc_x][proc_y]->signal_vci_ini_c_proc[0].print_trace("proc_ini_c"); - clusters[proc_x][proc_y]->signal_vci_tgt_c_proc[0].print_trace("proc_tgt_c"); + clusters[proc_x][proc_y]->signal_dspin_c_from_proc[0].print_trace("from_proc_c"); + clusters[proc_x][proc_y]->signal_dspin_c_to_proc[0].print_trace("to_proc_c"); } @@ -747,6 +720,6 @@ clusters[memc_x][memc_y]->signal_vci_tgt_d_memc.print_trace("memc_tgt_d"); - clusters[memc_x][memc_y]->signal_vci_ini_c_memc.print_trace("memc_ini_c"); - clusters[memc_x][memc_y]->signal_vci_tgt_c_memc.print_trace("memc_tgt_c"); + clusters[memc_x][memc_y]->signal_dspin_c_from_memc.print_trace("from_memc_c"); + clusters[memc_x][memc_y]->signal_dspin_c_to_memc.print_trace("to_memc_c"); } @@ -771,5 +744,4 @@ // clusters[1][1]->signal_vci_tgt_d_mdma.print_trace("mdma_1_1_tgt_d "); // clusters[1][1]->signal_vci_ini_d_mdma.print_trace("mdma_1_1_ini_d "); -*/ } Index: branches/v5/platforms/tsar_generic_mmu/tsar_cluster_mmu/caba/metadata/tsar_cluster_mmu.sd =================================================================== --- branches/v5/platforms/tsar_generic_mmu/tsar_cluster_mmu/caba/metadata/tsar_cluster_mmu.sd (revision 350) +++ branches/v5/platforms/tsar_generic_mmu/tsar_cluster_mmu/caba/metadata/tsar_cluster_mmu.sd (revision 351) @@ -22,4 +22,7 @@ Uses('caba:vci_xicu'), Uses('caba:vci_local_crossbar'), + Uses('caba:dspin_local_ring_fast_c', + ring_cmd_data_size = parameter.Reference('cmd_width'), + ring_rsp_data_size = parameter.Reference('rsp_width')), Uses('caba:virtual_dspin_router', flit_width = parameter.Reference('cmd_width')), Index: branches/v5/platforms/tsar_generic_mmu/tsar_cluster_mmu/caba/source/include/tsar_cluster_mmu.h =================================================================== --- branches/v5/platforms/tsar_generic_mmu/tsar_cluster_mmu/caba/source/include/tsar_cluster_mmu.h (revision 350) +++ branches/v5/platforms/tsar_generic_mmu/tsar_cluster_mmu/caba/source/include/tsar_cluster_mmu.h (revision 351) @@ -23,4 +23,5 @@ #include "vci_xicu.h" #include "vci_local_crossbar.h" +#include "dspin_local_ring_fast_c.h" #include "virtual_dspin_router.h" #include "vci_vdspin_target_wrapper.h" @@ -63,5 +64,5 @@ sc_signal signal_irq_bdev; - // DSPIN signals between DSPIN routers and VCI/DSPIN wrappers + // DSPIN signals between DSPIN routers and VCI/DSPIN wrappers / DSPIN coherence DspinSignals signal_dspin_cmd_l2g_d; DspinSignals signal_dspin_cmd_g2l_d; @@ -76,6 +77,4 @@ VciSignals signal_vci_l2g_d; VciSignals signal_vci_g2l_d; - VciSignals signal_vci_l2g_c; - VciSignals signal_vci_g2l_c; // Direct VCI signals @@ -93,9 +92,9 @@ VciSignals signal_vci_tgt_d_mnic; - // Coherence VCi signals - VciSignals signal_vci_ini_c_proc[4]; - VciSignals signal_vci_tgt_c_proc[4]; - VciSignals signal_vci_ini_c_memc; - VciSignals signal_vci_tgt_c_memc; + // Coherence DSPIN signals + DspinSignals signal_dspin_c_to_proc[4]; + DspinSignals signal_dspin_c_from_proc[4]; + DspinSignals signal_dspin_c_from_memc; + DspinSignals signal_dspin_c_to_memc; // external RAM VCI signal @@ -108,9 +107,7 @@ VciXicu* xicu; VciLocalCrossbar* xbard; - VciLocalCrossbar* xbarc; + soclib::caba::DspinLocalRingFastC * ringc; VciVdspinTargetWrapper* tgtwrapperd; VciVdspinInitiatorWrapper* iniwrapperd; - VciVdspinTargetWrapper* tgtwrapperc; - VciVdspinInitiatorWrapper* iniwrapperc; VirtualDspinRouter* cmdrouter; VirtualDspinRouter* rsprouter; @@ -131,8 +128,8 @@ size_t cluster, // y + ymax*x const soclib::common::MappingTable &mtd, // direct mapping table - const soclib::common::MappingTable &mtc, // coherence mapping table const soclib::common::MappingTable &mtx, // xram mapping table size_t x_width, // x field number of bits size_t y_width, // y field number of bits + size_t l_width, // l field number of bits size_t tgtid_memc, size_t tgtid_xicu, @@ -153,5 +150,5 @@ size_t xfb, // frame buffer pixels size_t yfb, // frame buffer lines - char* disk_name, // virtual disk name for BDEV + char* disk_name, // virtual disk for BDEV size_t block_size, // block size for BDEV size_t nic_channels, // number of channels Index: branches/v5/platforms/tsar_generic_mmu/tsar_cluster_mmu/caba/source/src/tsar_cluster_mmu.cpp =================================================================== --- branches/v5/platforms/tsar_generic_mmu/tsar_cluster_mmu/caba/source/src/tsar_cluster_mmu.cpp (revision 350) +++ branches/v5/platforms/tsar_generic_mmu/tsar_cluster_mmu/caba/source/src/tsar_cluster_mmu.cpp (revision 351) @@ -42,8 +42,8 @@ size_t cluster_id, const soclib::common::MappingTable &mtd, - const soclib::common::MappingTable &mtc, const soclib::common::MappingTable &mtx, size_t x_width, size_t y_width, + size_t l_width, size_t tgtid_memc, size_t tgtid_xicu, @@ -106,8 +106,6 @@ cluster_id*nb_procs + p, mtd, // Mapping Table Direct - mtc, // Mapping Table Coherence IntTab(cluster_id,p), // SRCID_D - IntTab(cluster_id,p), // SRCID_C - IntTab(cluster_id,p), // TGTID_C + (cluster_id << l_width) + p, // CC_GLOBAL_ID 8, // ITLB ways 8, // ITLB sets @@ -120,5 +118,4 @@ x_width, y_width, - nb_procs, // MEMC local index frozen_cycles, // max frozen cycles debug_start_cycle, @@ -132,11 +129,10 @@ memc = new VciMemCache( smemc.str().c_str(), - mtd, mtc, mtx, + mtd, mtx, IntTab(cluster_id), // SRCID_X - IntTab(cluster_id, nb_procs), // SRCID_C IntTab(cluster_id, tgtid_memc), // TGTID_D - IntTab(cluster_id, nb_procs), // TGTID_C + (cluster_id << l_width) + nb_procs, // CC_GLOBAL_ID memc_ways, memc_sets, 16, // CACHE SIZE - //4096, // HEAP SIZE + 3, // MAX NUMBER OF COPIES 256, // HEAP SIZE 8, // TRANSACTION TABLE DEPTH @@ -166,5 +162,5 @@ nb_procs, // number of timer IRQs 32, // number of hard IRQs - 0, // number of soft IRQs + 32, // number of soft IRQs nb_procs); // number of output IRQs @@ -200,15 +196,49 @@ nb_direct_targets); // number of targets - std::cout << " - building xbarc_" << x_id << "_" << y_id << std::endl; + std::cout << " - building ringc_" << x_id << "_" << y_id << std::endl; std::ostringstream sc; - sc << "xbarc_" << x_id << "_" << y_id; - xbarc = new VciLocalCrossbar( - sc.str().c_str(), - mtc, - IntTab(cluster_id), // cluster initiator index - IntTab(cluster_id), // cluster target index - nb_procs + 1, // number of initiators - nb_procs + 1); // number of targets + sc << "ringc_" << x_id << "_" << y_id; + //ringc = new soclib::caba::DspinLocalRingFastC(sc.str().c_str(),mtc, IntTab(cluster_id), 2, 2, 2, nb_procs + 1, x_width, y_width); + // + // coherence network + // - tgtid_c_proc = srcid_c_proc = local procid + // - tgtid_c_memc = srcid_c_memc = NB_PROCS_MAX +#define address_width 32 +#define srcid_width 14 +#include "../../../../giet_vm/hard_config.h" +#define cluster(x,y) (y + CLUSTER_Y*x) + MappingTable maptabc(address_width, + IntTab(x_width + y_width, srcid_width - x_width - y_width), + IntTab(x_width + y_width, srcid_width - x_width - y_width), + 0x00FF0000); + + for (size_t x = 0; x < CLUSTER_X; x++) + { + for (size_t y = 0; y < CLUSTER_Y; y++) + { + sc_uint offset = cluster(x,y) << (address_width-x_width-y_width); + + // cleanup requests must be routed to the memory cache + std::ostringstream sh; + sh << "c_seg_memc_" << x << "_" << y; + maptabc.add(Segment(sh.str(), (NB_PROCS_MAX << (address_width - srcid_width)) + offset, + 0x10, IntTab(cluster(x,y), NB_PROCS_MAX), false)); + + // update & invalidate requests must be routed to the proper processor + for ( size_t p = 0 ; p < NB_PROCS_MAX ; p++) + { + std::ostringstream sp; + sp << "c_seg_proc_" << x << "_" << y << "_" << p; + maptabc.add( Segment( sp.str() , (p << (address_width - srcid_width)) + offset , + 0x10 , IntTab(cluster(x,y), p) , false)); + } + } + } + std::cout << maptabc << std::endl; + // + // + // + ringc = new soclib::caba::DspinLocalRingFastC(sc.str().c_str(),maptabc, IntTab(cluster_id), 2, 2, 1, nb_procs, x_width, y_width); std::cout << " - building wrappers in cluster_" << x_id << "_" << y_id << std::endl; @@ -225,18 +255,4 @@ tgtwrapperd = new VciVdspinTargetWrapper( wtd.str().c_str(), - 4, // cmd fifo depth - 4); // rsp fifo depth - - std::ostringstream wic; - wic << "iniwrapperc_" << x_id << "_" << y_id; - iniwrapperc = new VciVdspinInitiatorWrapper( - wic.str().c_str(), - 4, // cmd fifo depth - 4); // rsp fifo depth - - std::ostringstream wtc; - wtc << "tgtwrapperc_" << x_id << "_" << y_id; - tgtwrapperc = new VciVdspinTargetWrapper( - wtc.str().c_str(), 4, // cmd fifo depth 4); // rsp fifo depth @@ -367,16 +383,4 @@ tgtwrapperd->p_dspin_in (signal_dspin_cmd_g2l_d); - iniwrapperc->p_clk (this->p_clk); - iniwrapperc->p_resetn (this->p_resetn); - iniwrapperc->p_vci (signal_vci_l2g_c); - iniwrapperc->p_dspin_out (signal_dspin_cmd_l2g_c); - iniwrapperc->p_dspin_in (signal_dspin_rsp_g2l_c); - - tgtwrapperc->p_clk (this->p_clk); - tgtwrapperc->p_resetn (this->p_resetn); - tgtwrapperc->p_vci (signal_vci_g2l_c); - tgtwrapperc->p_dspin_out (signal_dspin_rsp_l2g_c); - tgtwrapperc->p_dspin_in (signal_dspin_cmd_g2l_c); - std::cout << " - VCI/DSPIN wrappers connected" << std::endl; @@ -411,18 +415,23 @@ std::cout << " - Direct crossbar connected" << std::endl; - // CROSSBAR coherence - xbarc->p_clk (this->p_clk); - xbarc->p_resetn (this->p_resetn); - xbarc->p_initiator_to_up (signal_vci_l2g_c); - xbarc->p_target_to_up (signal_vci_g2l_c); - xbarc->p_to_initiator[nb_procs] (signal_vci_ini_c_memc); - xbarc->p_to_target[nb_procs] (signal_vci_tgt_c_memc); + // RING coherence + ringc->p_clk (this->p_clk); + ringc->p_resetn (this->p_resetn); + //ringc procs for (size_t p = 0; p < nb_procs; p++) { - xbarc->p_to_target[p] (signal_vci_tgt_c_proc[p]); - xbarc->p_to_initiator[p] (signal_vci_ini_c_proc[p]); - } - - std::cout << " - Coherence crossbar connected" << std::endl; + ringc->p_rsp_in[p](signal_dspin_c_from_proc[p]); + ringc->p_cmd_out[p](signal_dspin_c_to_proc[p]); + } + //ringc memc + ringc->p_cmd_in[0](signal_dspin_c_from_memc); + ringc->p_rsp_out[0](signal_dspin_c_to_memc); + //ringc router + ringc->p_cmd_in[1](signal_dspin_cmd_g2l_c); + ringc->p_rsp_in[nb_procs](signal_dspin_rsp_g2l_c); + ringc->p_cmd_out[nb_procs](signal_dspin_cmd_l2g_c); + ringc->p_rsp_out[1](signal_dspin_rsp_l2g_c); + + std::cout << " - Coherence ring connected" << std::endl; // Processors @@ -431,7 +440,7 @@ proc[p]->p_clk (this->p_clk); proc[p]->p_resetn (this->p_resetn); - proc[p]->p_vci_ini_d (signal_vci_ini_d_proc[p]); - proc[p]->p_vci_ini_c (signal_vci_ini_c_proc[p]); - proc[p]->p_vci_tgt_c (signal_vci_tgt_c_proc[p]); + proc[p]->p_vci (signal_vci_ini_d_proc[p]); + proc[p]->p_dspin_in (signal_dspin_c_to_proc[p]); + proc[p]->p_dspin_out (signal_dspin_c_from_proc[p]); proc[p]->p_irq[0] (signal_proc_it[p]); for ( size_t j = 1 ; j < 6 ; j++) @@ -477,6 +486,6 @@ memc->p_vci_ixr (signal_vci_xram); memc->p_vci_tgt (signal_vci_tgt_d_memc); - memc->p_vci_ini (signal_vci_ini_c_memc); - memc->p_vci_tgt_cleanup (signal_vci_tgt_c_memc); + memc->p_dspin_in (signal_dspin_c_to_memc); + memc->p_dspin_out (signal_dspin_c_from_memc); std::cout << " - MEMC connected" << std::endl; Index: branches/v5/platforms/tsar_mono_mmu/soclib.conf =================================================================== --- branches/v5/platforms/tsar_mono_mmu/soclib.conf (revision 350) +++ branches/v5/platforms/tsar_mono_mmu/soclib.conf (revision 351) @@ -1,5 +1,6 @@ config.default.toolchain.set("cflags", config.default.toolchain.cflags + ['-DI_WANT_ILLEGAL_VCI']) -#config.addDescPath("/path/to/tsar/trunk/lib/") -#config.addDescPath("/path/to/tsar/trunk/modules/") -#config.addDescPath("/path/to/tsar/branches/v5/modules/") +#config.addDescPath("path/to/tsar/trunk/lib/") +#config.addDescPath("path/to/tsar/trunk/modules/") +#config.addDescPath("path/to/tsar/branches/v5/modules/") +#config.addDescPath("path/to/tsar/branches/v5/communication/") Index: branches/v5/platforms/tsar_mono_mmu/top.cpp =================================================================== --- branches/v5/platforms/tsar_mono_mmu/top.cpp (revision 350) +++ branches/v5/platforms/tsar_mono_mmu/top.cpp (revision 351) @@ -71,5 +71,5 @@ bool trace_ok = false; size_t from_cycle = 0; // debug start cycle - size_t max_frozen = 10000; // max number of frozen cycles + size_t max_frozen = 100000; // max number of frozen cycles size_t nprocs = 1; @@ -166,6 +166,7 @@ VciSignals signal_vci_ini_d_proc ("vci_ini_d_proc"); - VciSignals signal_vci_ini_c_proc ("vci_ini_c_proc"); - VciSignals signal_vci_tgt_c_proc ("vci_tgt_c_proc"); + // dspin coherence network + DspinSignals<33> signal_dspin_from_proc ("dspin_from_proc"); + DspinSignals<40> signal_dspin_from_memc ("dspin_from_memc"); VciSignals signal_vci_tgt_d_mtty ("signal_vci_tgt_d_mtty"); @@ -193,10 +194,8 @@ VciCcVCacheWrapper proc("proc", - 0, // proc_id + 0, // proc_id maptabd, // direct space - maptabc, // coherence space - IntTab(0), // srcid_d - IntTab(0), // srcid_c - IntTab(0), // tgtid_c + 0, // srcid_d + 0, // id_c 8,8, // itlb size 8,8, // dtlb size @@ -204,7 +203,6 @@ 4,64,16, // dcache size 4, 4, // wbuf size - 0, 0, // x, y Width - nprocs, // memory cache local id - max_frozen, // max frozen cycles + 0, 0, // x, y Width + max_frozen, // max frozen cycles from_cycle, trace_ok); @@ -224,11 +222,10 @@ memc("memc", maptabd, - maptabc, maptabd, - IntTab(0), // srcid_x - IntTab(1), // srcid_c - IntTab(0), // tgtid_d - IntTab(1), // tgtid_c + 0, // srcid_x + 0, // tgtid_d + 1, // cc_id 16,256,16, // cache size + 3, // MAX NUMBER OF COPIES 1024, // HEAP size 4, // TRT size @@ -271,5 +268,5 @@ 2, 8); - +/* VciVgmn ringc("ringc", @@ -279,4 +276,5 @@ 2, 8); +*/ // net-list @@ -289,7 +287,7 @@ proc.p_irq[4] (signal_false); proc.p_irq[5] (signal_false); - proc.p_vci_ini_d (signal_vci_ini_d_proc); - proc.p_vci_ini_c (signal_vci_ini_c_proc); - proc.p_vci_tgt_c (signal_vci_tgt_c_proc); + proc.p_vci (signal_vci_ini_d_proc); + proc.p_dspin_in (signal_dspin_from_memc); + proc.p_dspin_out (signal_dspin_from_proc); rom.p_clk (signal_clk); @@ -322,6 +320,6 @@ memc.p_resetn (signal_resetn); memc.p_vci_tgt (signal_vci_tgt_d_memc); - memc.p_vci_tgt_cleanup (signal_vci_tgt_c_memc); - memc.p_vci_ini (signal_vci_ini_c_memc); + memc.p_dspin_in (signal_dspin_from_proc); + memc.p_dspin_out (signal_dspin_from_memc); memc.p_vci_ixr (signal_vci_xram); @@ -330,4 +328,5 @@ xram.p_vci (signal_vci_xram); +/* ringc.p_clk (signal_clk); ringc.p_resetn (signal_resetn); @@ -336,4 +335,5 @@ ringc.p_to_target[0] (signal_vci_tgt_c_proc); ringc.p_to_target[1] (signal_vci_tgt_c_memc); +*/ ringd.p_clk (signal_clk); @@ -367,6 +367,6 @@ memc.print_trace(); signal_vci_ini_d_proc.print_trace("proc_ini_d"); - signal_vci_tgt_c_proc.print_trace("proc_tgt_c"); - signal_vci_ini_c_proc.print_trace("proc_ini_c"); + signal_dspin_from_memc.print_trace("proc_dspin_in_c"); + signal_dspin_from_proc.print_trace("proc_dspin_out_c"); signal_vci_tgt_d_memc.print_trace("memc_tgt_d"); signal_vci_tgt_c_memc.print_trace("memc_tgt_c"); Index: branches/v5/platforms/tsarv5_generic_mmu/soclib.conf =================================================================== --- branches/v5/platforms/tsarv5_generic_mmu/soclib.conf (revision 350) +++ branches/v5/platforms/tsarv5_generic_mmu/soclib.conf (revision 351) @@ -1,7 +1,6 @@ config.default.toolchain.set("cflags", config.default.toolchain.cflags + ['-DI_WANT_ILLEGAL_VCI']) -config.addDescPath("/Users/alain/soc/tsar-svn-2013") -config.addDescPath("/Users/alain/soc/tsar-svn-2013/branches/v5/modules") -config.addDescPath("/Users/alain/soc/tsar-svn-2013/branches/v5/communication") - -config.addDescPath("/Users/alain/soc/tsar-svn-2013/trunk/modules") +#config.addDescPath("/path/to/tsar/trunk/lib/") +#config.addDescPath("/path/to/tsar/trunk/modules/") +#config.addDescPath("/path/to/tsar/branches/v5/modules/") +#config.addDescPath("/path/to/tsar/branches/v5/communication/") Index: branches/v5/platforms/tsarv5_generic_mmu/top.cpp =================================================================== --- branches/v5/platforms/tsarv5_generic_mmu/top.cpp (revision 350) +++ branches/v5/platforms/tsarv5_generic_mmu/top.cpp (revision 351) @@ -155,8 +155,8 @@ #define BDEV_SECTOR_SIZE 512 -#define BDEV_IMAGE_NAME "/Users/alain/Documents/licence/almo_svn_2011/soft/giet_vm/display/images.raw" - -#define NIC_RX_NAME "/Users/alain/Documents/licence/almo_svn_2011/soft/giet_vm/nic/rx_data.txt" -#define NIC_TX_NAME "/Users/alain/Documents/licence/almo_svn_2011/soft/giet_vm/nic/tx_data.txt" +#define BDEV_IMAGE_NAME "giet_vm/display/images.raw" + +#define NIC_RX_NAME "giet_vm/nic/rx_data.txt" +#define NIC_TX_NAME "giet_vm/nic/tx_data.txt" #define NIC_TIMEOUT 10000 @@ -165,5 +165,5 @@ //////////////////////i///////////////////////////////////// -#define BOOT_SOFT_NAME "/Users/alain/Documents/licence/almo_svn_2011/soft/giet_vm/soft.elf" +#define BOOT_SOFT_NAME "giet_vm/soft.elf" //////////////////////////////////////////////////////////// Index: branches/v5/platforms/tsarv5_generic_mmu/tsarv5_cluster_mmu/caba/metadata/tsarv5_cluster_mmu.sd =================================================================== --- branches/v5/platforms/tsarv5_generic_mmu/tsarv5_cluster_mmu/caba/metadata/tsarv5_cluster_mmu.sd (revision 350) +++ branches/v5/platforms/tsarv5_generic_mmu/tsarv5_cluster_mmu/caba/metadata/tsarv5_cluster_mmu.sd (revision 351) @@ -16,8 +16,8 @@ Uses('common:mapping_table'), Uses('common:iss2'), - Uses('caba:vci_cc_vcache_wrapper_dspin_coherence', + Uses('caba:vci_cc_vcache_wrapper', iss_t = 'common:gdb_iss', gdb_iss_t = 'common:mips32el'), - Uses('caba:vci_mem_cache_dspin_coherence'), + Uses('caba:vci_mem_cache'), Uses('caba:vci_simple_ram'), Uses('caba:vci_xicu'), Index: branches/v5/platforms/tsarv5_generic_mmu/tsarv5_cluster_mmu/caba/source/include/tsarv5_cluster_mmu.h =================================================================== --- branches/v5/platforms/tsarv5_generic_mmu/tsarv5_cluster_mmu/caba/source/include/tsarv5_cluster_mmu.h (revision 350) +++ branches/v5/platforms/tsarv5_generic_mmu/tsarv5_cluster_mmu/caba/source/include/tsarv5_cluster_mmu.h (revision 351) @@ -31,6 +31,6 @@ #include "vci_framebuffer.h" #include "vci_multi_dma.h" -#include "vci_mem_cache_dspin_coherence.h" -#include "vci_cc_vcache_wrapper_dspin_coherence.h" +#include "vci_mem_cache.h" +#include "vci_cc_vcache_wrapper.h" namespace soclib { namespace caba { Index: branches/v5/platforms/tsarv5_generic_mmu/tsarv5_cluster_mmu/caba/source/src/tsarv5_cluster_mmu.cpp =================================================================== --- branches/v5/platforms/tsarv5_generic_mmu/tsarv5_cluster_mmu/caba/source/src/tsarv5_cluster_mmu.cpp (revision 350) +++ branches/v5/platforms/tsarv5_generic_mmu/tsarv5_cluster_mmu/caba/source/src/tsarv5_cluster_mmu.cpp (revision 351) @@ -126,5 +126,6 @@ swip << "wi_proc_" << x_id << "_" << y_id; wi_proc[p] = new VciDspinInitiatorWrapper( - swip.str().c_str() ); + swip.str().c_str(), + x_width + y_width ); } @@ -152,5 +153,6 @@ swtm << "wt_memc_" << x_id << "_" << y_id; wt_memc = new VciDspinTargetWrapper( - swtm.str().c_str() ); + swtm.str().c_str(), + x_width + y_width ); ///////////////////////////////////////////////////////////////////////////// @@ -169,5 +171,6 @@ swtx << "wt_xram_" << x_id << "_" << y_id; wt_xram = new VciDspinTargetWrapper( - swtx.str().c_str() ); + swtx.str().c_str(), + x_width + y_width ); ///////////////////////////////////////////////////////////////////////////// @@ -188,5 +191,6 @@ swtu << "wt_xicu_" << x_id << "_" << y_id; wt_xicu = new VciDspinTargetWrapper( - swtu.str().c_str() ); + swtu.str().c_str(), + x_width + y_width ); ///////////////////////////////////////////////////////////////////////////// @@ -206,10 +210,12 @@ swta << "wt_mdma_" << x_id << "_" << y_id; wt_mdma = new VciDspinTargetWrapper( - swtu.str().c_str() ); + swtu.str().c_str(), + x_width + y_width ); std::ostringstream swia; swia << "wi_mdma_" << x_id << "_" << y_id; wi_mdma = new VciDspinInitiatorWrapper( - swtu.str().c_str() ); + swtu.str().c_str(), + x_width + y_width ); ///////////////////////////////////////////////////////////////////////////// @@ -319,5 +325,6 @@ loader); - wt_brom = new VciDspinTargetWrapper("wt_brom"); + wt_brom = new VciDspinTargetWrapper("wt_brom", + x_width + y_width ); ///////////////////////////////////////////// @@ -330,5 +337,6 @@ xfb, yfb); - wt_fbuf = new VciDspinTargetWrapper("wt_fbuf"); + wt_fbuf = new VciDspinTargetWrapper("wt_fbuf", + x_width + y_width ); ///////////////////////////////////////////// @@ -344,6 +352,8 @@ 64); // burst size - wt_bdev = new VciDspinTargetWrapper("wt_bdev"); - wi_bdev = new VciDspinInitiatorWrapper("wi_bdev"); + wt_bdev = new VciDspinTargetWrapper("wt_bdev", + x_width + y_width ); + wi_bdev = new VciDspinInitiatorWrapper("wi_bdev", + x_width + y_width ); ///////////////////////////////////////////// @@ -360,5 +370,6 @@ 0 ); // mac_2 address - wt_mnic = new VciDspinTargetWrapper("wt_mnic"); + wt_mnic = new VciDspinTargetWrapper("wt_mnic", + x_width + y_width ); ///////////////////////////////////////////// @@ -378,5 +389,6 @@ vect_names); - wt_mtty = new VciDspinTargetWrapper("wt_mtty"); + wt_mtty = new VciDspinTargetWrapper("wt_mtty", + x_width + y_width ); }