Index: trunk/platforms/tsar_generic_xbar/tsar_xbar_cluster/caba/source/include/tsar_xbar_cluster.h
===================================================================
--- trunk/platforms/tsar_generic_xbar/tsar_xbar_cluster/caba/source/include/tsar_xbar_cluster.h	(revision 378)
+++ trunk/platforms/tsar_generic_xbar/tsar_xbar_cluster/caba/source/include/tsar_xbar_cluster.h	(revision 378)
@@ -0,0 +1,210 @@
+//////////////////////////////////////////////////////////////////////////////
+// File: tsar_xbar_cluster_mmu.h
+// Author: Alain Greiner 
+// Copyright: UPMC/LIP6
+// Date : march 2011
+// This program is released under the GNU public license
+//////////////////////////////////////////////////////////////////////////////
+
+#ifndef SOCLIB_CABA_TSAR_XBAR_CLUSTER_H
+#define SOCLIB_CABA_TSAR_XBAR_CLUSTER_H
+
+#include <systemc>
+#include <sys/time.h>
+#include <iostream>
+#include <sstream>
+#include <cstdlib>
+#include <cstdarg>
+
+#include "gdbserver.h"
+#include "mapping_table.h"
+#include "mips32.h"
+#include "vci_simple_ram.h"
+#include "vci_xicu.h"
+#include "dspin_local_crossbar.h"
+#include "vci_dspin_initiator_wrapper.h"
+#include "vci_dspin_target_wrapper.h"
+#include "virtual_dspin_router.h"
+#include "vci_multi_tty.h"
+#include "vci_multi_nic.h"
+#include "vci_block_device_tsar.h"
+#include "vci_framebuffer.h"
+#include "vci_multi_dma.h"
+#include "vci_mem_cache.h"
+#include "vci_cc_vcache_wrapper.h"
+
+namespace soclib { namespace caba	{
+
+///////////////////////////////////////////////////////////////////////////
+template<typename vci_param, typename iss_t, int cmd_width, int rsp_width>
+class TsarXbarCluster 
+///////////////////////////////////////////////////////////////////////////
+    : public soclib::caba::BaseModule
+{
+
+  public:
+
+	// Ports
+    sc_in<bool>                             		p_clk;
+    sc_in<bool>                             		p_resetn;
+	soclib::caba::DspinOutput<cmd_width>   			**p_cmd_out;
+	soclib::caba::DspinInput<cmd_width>    			**p_cmd_in;
+    soclib::caba::DspinOutput<rsp_width>           	**p_rsp_out;
+    soclib::caba::DspinInput<rsp_width>            	**p_rsp_in;
+
+    // interrupt signals
+	sc_signal<bool>     	signal_false;
+	sc_signal<bool> 		signal_proc_it[8];
+	sc_signal<bool> 		signal_irq_mdma[8];
+	sc_signal<bool>			signal_irq_mtty[23];
+	sc_signal<bool> 		signal_irq_mnic_rx[8];	// unused
+	sc_signal<bool> 		signal_irq_mnic_tx[8];	// unused
+	sc_signal<bool> 		signal_irq_bdev;
+	
+	// DSPIN signals between DSPIN routers and local_crossbars
+	DspinSignals<cmd_width> 	signal_dspin_cmd_l2g_d; 
+	DspinSignals<cmd_width> 	signal_dspin_cmd_g2l_d; 
+	DspinSignals<cmd_width> 	signal_dspin_m2p_l2g_c;
+	DspinSignals<cmd_width> 	signal_dspin_m2p_g2l_c; 
+	DspinSignals<rsp_width> 	signal_dspin_rsp_l2g_d; 
+	DspinSignals<rsp_width> 	signal_dspin_rsp_g2l_d; 
+	DspinSignals<rsp_width> 	signal_dspin_p2m_l2g_c;
+	DspinSignals<rsp_width> 	signal_dspin_p2m_g2l_c;
+
+	// Direct VCI signals to VCI/DSPIN wrappers
+	VciSignals<vci_param> 		signal_vci_ini_proc[8]; 
+	VciSignals<vci_param>  		signal_vci_ini_mdma; 
+	VciSignals<vci_param>  		signal_vci_ini_bdev; 
+
+	VciSignals<vci_param>		signal_vci_tgt_memc;
+	VciSignals<vci_param> 		signal_vci_tgt_xicu;
+	VciSignals<vci_param> 		signal_vci_tgt_mdma;
+	VciSignals<vci_param> 		signal_vci_tgt_mtty;
+	VciSignals<vci_param> 		signal_vci_tgt_bdev;
+	VciSignals<vci_param> 		signal_vci_tgt_brom;
+	VciSignals<vci_param> 		signal_vci_tgt_fbuf;
+	VciSignals<vci_param> 		signal_vci_tgt_mnic;
+
+	// Direct DSPIN signals to local crossbars
+	DspinSignals<cmd_width>     signal_dspin_cmd_proc_i[8];
+	DspinSignals<rsp_width>     signal_dspin_rsp_proc_i[8];
+	DspinSignals<cmd_width>     signal_dspin_cmd_mdma_i;
+	DspinSignals<rsp_width>     signal_dspin_rsp_mdma_i;
+	DspinSignals<cmd_width>     signal_dspin_cmd_bdev_i;
+	DspinSignals<rsp_width>     signal_dspin_rsp_bdev_i;
+
+	DspinSignals<cmd_width>     signal_dspin_cmd_memc_t;
+	DspinSignals<rsp_width>     signal_dspin_rsp_memc_t;
+	DspinSignals<cmd_width>     signal_dspin_cmd_xicu_t;
+	DspinSignals<rsp_width>     signal_dspin_rsp_xicu_t;
+	DspinSignals<cmd_width>     signal_dspin_cmd_mdma_t;
+	DspinSignals<rsp_width>     signal_dspin_rsp_mdma_t;
+	DspinSignals<cmd_width>     signal_dspin_cmd_mtty_t;
+	DspinSignals<rsp_width>     signal_dspin_rsp_mtty_t;
+	DspinSignals<cmd_width>     signal_dspin_cmd_bdev_t;
+	DspinSignals<rsp_width>     signal_dspin_rsp_bdev_t;
+	DspinSignals<cmd_width>     signal_dspin_cmd_brom_t;
+	DspinSignals<rsp_width>     signal_dspin_rsp_brom_t;
+	DspinSignals<cmd_width>     signal_dspin_cmd_fbuf_t;
+	DspinSignals<rsp_width>     signal_dspin_rsp_fbuf_t;
+	DspinSignals<cmd_width>     signal_dspin_cmd_mnic_t;
+	DspinSignals<rsp_width>     signal_dspin_rsp_mnic_t;
+
+	// Coherence DSPIN signals to local crossbar
+	DspinSignals<cmd_width>     signal_dspin_m2p_memc;
+	DspinSignals<rsp_width>     signal_dspin_p2m_memc;
+	DspinSignals<cmd_width>     signal_dspin_m2p_proc[8];
+	DspinSignals<rsp_width>     signal_dspin_p2m_proc[8];
+
+	// external RAM VCI signal
+	VciSignals<vci_param> 		signal_vci_xram;
+	
+    // Components
+
+    VciCcVCacheWrapper<vci_param, iss_t>*                 	    proc[8];
+    VciDspinInitiatorWrapper<vci_param,cmd_width,rsp_width>*    wi_proc[4];
+
+    VciMemCache<vci_param>*                               	    memc;
+    VciDspinTargetWrapper<vci_param,cmd_width,rsp_width>*       wt_memc;
+
+    VciXicu<vci_param>*                                     	xicu;
+    VciDspinTargetWrapper<vci_param,cmd_width,rsp_width>*       wt_xicu;
+
+    VciMultiDma<vci_param>*                                     mdma;
+    VciDspinInitiatorWrapper<vci_param,cmd_width,rsp_width>*    wi_mdma;
+    VciDspinTargetWrapper<vci_param,cmd_width,rsp_width>*       wt_mdma;
+
+    VciSimpleRam<vci_param>*                                    xram;
+    VciDspinTargetWrapper<vci_param,cmd_width,rsp_width>*       wt_xram;
+
+    VciSimpleRam<vci_param>*                                    brom;
+    VciDspinTargetWrapper<vci_param,cmd_width,rsp_width>*       wt_brom;
+
+    VciMultiTty<vci_param>*                                     mtty;
+    VciDspinTargetWrapper<vci_param,cmd_width,rsp_width>*       wt_mtty;
+
+    VciFrameBuffer<vci_param>*                                  fbuf;
+    VciDspinTargetWrapper<vci_param,cmd_width,rsp_width>*       wt_fbuf;
+
+    VciMultiNic<vci_param>*                                     mnic;
+    VciDspinTargetWrapper<vci_param,cmd_width,rsp_width>*       wt_mnic;
+
+    VciBlockDeviceTsar<vci_param>*                              bdev;
+    VciDspinInitiatorWrapper<vci_param,cmd_width,rsp_width>*    wi_bdev;
+    VciDspinTargetWrapper<vci_param,cmd_width,rsp_width>*       wt_bdev;
+
+    DspinLocalCrossbar<cmd_width>*                              xbar_cmd_d;
+    DspinLocalCrossbar<rsp_width>*                              xbar_rsp_d;
+    DspinLocalCrossbar<cmd_width>*                              xbar_m2p_c;
+    DspinLocalCrossbar<rsp_width>*                              xbar_p2m_c;
+
+    VirtualDspinRouter<cmd_width>*	                        	router_cmd;
+    VirtualDspinRouter<rsp_width>*                              router_rsp;
+
+	TsarXbarCluster( sc_module_name                     insname,
+                     size_t                             nb_procs,      // number of processors 
+                     size_t                             nb_ttys,       // number of TTY terminals 
+                     size_t                             nb_dmas,       // number of DMA channels 
+                     size_t                             x,             // x coordinate
+                     size_t                             y,             // y coordinate
+                     size_t                             cluster,       // y + ymax*x
+                     const soclib::common::MappingTable &mtd,          // direct mapping table
+                     const soclib::common::MappingTable &mtx,          // xram mapping table
+                     size_t	                            x_width,       // x field number of bits
+                     size_t	                            y_width,       // y field number of bits
+                     size_t	                            l_width,       // l field number of bits
+                     size_t	                            tgtid_memc,
+                     size_t	                            tgtid_xicu,
+                     size_t                             tgtid_mdma,
+                     size_t	                            tgtid_fbuf,
+                     size_t                             tgtid_mtty,
+                     size_t                             tgtid_brom,
+                     size_t                             tgtid_mnic,
+                     size_t                             tgtid_bdev,
+                     size_t                             memc_ways,
+                     size_t                             memc_sets,
+                     size_t                             l1_i_ways,
+                     size_t                             l1_i_sets, 
+                     size_t                             l1_d_ways,
+                     size_t                             l1_d_sets,	
+                     size_t                             xram_latency,  // external ram latency
+                     bool                               io,	           // I/O cluster if true
+                     size_t                             xfb,           // frame buffer pixels
+                     size_t                             yfb,           // frame buffer lines
+                     char*                              disk_name,     // virtual disk for BDEV
+                     size_t                             block_size,    // block size for BDEV
+                     size_t                             nic_channels,  // number of channels
+                     char*                              nic_rx_name,   // file name rx packets
+                     char*                              nic_tx_name,   // file name tx packets
+                     uint32_t							nic_timeout,   // number of cycles
+			         const Loader                       &loader,       // loader for BROM
+                     uint32_t                           frozen_cycles, // max frozen cycles
+                     uint32_t                           start_debug_cycle,
+                     bool                               memc_debug_ok, 
+                     bool                               proc_debug_ok); 
+
+	~TsarXbarCluster();
+};
+}}
+
+#endif
Index: trunk/platforms/tsar_generic_xbar/tsar_xbar_cluster/caba/source/include/tsarv5_cluster_mmu.h
===================================================================
--- branches/v5/platforms/tsarv5_generic_mmu/tsarv5_cluster_mmu/caba/source/include/tsarv5_cluster_mmu.h	(revision 351)
+++ 	(revision )
@@ -1,210 +1,0 @@
-//////////////////////////////////////////////////////////////////////////////
-// File: tsarv5_cluster_mmu.h
-// Author: Alain Greiner 
-// Copyright: UPMC/LIP6
-// Date : march 2011
-// This program is released under the GNU public license
-//////////////////////////////////////////////////////////////////////////////
-
-#ifndef SOCLIB_CABA_TSAR_CLUSTER_V5_MMU_H
-#define SOCLIB_CABA_TSAR_CLUSTER_V5_MMU_H
-
-#include <systemc>
-#include <sys/time.h>
-#include <iostream>
-#include <sstream>
-#include <cstdlib>
-#include <cstdarg>
-
-#include "gdbserver.h"
-#include "mapping_table.h"
-#include "mips32.h"
-#include "vci_simple_ram.h"
-#include "vci_xicu.h"
-#include "dspin_local_crossbar.h"
-#include "vci_dspin_initiator_wrapper.h"
-#include "vci_dspin_target_wrapper.h"
-#include "virtual_dspin_router.h"
-#include "vci_multi_tty.h"
-#include "vci_multi_nic.h"
-#include "vci_block_device_tsar_v4.h"
-#include "vci_framebuffer.h"
-#include "vci_multi_dma.h"
-#include "vci_mem_cache.h"
-#include "vci_cc_vcache_wrapper.h"
-
-namespace soclib { namespace caba	{
-
-///////////////////////////////////////////////////////////////////////////
-template<typename vci_param, typename iss_t, int cmd_width, int rsp_width>
-class TsarV5ClusterMmu 
-///////////////////////////////////////////////////////////////////////////
-    : public soclib::caba::BaseModule
-{
-
-  public:
-
-	// Ports
-    sc_in<bool>                             		p_clk;
-    sc_in<bool>                             		p_resetn;
-	soclib::caba::DspinOutput<cmd_width>   			**p_cmd_out;
-	soclib::caba::DspinInput<cmd_width>    			**p_cmd_in;
-    soclib::caba::DspinOutput<rsp_width>           	**p_rsp_out;
-    soclib::caba::DspinInput<rsp_width>            	**p_rsp_in;
-
-    // interrupt signals
-	sc_signal<bool>     	signal_false;
-	sc_signal<bool> 		signal_proc_it[8];
-	sc_signal<bool> 		signal_irq_mdma[8];
-	sc_signal<bool>			signal_irq_mtty[23];
-	sc_signal<bool> 		signal_irq_mnic_rx[8];	// unused
-	sc_signal<bool> 		signal_irq_mnic_tx[8];	// unused
-	sc_signal<bool> 		signal_irq_bdev;
-	
-	// DSPIN signals between DSPIN routers and local_crossbars
-	DspinSignals<cmd_width> 	signal_dspin_cmd_l2g_d; 
-	DspinSignals<cmd_width> 	signal_dspin_cmd_g2l_d; 
-	DspinSignals<cmd_width> 	signal_dspin_m2p_l2g_c;
-	DspinSignals<cmd_width> 	signal_dspin_m2p_g2l_c; 
-	DspinSignals<rsp_width> 	signal_dspin_rsp_l2g_d; 
-	DspinSignals<rsp_width> 	signal_dspin_rsp_g2l_d; 
-	DspinSignals<rsp_width> 	signal_dspin_p2m_l2g_c;
-	DspinSignals<rsp_width> 	signal_dspin_p2m_g2l_c;
-
-	// Direct VCI signals to VCI/DSPIN wrappers
-	VciSignals<vci_param> 		signal_vci_ini_proc[8]; 
-	VciSignals<vci_param>  		signal_vci_ini_mdma; 
-	VciSignals<vci_param>  		signal_vci_ini_bdev; 
-
-	VciSignals<vci_param>		signal_vci_tgt_memc;
-	VciSignals<vci_param> 		signal_vci_tgt_xicu;
-	VciSignals<vci_param> 		signal_vci_tgt_mdma;
-	VciSignals<vci_param> 		signal_vci_tgt_mtty;
-	VciSignals<vci_param> 		signal_vci_tgt_bdev;
-	VciSignals<vci_param> 		signal_vci_tgt_brom;
-	VciSignals<vci_param> 		signal_vci_tgt_fbuf;
-	VciSignals<vci_param> 		signal_vci_tgt_mnic;
-
-	// Direct DSPIN signals to local crossbars
-	DspinSignals<cmd_width>     signal_dspin_cmd_proc_i[8];
-	DspinSignals<rsp_width>     signal_dspin_rsp_proc_i[8];
-	DspinSignals<cmd_width>     signal_dspin_cmd_mdma_i;
-	DspinSignals<rsp_width>     signal_dspin_rsp_mdma_i;
-	DspinSignals<cmd_width>     signal_dspin_cmd_bdev_i;
-	DspinSignals<rsp_width>     signal_dspin_rsp_bdev_i;
-
-	DspinSignals<cmd_width>     signal_dspin_cmd_memc_t;
-	DspinSignals<rsp_width>     signal_dspin_rsp_memc_t;
-	DspinSignals<cmd_width>     signal_dspin_cmd_xicu_t;
-	DspinSignals<rsp_width>     signal_dspin_rsp_xicu_t;
-	DspinSignals<cmd_width>     signal_dspin_cmd_mdma_t;
-	DspinSignals<rsp_width>     signal_dspin_rsp_mdma_t;
-	DspinSignals<cmd_width>     signal_dspin_cmd_mtty_t;
-	DspinSignals<rsp_width>     signal_dspin_rsp_mtty_t;
-	DspinSignals<cmd_width>     signal_dspin_cmd_bdev_t;
-	DspinSignals<rsp_width>     signal_dspin_rsp_bdev_t;
-	DspinSignals<cmd_width>     signal_dspin_cmd_brom_t;
-	DspinSignals<rsp_width>     signal_dspin_rsp_brom_t;
-	DspinSignals<cmd_width>     signal_dspin_cmd_fbuf_t;
-	DspinSignals<rsp_width>     signal_dspin_rsp_fbuf_t;
-	DspinSignals<cmd_width>     signal_dspin_cmd_mnic_t;
-	DspinSignals<rsp_width>     signal_dspin_rsp_mnic_t;
-
-	// Coherence DSPIN signals to local crossbar
-	DspinSignals<cmd_width>     signal_dspin_m2p_memc;
-	DspinSignals<rsp_width>     signal_dspin_p2m_memc;
-	DspinSignals<cmd_width>     signal_dspin_m2p_proc[8];
-	DspinSignals<rsp_width>     signal_dspin_p2m_proc[8];
-
-	// external RAM VCI signal
-	VciSignals<vci_param> 		signal_vci_xram;
-	
-    // Components
-
-    VciCcVCacheWrapper<vci_param, iss_t>*                 	    proc[8];
-    VciDspinInitiatorWrapper<vci_param,cmd_width,rsp_width>*    wi_proc[4];
-
-    VciMemCache<vci_param>*                               	    memc;
-    VciDspinTargetWrapper<vci_param,cmd_width,rsp_width>*       wt_memc;
-
-    VciXicu<vci_param>*                                     	xicu;
-    VciDspinTargetWrapper<vci_param,cmd_width,rsp_width>*       wt_xicu;
-
-    VciMultiDma<vci_param>*                                     mdma;
-    VciDspinInitiatorWrapper<vci_param,cmd_width,rsp_width>*    wi_mdma;
-    VciDspinTargetWrapper<vci_param,cmd_width,rsp_width>*       wt_mdma;
-
-    VciSimpleRam<vci_param>*                                    xram;
-    VciDspinTargetWrapper<vci_param,cmd_width,rsp_width>*       wt_xram;
-
-    VciSimpleRam<vci_param>*                                    brom;
-    VciDspinTargetWrapper<vci_param,cmd_width,rsp_width>*       wt_brom;
-
-    VciMultiTty<vci_param>*                                     mtty;
-    VciDspinTargetWrapper<vci_param,cmd_width,rsp_width>*       wt_mtty;
-
-    VciFrameBuffer<vci_param>*                                  fbuf;
-    VciDspinTargetWrapper<vci_param,cmd_width,rsp_width>*       wt_fbuf;
-
-    VciMultiNic<vci_param>*                                     mnic;
-    VciDspinTargetWrapper<vci_param,cmd_width,rsp_width>*       wt_mnic;
-
-    VciBlockDeviceTsarV4<vci_param>*                            bdev;
-    VciDspinInitiatorWrapper<vci_param,cmd_width,rsp_width>*    wi_bdev;
-    VciDspinTargetWrapper<vci_param,cmd_width,rsp_width>*       wt_bdev;
-
-    DspinLocalCrossbar<cmd_width>*                              xbar_cmd_d;
-    DspinLocalCrossbar<rsp_width>*                              xbar_rsp_d;
-    DspinLocalCrossbar<cmd_width>*                              xbar_m2p_c;
-    DspinLocalCrossbar<rsp_width>*                              xbar_p2m_c;
-
-    VirtualDspinRouter<cmd_width>*	                        	router_cmd;
-    VirtualDspinRouter<rsp_width>*                              router_rsp;
-
-	TsarV5ClusterMmu(sc_module_name                     insname,
-                     size_t                             nb_procs,      // number of processors 
-                     size_t                             nb_ttys,       // number of TTY terminals 
-                     size_t                             nb_dmas,       // number of DMA channels 
-                     size_t                             x,             // x coordinate
-                     size_t                             y,             // y coordinate
-                     size_t                             cluster,       // y + ymax*x
-                     const soclib::common::MappingTable &mtd,          // direct mapping table
-                     const soclib::common::MappingTable &mtx,          // xram mapping table
-                     size_t	                            x_width,       // x field number of bits
-                     size_t	                            y_width,       // y field number of bits
-                     size_t	                            l_width,       // l field number of bits
-                     size_t	                            tgtid_memc,
-                     size_t	                            tgtid_xicu,
-                     size_t                             tgtid_mdma,
-                     size_t	                            tgtid_fbuf,
-                     size_t                             tgtid_mtty,
-                     size_t                             tgtid_brom,
-                     size_t                             tgtid_mnic,
-                     size_t                             tgtid_bdev,
-                     size_t                             memc_ways,
-                     size_t                             memc_sets,
-                     size_t                             l1_i_ways,
-                     size_t                             l1_i_sets, 
-                     size_t                             l1_d_ways,
-                     size_t                             l1_d_sets,	
-                     size_t                             xram_latency,  // external ram latency
-                     bool                               io,	           // I/O cluster if true
-                     size_t                             xfb,           // frame buffer pixels
-                     size_t                             yfb,           // frame buffer lines
-                     char*                              disk_name,     // virtual disk for BDEV
-                     size_t                             block_size,    // block size for BDEV
-                     size_t                             nic_channels,  // number of channels
-                     char*                              nic_rx_name,   // file name rx packets
-                     char*                              nic_tx_name,   // file name tx packets
-                     uint32_t							nic_timeout,   // number of cycles
-			         const Loader                       &loader,       // loader for BROM
-                     uint32_t                           frozen_cycles, // max frozen cycles
-                     uint32_t                           start_debug_cycle,
-                     bool                               memc_debug_ok, 
-                     bool                               proc_debug_ok); 
-
-	~TsarV5ClusterMmu();
-};
-}}
-
-#endif
