Index: /trunk/platforms/tsar_generic_xbar/soclib.conf =================================================================== --- /trunk/platforms/tsar_generic_xbar/soclib.conf (revision 378) +++ /trunk/platforms/tsar_generic_xbar/soclib.conf (revision 379) @@ -1,3 +1,2 @@ -config.default.toolchain.set("cflags", config.default.toolchain.cflags + ['-DI_WANT_ILLEGAL_VCI']) -config.addDescPath("/dsk/l1/misc/joannou/tsar/trunk/") +config.addDescPath("/Users/alain/soc/tsar-trunk-svn-2013/") Index: /trunk/platforms/tsar_generic_xbar/top.cpp =================================================================== --- /trunk/platforms/tsar_generic_xbar/top.cpp (revision 378) +++ /trunk/platforms/tsar_generic_xbar/top.cpp (revision 379) @@ -16,4 +16,5 @@ // - It uses the vci_mem_cache // - It contains one vci_xicu and one vci_multi_dma per cluster. +// - It contains one vci_simple ram per cluster to model the L3 cache. // // All clusters are identical, but the cluster containing address @@ -27,5 +28,5 @@ // It is build with one single component implementing a cluster: // The Tsarv4ClusterMmu component is defined in files -// tsarv4_cluster_mmu.* (with * = cpp, h, sd) +// tsar_xbar_cluster.* (with * = cpp, h, sd) // // The IRQs are connected to XICUs as follow: @@ -157,6 +158,6 @@ #define BDEV_IMAGE_NAME "giet_vm/display/images.raw" -#define NIC_RX_NAME "giet_vm/nic/rx_data.txt" -#define NIC_TX_NAME "giet_vm/nic/tx_data.txt" +#define NIC_RX_NAME "giet_vm/nic/rx_packets.txt" +#define NIC_TX_NAME "giet_vm/nic/tx_packets.txt" #define NIC_TIMEOUT 10000 @@ -426,42 +427,4 @@ } std::cout << maptabd << std::endl; - -/* - WE DONT NEED any COHERENCE MAPPING TABLE, AS THE DIRECT NETWORK - USES DIRECT ADRESSING (XID,YID,LID) - - // coherence network - // - tgtid_c_proc = srcid_c_proc = local procid - // - tgtid_c_memc = srcid_c_memc = NB_PROCS_MAX - MappingTable maptabc(address_width, - IntTab(x_width + y_width, srcid_width - x_width - y_width), - IntTab(x_width + y_width, srcid_width - x_width - y_width), - 0x00FF0000); - - for (size_t x = 0; x < CLUSTER_X; x++) - { - for (size_t y = 0; y < CLUSTER_Y; y++) - { - sc_uint offset = cluster(x,y) << (address_width-x_width-y_width); - - // cleanup requests must be routed to the memory cache - std::ostringstream sh; - sh << "c_seg_memc_" << x << "_" << y; - maptabc.add(Segment(sh.str(), (NB_PROCS_MAX << (address_width - srcid_width)) + offset, - 0x10, IntTab(cluster(x,y), NB_PROCS_MAX), false)); - - // update & invalidate requests must be routed to the proper processor - for ( size_t p = 0 ; p < NB_PROCS_MAX ; p++) - { - std::ostringstream sp; - sp << "c_seg_proc_" << x << "_" << y << "_" << p; - maptabc.add( Segment( sp.str() , (p << (address_width - srcid_width)) + offset , - 0x10 , IntTab(cluster(x,y), p) , false)); - } - } - } - std::cout << maptabc << std::endl; - -*/ // external network @@ -601,5 +564,8 @@ ); + std::cout << std::endl; std::cout << "cluster_" << x << "_" << y << " constructed" << std::endl; + std::cout << std::endl; + #if USE_OPENMP } // end critical @@ -796,46 +762,41 @@ clusters[1][1]->signal_dspin_rsp_brom_t.print_trace("DIRECT rsp_out_brom_1_1"); */ + // trace proc[debug_proc_id] + if ( debug_proc_id < (CLUSTER_X * CLUSTER_Y * NB_PROCS_MAX) ) + { + size_t l = debug_proc_id % (CLUSTER_X * CLUSTER_Y) ; + size_t y = (debug_proc_id / NB_PROCS_MAX) % CLUSTER_Y ; + size_t x = debug_proc_id / (CLUSTER_Y * NB_PROCS_MAX) ; + + std::ostringstream signame; + signame << "VCI signal PROC_" << x << "_" << y << "_" << l; + + clusters[x][y]->proc[l]->print_trace(); + clusters[x][y]->signal_vci_ini_proc[l].print_trace("signame"); + } /* - // trace proc[debug_proc_id] - if ( debug_proc_id < (CLUSTER_X * CLUSTER_Y * NB_PROCS_MAX) ) - { - size_t proc_x = debug_proc_id / CLUSTER_Y; - size_t proc_y = debug_proc_id % CLUSTER_Y; - - clusters[proc_x][proc_y]->proc[0]->print_trace(); - clusters[proc_x][proc_y]->signal_vci_ini_proc[0].print_trace("proc_0"); - } - - // trace memc[debug_memc_id] - if ( debug_memc_id < (CLUSTER_X * CLUSTER_Y) ) - { - size_t memc_x = debug_memc_id / CLUSTER_Y; - size_t memc_y = debug_memc_id % CLUSTER_Y; - - clusters[memc_x][memc_y]->memc->print_trace(); - clusters[memc_x][memc_y]->signal_vci_tgt_memc.print_trace("memc"); - } + // trace memc[debug_memc_id] + if ( debug_memc_id < (CLUSTER_X * CLUSTER_Y) ) + { + size_t x = debug_memc_id / CLUSTER_Y; + size_t y = debug_memc_id % CLUSTER_Y; + + std::ostringstream signame; + signame << "VCI signal MEMC_" << x << "_" << y; + + clusters[memc_x][memc_y]->memc->print_trace(); + clusters[memc_x][memc_y]->signal_vci_tgt_memc.print_trace("signame"); + } */ -// clusters[0][0]->signal_vci_tgt_xicu.print_trace("xicu_0_0"); -// clusters[0][1]->signal_vci_tgt_xicu.print_trace("xicu_0_1"); -// clusters[1][0]->signal_vci_tgt_xicu.print_trace("xicu_1_0"); -// clusters[1][1]->signal_vci_tgt_xicu.print_trace("xicu_1_1"); - -// if ( clusters[1][1]->signal_irq_mdma[0].read() ) -// std::cout << std::endl << " IRQ_DMA_1_1 activated" << std::endl; -// if ( clusters[1][1]->signal_proc_it[0].read() ) -// std::cout << " IRQ_PROC_1_1 activated" << std::endl << std::endl; - -// trace ioc component -// size_t io_x = cluster_io_id / CLUSTER_Y; -// size_t io_y = cluster_io_id % CLUSTER_Y; -// clusters[io_x][io_y]->bdev->print_trace(); -// clusters[io_x][io_y]->signal_vci_tgt_bdev.print_trace("bdev_tgt "); -// clusters[io_x][io_y]->signal_vci_ini_bdev.print_trace("bdev_ini "); - -// clusters[1][1]->mdma->print_trace(); -// clusters[1][1]->signal_vci_tgt_mdma.print_trace("mdma_1_1_tgt "); -// clusters[1][1]->signal_vci_ini_mdma.print_trace("mdma_1_1_ini "); - + // trace external peripherals + size_t io_x = cluster_io_id / CLUSTER_Y; + size_t io_y = cluster_io_id % CLUSTER_Y; + + clusters[io_x][io_y]->signal_vci_tgt_mtty.print_trace("VCI signal TTY"); +/* + clusters[io_x][io_y]->bdev->print_trace(); + clusters[io_x][io_y]->signal_vci_tgt_bdev.print_trace("VCI signal BDEV_TGT"); + clusters[io_x][io_y]->signal_vci_ini_bdev.print_trace("VCI signal BDEV_INI"); +*/ } Index: /trunk/platforms/tsar_generic_xbar/tsar_xbar_cluster/caba/source/src/tsar_xbar_cluster.cpp =================================================================== --- /trunk/platforms/tsar_generic_xbar/tsar_xbar_cluster/caba/source/src/tsar_xbar_cluster.cpp (revision 378) +++ /trunk/platforms/tsar_generic_xbar/tsar_xbar_cluster/caba/source/src/tsar_xbar_cluster.cpp (revision 379) @@ -102,5 +102,5 @@ { std::ostringstream sproc; - sproc << "proc_" << x_id << "_" << y_id << "_" << p; + sproc << "proc_" << p; proc[p] = new VciCcVCacheWrapper( sproc.str().c_str(), @@ -133,8 +133,6 @@ std::cout << " - building memc_" << x_id << "_" << y_id << std::endl; - std::ostringstream smemc; - smemc << "memc_" << x_id << "_" << y_id; memc = new VciMemCache( - smemc.str().c_str(), + "memc", mtd, // Mapping Table direct space mtx, // Mapping Table external space @@ -150,8 +148,6 @@ memc_debug_ok ); - std::ostringstream swtm; - swtm << "wt_memc_" << x_id << "_" << y_id; wt_memc = new VciDspinTargetWrapper( - swtm.str().c_str(), + "wt_memc", x_width + y_width + l_width); @@ -159,26 +155,16 @@ std::cout << " - building xram_" << x_id << "_" << y_id << std::endl; - std::ostringstream sxram; - sxram << "xram_" << x_id << "_" << y_id; xram = new VciSimpleRam( - sxram.str().c_str(), + "xram", IntTab(cluster_id), mtx, loader, xram_latency); -/* - std::ostringstream swtx; - swtx << "wt_xram_" << x_id << "_" << y_id; - wt_xram = new VciDspinTargetWrapper( - swtx.str().c_str(), - x_width + y_width ); -*/ + ///////////////////////////////////////////////////////////////////////////// std::cout << " - building xicu_" << x_id << "_" << y_id << std::endl; - std::ostringstream sicu; - sicu << "xicu_" << x_id << "_" << y_id; xicu = new VciXicu( - sicu.str().c_str(), + "xicu", mtd, // mapping table IntTab(cluster_id, tgtid_xicu), // TGTID_D @@ -188,8 +174,6 @@ nb_procs); // number of output IRQs - std::ostringstream swtu; - swtu << "wt_xicu_" << x_id << "_" << y_id; wt_xicu = new VciDspinTargetWrapper( - swtu.str().c_str(), + "wt_xicu", x_width + y_width + l_width); @@ -197,24 +181,18 @@ std::cout << " - building mdma_" << x_id << "_" << y_id << std::endl; - std::ostringstream sdma; - sdma << "dma_" << x_id << "_" << y_id; mdma = new VciMultiDma( - sdma.str().c_str(), + "mdma", mtd, IntTab(cluster_id, nb_procs), // SRCID IntTab(cluster_id, tgtid_mdma), // TGTID 64, // burst size - nb_dmas); // number of IRQs - - std::ostringstream swta; - swta << "wt_mdma_" << x_id << "_" << y_id; + nb_dmas); // number of IRQs + wt_mdma = new VciDspinTargetWrapper( - swtu.str().c_str(), - x_width + y_width + l_width); - - std::ostringstream swia; - swia << "wi_mdma_" << x_id << "_" << y_id; + "wt_mdma", + x_width + y_width + l_width); + wi_mdma = new VciDspinInitiatorWrapper( - swtu.str().c_str(), + "wi_mdma", x_width + y_width + l_width); @@ -230,8 +208,6 @@ } - std::ostringstream sdcmd; - sdcmd << "xbar_cmd_d_" << x_id << "_" << y_id; xbar_cmd_d = new DspinLocalCrossbar( - sdcmd.str().c_str(), + "xbar_cmd_d", mtd, // mapping table x_id, y_id, // cluster coordinates @@ -246,8 +222,6 @@ std::cout << " - building xbar_rsp_d_" << x_id << "_" << y_id << std::endl; - std::ostringstream sdrsp; - sdrsp << "xbar_rsp_d_" << x_id << "_" << y_id; xbar_rsp_d = new DspinLocalCrossbar( - sdrsp.str().c_str(), + "xbar_rsp_d", mtd, // mapping table x_id, y_id, // cluster coordinates @@ -262,8 +236,6 @@ std::cout << " - building xbar_m2p_c" << x_id << "_" << y_id << std::endl; - std::ostringstream sccmd; - sccmd << "xbar_m2p_c_" << x_id << "_" << y_id; xbar_m2p_c = new DspinLocalCrossbar( - sccmd.str().c_str(), + "xbar_m2p_c", mtd, // mapping table x_id, y_id, // cluster coordinates @@ -278,24 +250,20 @@ std::cout << " - building xbar_p2m_c_" << x_id << "_" << y_id << std::endl; - std::ostringstream scrsp; - scrsp << "xbar_p2m_c_" << x_id << "_" << y_id; xbar_p2m_c = new DspinLocalCrossbar( - scrsp.str().c_str(), + "xbar_p2m_c", mtd, // mapping table x_id, y_id, // cluster coordinates - x_width, y_width, 0, // l_width unused on the network going from proc to memc (only X and Y identifie the cluster) + x_width, y_width, 0, // l_width unused on p2m network nb_procs, // number of local sources 1, // number of local dests 2, 2, // fifo depths false, // don't use local routing table - false ); // no broacast + false ); // no broacast ///////////////////////////////////////////////////////////////////////////// std::cout << " - building router_cmd_" << x_id << "_" << y_id << std::endl; - std::ostringstream scmdr; - scmdr << "router_cmd_" << x_id << "_" << y_id; router_cmd = new VirtualDspinRouter( - scmdr.str().c_str(), + "router_cmd", x_id,y_id, // coordinate in the mesh x_width, y_width, // x & y fields width @@ -305,8 +273,6 @@ std::cout << " - building router_rsp_" << x_id << "_" << y_id << std::endl; - std::ostringstream srspr; - srspr << "router_rsp_" << x_id << "_" << y_id; router_rsp = new VirtualDspinRouter( - srspr.str().c_str(), + "router_rsp", x_id,y_id, // coordinates in mesh x_width, y_width, // x & y fields width