Index: trunk/modules/vci_block_device_tsar/caba/source/include/vci_block_device_tsar.h
===================================================================
--- trunk/modules/vci_block_device_tsar/caba/source/include/vci_block_device_tsar.h	(revision 391)
+++ trunk/modules/vci_block_device_tsar/caba/source/include/vci_block_device_tsar.h	(revision 392)
@@ -40,7 +40,7 @@
 // asserted when the transfer is completed. 
 //
-// As a target this block device controler contains 8 memory mapped registers,
-// taking 32 bytes in the address space.
-// - BLOCK_DEVICE_BUFFER        0x00 (read/write)    Memory buffer base address.
+// As a target this block device controler contains 9 memory mapped registers,
+// taking 36 bytes in the address space.
+// - BLOCK_DEVICE_BUFFER        0x00 (read/write)    Memory buffer base address (32 LSB bits)
 // - BLOCK_DEVICE_COUNT         0x04 (read/write)    Number of blocks to be transfered.
 // - BLOCK_DEVICE_LBA           0x08 (read/write)    Index of first block in the file.
@@ -50,4 +50,5 @@
 // - BLOCK_DEVICE_SIZE          0x18 (read-only)     Number of addressable blocks.
 // - BLOCK_DEVICE_BLOCK_SIZE    0x1C (read_only)     Block size in bytes.
+// - BLOCK_DEVICE_BUFFER_EXT    0x20 (read_only)     Memory buffer base address (32 MSB bits)
 //
 // The following operations codes are supported: 
@@ -96,35 +97,35 @@
 
     // Registers
-    sc_signal<int>            	 r_target_fsm;   	 // target fsm state register
-    sc_signal<int>               r_initiator_fsm;    // initiator fsm state register
-    sc_signal<bool>              r_irq_enable;   	 // default value is true
-    sc_signal<uint32_t>          r_nblocks;      	 // number of blocks in transfer
-    sc_signal<uint32_t>          r_buf_address;  	 // memory buffer address
-    sc_signal<uint32_t>          r_lba;          	 // first block index
-    sc_signal<bool>              r_read;         	 // requested operation
-    sc_signal<uint32_t>          r_index;        	 // flit index in local buffer
-    sc_signal<uint32_t>          r_latency_count;    // latency counter 
-    sc_signal<uint32_t>          r_flit_count;   	 // flit counter (in a burst)
-    sc_signal<uint32_t>          r_burst_count;   	 // burst counter (in a block)
-    sc_signal<uint32_t>          r_block_count;  	 // block counter (in a transfer)
-    sc_signal<uint32_t>          r_burst_offset;     // number of non aligned flits
-    sc_signal<uint32_t>          r_burst_nflits;     // number of flits in a burst
-    sc_signal<bool>              r_go;           	 // command from T_FSM to M_FSM
-
-    sc_signal<sc_dt::sc_uint<vci_param::S> >	r_srcid;		// save srcid
-    sc_signal<sc_dt::sc_uint<vci_param::T> >	r_trdid;		// save trdid
-    sc_signal<sc_dt::sc_uint<vci_param::P> >	r_pktid;		// save pktid
-
-    uint32_t*                    r_local_buffer; 	 // capacity is one block 
+    sc_signal<int>            	      r_target_fsm;   	  // target fsm state register
+    sc_signal<int>                    r_initiator_fsm;    // initiator fsm state register
+    sc_signal<bool>                   r_irq_enable;   	  // default value is true
+    sc_signal<uint32_t>               r_nblocks;      	  // number of blocks in transfer
+    sc_signal<uint64_t>               r_buf_address;  	  // memory buffer address 
+    sc_signal<uint32_t>               r_lba;          	  // first block index
+    sc_signal<bool>                   r_read;         	  // requested operation
+    sc_signal<uint32_t>               r_index;        	  // flit index in local buffer
+    sc_signal<uint32_t>               r_latency_count;    // latency counter 
+    sc_signal<uint32_t>               r_flit_count;   	  // flit counter (in a burst)
+    sc_signal<uint32_t>               r_burst_count;   	  // burst counter (in a block)
+    sc_signal<uint32_t>               r_block_count;  	  // block counter (in a transfer)
+    sc_signal<uint32_t>               r_burst_offset;     // number of non aligned flits
+    sc_signal<uint32_t>               r_burst_nflits;     // number of flits in a burst
+    sc_signal<bool>                   r_go;           	  // command from T_FSM to M_FSM
+
+    sc_signal<sc_dt::sc_uint<vci_param::S> >	r_srcid;  // save srcid
+    sc_signal<sc_dt::sc_uint<vci_param::T> >	r_trdid;  // save trdid
+    sc_signal<sc_dt::sc_uint<vci_param::P> >	r_pktid;  // save pktid
+
+    uint32_t*                         r_local_buffer; 	  // capacity is one block 
 
     // structural parameters
-    soclib::common::Segment      m_segment;      	 // segment associated to target
-    uint32_t                     m_srcid;        	 // initiator index
-    int                          m_fd;           	 // File descriptor
-    uint64_t                     m_device_size;  	 // Total number of blocks
-    const uint32_t               m_flits_per_block;	 // number of flits in a block
-    const uint32_t               m_flits_per_burst;	 // number of flits in a burst
-    const uint32_t               m_bursts_per_block; // number of bursts in a block
-    const uint32_t               m_latency;      	 // device latency
+    soclib::common::Segment           m_segment;      	  // segment associated to target
+    uint32_t                          m_srcid;        	  // initiator index
+    int                               m_fd;           	  // File descriptor
+    uint64_t                          m_device_size;  	  // Total number of blocks
+    const uint32_t                    m_flits_per_block;  // number of flits in a block
+    const uint32_t                    m_flits_per_burst;  // number of flits in a burst
+    const uint32_t                    m_bursts_per_block; // number of bursts in a block
+    const uint32_t                    m_latency;      	  // device latency
 
     // methods
@@ -156,16 +157,18 @@
     T_WRITE_BUFFER      = 1,
     T_READ_BUFFER       = 2,
-    T_WRITE_COUNT       = 3,
-    T_READ_COUNT        = 4,
-    T_WRITE_LBA         = 5,
-    T_READ_LBA          = 6,
-    T_WRITE_OP          = 7,
-    T_READ_STATUS       = 8,
-    T_WRITE_IRQEN       = 9,
-    T_READ_IRQEN        = 10,
-    T_READ_SIZE         = 11,
-    T_READ_BLOCK        = 12,
-    T_READ_ERROR        = 13,
-    T_WRITE_ERROR       = 14,
+    T_WRITE_BUFFER_EXT  = 3,
+    T_READ_BUFFER_EXT   = 4,
+    T_WRITE_COUNT       = 5,
+    T_READ_COUNT        = 6,
+    T_WRITE_LBA         = 7,
+    T_READ_LBA          = 8,
+    T_WRITE_OP          = 9,
+    T_READ_STATUS       = 10,
+    T_WRITE_IRQEN       = 11,
+    T_READ_IRQEN        = 12,
+    T_READ_SIZE         = 13,
+    T_READ_BLOCK        = 14,
+    T_READ_ERROR        = 15,
+    T_WRITE_ERROR       = 16,
     };
 
