Index: trunk/platforms/tsar_generic_xbar/tsar_xbar_cluster/caba/metadata/tsar_xbar_cluster.sd
===================================================================
--- trunk/platforms/tsar_generic_xbar/tsar_xbar_cluster/caba/metadata/tsar_xbar_cluster.sd	(revision 389)
+++ trunk/platforms/tsar_generic_xbar/tsar_xbar_cluster/caba/metadata/tsar_xbar_cluster.sd	(revision 396)
@@ -2,72 +2,91 @@
 # -*- python -*-
 
-Module('caba:tsar_xbar_cluster',
+Module('caba:tsar_xbar_cluster', 
     classname = 'soclib::caba::TsarXbarCluster',
-    tmpl_parameters = [
-        parameter.Module('iss_t'),
-        parameter.Int('cmd_width'),
-        parameter.Int('rsp_width'),
+	tmpl_parameters = [
+		parameter.Int('dspin_cmd_width'),
+		parameter.Int('dspin_rsp_width'),
+        parameter.Module('vci_param_int'),
+        parameter.Module('vci_param_ext'),
         ],
-    header_files = [ '../source/include/tsar_xbar_cluster.h', ],
-    implementation_files = [ '../source/src/tsar_xbar_cluster.cpp', ],
-    uses = [
-        Uses('caba:base_module'),
-        Uses('common:mapping_table'),
-        Uses('common:iss2'),
-        Uses('caba:vci_cc_vcache_wrapper', 
-              vci_param       = 'caba:vci_param',
-              dspin_in_width  = parameter.Reference('cmd_width'),
-              dspin_out_width = parameter.Reference('rsp_width'),
+
+	header_files = [ '../source/include/tsar_xbar_cluster.h', ],
+	implementation_files = [ '../source/src/tsar_xbar_cluster.cpp', ],
+
+	uses = [
+		Uses('caba:base_module'),
+		Uses('common:mapping_table'),
+		Uses('common:iss2'),
+              
+		Uses('caba:vci_cc_vcache_wrapper', 
+              vci_param       = parameter.Reference('vci_param_int'),
+              dspin_in_width  = parameter.Reference('dspin_cmd_width'),
+              dspin_out_width = parameter.Reference('dspin_rsp_width'),
               iss_t           = 'common:gdb_iss', 
-              gdb_iss_t       = 'common:mips32el'
-            ),
-        Uses('caba:vci_mem_cache',
+              gdb_iss_t       = 'common:mips32el'),
+
+		Uses('caba:vci_simple_ram',
+              vci_param       = parameter.Reference('vci_param_int')),
+
+		Uses('caba:vci_simple_ram',
+              vci_param       = parameter.Reference('vci_param_ext')),
+
+        Uses('caba:vci_xicu',
+              vci_param       = parameter.Reference('vci_param_int')),
+
+        Uses('caba:dspin_local_crossbar', 
+              flit_width      = parameter.Reference('dspin_cmd_width')),
+
+        Uses('caba:dspin_local_crossbar', 
+              flit_width      = parameter.Reference('dspin_rsp_width')),
+
+        Uses('caba:virtual_dspin_router', 
+              flit_width      = parameter.Reference('dspin_cmd_width')),
+
+        Uses('caba:virtual_dspin_router', 
+              flit_width      = parameter.Reference('dspin_rsp_width')),
+            
+        Uses('caba:vci_multi_tty',
+              vci_param       = parameter.Reference('vci_param_int')),
+
+        Uses('caba:vci_framebuffer',
+              vci_param       = parameter.Reference('vci_param_int')),
+
+        Uses('caba:vci_multi_nic',
+              vci_param       = parameter.Reference('vci_param_int')),
+
+		Uses('caba:vci_block_device_tsar',
+              vci_param       = parameter.Reference('vci_param_int')),
+
+		Uses('caba:vci_multi_dma',
+              vci_param       = parameter.Reference('vci_param_int')),
+
+        Uses('caba:vci_dspin_target_wrapper',
+              vci_param       = parameter.Reference('vci_param_int')),
+
+        Uses('caba:vci_dspin_initiator_wrapper',
+              vci_param       = parameter.Reference('vci_param_int')),
+
+		Uses('caba:vci_mem_cache',
               vci_param_int   = 'caba:vci_param',
               vci_param_ext   = 'caba:vci_param_bis',
-              dspin_in_width  = parameter.Reference('rsp_width'),
-              dspin_out_width = parameter.Reference('cmd_width')
-            ),
-        Uses('caba:vci_simple_ram',
-              vci_param       = 'caba:vci_param_bis'
-            ),
-        Uses('caba:vci_simple_ram',
-              vci_param       = 'caba:vci_param'
-            ),
-        Uses('caba:vci_xicu'),
-        Uses('caba:dspin_local_crossbar', 
-              flit_width      = parameter.Reference('cmd_width')
-            ),
-        Uses('caba:dspin_local_crossbar', 
-              flit_width      = parameter.Reference('rsp_width')
-            ),
-        Uses('caba:vci_dspin_initiator_wrapper', 
-              dspin_cmd_width = parameter.Reference('cmd_width'),
-              dspin_rsp_width = parameter.Reference('rsp_width')
-            ),
-        Uses('caba:vci_dspin_target_wrapper',
-              dspin_cmd_width = parameter.Reference('cmd_width'),
-              dspin_rsp_width = parameter.Reference('rsp_width')
-            ),
-        Uses('caba:virtual_dspin_router', 
-              flit_width      = parameter.Reference('cmd_width')
-            ),
-        Uses('caba:virtual_dspin_router', 
-              flit_width      = parameter.Reference('rsp_width')
-            ),
-        Uses('caba:vci_multi_tty'),
-        Uses('caba:vci_framebuffer'),
-        Uses('caba:vci_multi_nic'),
-        Uses('caba:vci_block_device_tsar'),
-        Uses('caba:vci_multi_dma'),
-        Uses('common:elf_file_loader'),
-        ],
-    ports = [
-        Port('caba:bit_in'      , 'p_resetn' , auto = 'resetn'),
-        Port('caba:clock_in'    , 'p_clk'    , auto = 'clock'),
-        Port('caba:dspin_output', 'p_cmd_out', [2, 4], dspin_data_size = parameter.Reference('cmd_width')),
-        Port('caba:dspin_input' , 'p_cmd_in' , [2, 4], dspin_data_size = parameter.Reference('cmd_width')),
-        Port('caba:dspin_output', 'p_rsp_out', [2, 4], dspin_data_size = parameter.Reference('rsp_width')), 
-        Port('caba:dspin_input' , 'p_rsp_in' , [2, 4], dspin_data_size = parameter.Reference('rsp_width')),
-        ],
+              dspin_in_width  = parameter.Reference('dspin_rsp_width'),
+              dspin_out_width = parameter.Reference('dspin_cmd_width')),
+
+		Uses('common:elf_file_loader'),
+		],
+
+	ports = [
+		Port('caba:bit_in', 'p_resetn', auto = 'resetn'),
+		Port('caba:clock_in', 'p_clk', auto = 'clock'),
+		Port('caba:dspin_output', 'p_cmd_out', [2, 4], 
+              dspin_data_size = parameter.Reference('dspin_cmd_width')),
+		Port('caba:dspin_input', 'p_cmd_in', [2, 4], 
+              dspin_data_size = parameter.Reference('dspin_cmd_width')),
+		Port('caba:dspin_output', 'p_rsp_out', [2, 4], 
+              dspin_data_size = parameter.Reference('dspin_rsp_width')), 
+		Port('caba:dspin_input', 'p_rsp_in', [2, 4], 
+              dspin_data_size = parameter.Reference('dspin_rsp_width')),
+		],
 )
 
Index: trunk/platforms/tsar_generic_xbar/tsar_xbar_cluster/caba/source/include/tsar_xbar_cluster.h
===================================================================
--- trunk/platforms/tsar_generic_xbar/tsar_xbar_cluster/caba/source/include/tsar_xbar_cluster.h	(revision 389)
+++ trunk/platforms/tsar_generic_xbar/tsar_xbar_cluster/caba/source/include/tsar_xbar_cluster.h	(revision 396)
@@ -1,7 +1,7 @@
 //////////////////////////////////////////////////////////////////////////////
-// File: tsar_xbar_cluster_mmu.h
+// File: tsar_xbar_cluster.h
 // Author: Alain Greiner 
 // Copyright: UPMC/LIP6
-// Date : march 2011
+// Date : march 2013
 // This program is released under the GNU public license
 //////////////////////////////////////////////////////////////////////////////
@@ -34,197 +34,185 @@
 #include "vci_cc_vcache_wrapper.h"
 
-///////////////////////////////////////////////////////////
-//          VCI parameters for DIRECT network          
-///////////////////////////////////////////////////////////
-#define cell_width            4
-#define address_width         32
-#define plen_width            8
-#define error_width           2
-#define clen_width            1
-#define rflag_width           1
-#define srcid_width           14
-#define pktid_width           4
-#define trdid_width           4
-#define wrplen_width          1
-
-///////////////////////////////////////////////////////////
-//          VCI parameters for EXTERNAL network          
-///////////////////////////////////////////////////////////
-#define cell_width_ext        8 
-#define address_width_ext     address_width 
-#define plen_width_ext        plen_width   
-#define error_width_ext       error_width  
-#define clen_width_ext        clen_width   
-#define rflag_width_ext       rflag_width  
-#define srcid_width_ext       srcid_width  
-#define pktid_width_ext       pktid_width  
-#define trdid_width_ext       trdid_width  
-#define wrplen_width_ext      wrplen_width 
-
 namespace soclib { namespace caba {
 
 ///////////////////////////////////////////////////////////////////////////
-template<
-    typename iss_t, int cmd_width, int rsp_width
-    >
-class TsarXbarCluster 
+template<size_t dspin_cmd_width,
+         size_t dspin_rsp_width, 
+         typename vci_param_int,
+         typename vci_param_ext>  class TsarXbarCluster 
 ///////////////////////////////////////////////////////////////////////////
     : public soclib::caba::BaseModule
 {
-    // Define VCI parameters
-    typedef soclib::caba::VciParams<cell_width,
-            plen_width,
-            address_width,
-            error_width,                                   
-            clen_width,
-            rflag_width,
-            srcid_width,
-            pktid_width,
-            trdid_width,
-            wrplen_width> vci_param_d;
-
-    typedef soclib::caba::VciParamsBis<cell_width_ext,
-            plen_width_ext,
-            address_width_ext,
-            error_width_ext,                                   
-            clen_width_ext,
-            rflag_width_ext,
-            srcid_width_ext,
-            pktid_width_ext,
-            trdid_width_ext,
-            wrplen_width_ext> vci_param_x;
-
-  public:
-
-    // Ports
-    sc_in<bool>                                     p_clk;
-    sc_in<bool>                                     p_resetn;
-    soclib::caba::DspinOutput<cmd_width>            **p_cmd_out;
-    soclib::caba::DspinInput<cmd_width>             **p_cmd_in;
-    soclib::caba::DspinOutput<rsp_width>            **p_rsp_out;
-    soclib::caba::DspinInput<rsp_width>             **p_rsp_in;
+    public:
+
+	// Ports
+    sc_in<bool>                             		p_clk;
+    sc_in<bool>                             		p_resetn;
+	soclib::caba::DspinOutput<dspin_cmd_width>   	**p_cmd_out;
+	soclib::caba::DspinInput<dspin_cmd_width>    	**p_cmd_in;
+    soclib::caba::DspinOutput<dspin_rsp_width>     	**p_rsp_out;
+    soclib::caba::DspinInput<dspin_rsp_width>      	**p_rsp_in;
 
     // interrupt signals
-    sc_signal<bool>             signal_false;
-    sc_signal<bool>             signal_proc_it[8];
-    sc_signal<bool>             signal_irq_mdma[8];
-    sc_signal<bool>             signal_irq_mtty[23];
-    sc_signal<bool>             signal_irq_mnic_rx[8];  // unused
-    sc_signal<bool>             signal_irq_mnic_tx[8];  // unused
-    sc_signal<bool>             signal_irq_bdev;
-    
-    // DSPIN signals between DSPIN routers and local_crossbars
-    DspinSignals<cmd_width>     signal_dspin_cmd_l2g_d; 
-    DspinSignals<cmd_width>     signal_dspin_cmd_g2l_d; 
-    DspinSignals<cmd_width>     signal_dspin_m2p_l2g_c;
-    DspinSignals<cmd_width>     signal_dspin_m2p_g2l_c; 
-    DspinSignals<rsp_width>     signal_dspin_rsp_l2g_d; 
-    DspinSignals<rsp_width>     signal_dspin_rsp_g2l_d; 
-    DspinSignals<rsp_width>     signal_dspin_p2m_l2g_c;
-    DspinSignals<rsp_width>     signal_dspin_p2m_g2l_c;
-
-    // Direct VCI signals to VCI/DSPIN wrappers
-    VciSignals<vci_param_d>     signal_vci_ini_proc[8]; 
-    VciSignals<vci_param_d>     signal_vci_ini_mdma; 
-    VciSignals<vci_param_d>     signal_vci_ini_bdev; 
-
-    VciSignals<vci_param_d>     signal_vci_tgt_memc;
-    VciSignals<vci_param_d>     signal_vci_tgt_xicu;
-    VciSignals<vci_param_d>     signal_vci_tgt_mdma;
-    VciSignals<vci_param_d>     signal_vci_tgt_mtty;
-    VciSignals<vci_param_d>     signal_vci_tgt_bdev;
-    VciSignals<vci_param_d>     signal_vci_tgt_brom;
-    VciSignals<vci_param_d>     signal_vci_tgt_fbuf;
-    VciSignals<vci_param_d>     signal_vci_tgt_mnic;
-
-    // Direct DSPIN signals to local crossbars
-    DspinSignals<cmd_width>     signal_dspin_cmd_proc_i[8];
-    DspinSignals<rsp_width>     signal_dspin_rsp_proc_i[8];
-    DspinSignals<cmd_width>     signal_dspin_cmd_mdma_i;
-    DspinSignals<rsp_width>     signal_dspin_rsp_mdma_i;
-    DspinSignals<cmd_width>     signal_dspin_cmd_bdev_i;
-    DspinSignals<rsp_width>     signal_dspin_rsp_bdev_i;
-
-    DspinSignals<cmd_width>     signal_dspin_cmd_memc_t;
-    DspinSignals<rsp_width>     signal_dspin_rsp_memc_t;
-    DspinSignals<cmd_width>     signal_dspin_cmd_xicu_t;
-    DspinSignals<rsp_width>     signal_dspin_rsp_xicu_t;
-    DspinSignals<cmd_width>     signal_dspin_cmd_mdma_t;
-    DspinSignals<rsp_width>     signal_dspin_rsp_mdma_t;
-    DspinSignals<cmd_width>     signal_dspin_cmd_mtty_t;
-    DspinSignals<rsp_width>     signal_dspin_rsp_mtty_t;
-    DspinSignals<cmd_width>     signal_dspin_cmd_bdev_t;
-    DspinSignals<rsp_width>     signal_dspin_rsp_bdev_t;
-    DspinSignals<cmd_width>     signal_dspin_cmd_brom_t;
-    DspinSignals<rsp_width>     signal_dspin_rsp_brom_t;
-    DspinSignals<cmd_width>     signal_dspin_cmd_fbuf_t;
-    DspinSignals<rsp_width>     signal_dspin_rsp_fbuf_t;
-    DspinSignals<cmd_width>     signal_dspin_cmd_mnic_t;
-    DspinSignals<rsp_width>     signal_dspin_rsp_mnic_t;
-
-    // Coherence DSPIN signals to local crossbar
-    DspinSignals<cmd_width>     signal_dspin_m2p_memc;
-    DspinSignals<rsp_width>     signal_dspin_p2m_memc;
-    DspinSignals<cmd_width>     signal_dspin_m2p_proc[8];
-    DspinSignals<rsp_width>     signal_dspin_p2m_proc[8];
-
-    // external RAM VCI signal
-    VciSignals<vci_param_x>   signal_vci_xram;
-    
+	sc_signal<bool>     	signal_false;
+	sc_signal<bool> 		signal_proc_it[8];
+	sc_signal<bool> 		signal_irq_mdma[8];
+	sc_signal<bool>			signal_irq_mtty[23];
+	sc_signal<bool> 		signal_irq_mnic_rx[8];	// unused
+	sc_signal<bool> 		signal_irq_mnic_tx[8];	// unused
+	sc_signal<bool> 		signal_irq_bdev;
+	
+	// DSPIN signals between DSPIN routers and local_crossbars
+	DspinSignals<dspin_cmd_width> 	signal_dspin_cmd_l2g_d; 
+	DspinSignals<dspin_cmd_width> 	signal_dspin_cmd_g2l_d; 
+	DspinSignals<dspin_cmd_width> 	signal_dspin_m2p_l2g_c;
+	DspinSignals<dspin_cmd_width> 	signal_dspin_m2p_g2l_c; 
+	DspinSignals<dspin_rsp_width> 	signal_dspin_rsp_l2g_d; 
+	DspinSignals<dspin_rsp_width> 	signal_dspin_rsp_g2l_d; 
+	DspinSignals<dspin_rsp_width> 	signal_dspin_p2m_l2g_c;
+	DspinSignals<dspin_rsp_width> 	signal_dspin_p2m_g2l_c;
+
+	// Direct VCI signals to VCI/DSPIN wrappers
+	VciSignals<vci_param_int> 		signal_vci_ini_proc[8]; 
+	VciSignals<vci_param_int>  		signal_vci_ini_mdma; 
+	VciSignals<vci_param_int>  		signal_vci_ini_bdev; 
+
+	VciSignals<vci_param_int>		signal_vci_tgt_memc;
+	VciSignals<vci_param_int> 		signal_vci_tgt_xicu;
+	VciSignals<vci_param_int> 		signal_vci_tgt_mdma;
+	VciSignals<vci_param_int> 		signal_vci_tgt_mtty;
+	VciSignals<vci_param_int> 		signal_vci_tgt_bdev;
+	VciSignals<vci_param_int> 		signal_vci_tgt_brom;
+	VciSignals<vci_param_int> 		signal_vci_tgt_fbuf;
+	VciSignals<vci_param_int> 		signal_vci_tgt_mnic;
+
+	// Direct DSPIN signals to local crossbars
+	DspinSignals<dspin_cmd_width>     signal_dspin_cmd_proc_i[8];
+	DspinSignals<dspin_rsp_width>     signal_dspin_rsp_proc_i[8];
+	DspinSignals<dspin_cmd_width>     signal_dspin_cmd_mdma_i;
+	DspinSignals<dspin_rsp_width>     signal_dspin_rsp_mdma_i;
+	DspinSignals<dspin_cmd_width>     signal_dspin_cmd_bdev_i;
+	DspinSignals<dspin_rsp_width>     signal_dspin_rsp_bdev_i;
+
+	DspinSignals<dspin_cmd_width>     signal_dspin_cmd_memc_t;
+	DspinSignals<dspin_rsp_width>     signal_dspin_rsp_memc_t;
+	DspinSignals<dspin_cmd_width>     signal_dspin_cmd_xicu_t;
+	DspinSignals<dspin_rsp_width>     signal_dspin_rsp_xicu_t;
+	DspinSignals<dspin_cmd_width>     signal_dspin_cmd_mdma_t;
+	DspinSignals<dspin_rsp_width>     signal_dspin_rsp_mdma_t;
+	DspinSignals<dspin_cmd_width>     signal_dspin_cmd_mtty_t;
+	DspinSignals<dspin_rsp_width>     signal_dspin_rsp_mtty_t;
+	DspinSignals<dspin_cmd_width>     signal_dspin_cmd_bdev_t;
+	DspinSignals<dspin_rsp_width>     signal_dspin_rsp_bdev_t;
+	DspinSignals<dspin_cmd_width>     signal_dspin_cmd_brom_t;
+	DspinSignals<dspin_rsp_width>     signal_dspin_rsp_brom_t;
+	DspinSignals<dspin_cmd_width>     signal_dspin_cmd_fbuf_t;
+	DspinSignals<dspin_rsp_width>     signal_dspin_rsp_fbuf_t;
+	DspinSignals<dspin_cmd_width>     signal_dspin_cmd_mnic_t;
+	DspinSignals<dspin_rsp_width>     signal_dspin_rsp_mnic_t;
+
+	// Coherence DSPIN signals to local crossbar
+	DspinSignals<dspin_cmd_width>     signal_dspin_m2p_memc;
+	DspinSignals<dspin_rsp_width>     signal_dspin_p2m_memc;
+	DspinSignals<dspin_cmd_width>     signal_dspin_m2p_proc[8];
+	DspinSignals<dspin_rsp_width>     signal_dspin_p2m_proc[8];
+
+	// external RAM to MEMC VCI signal
+	VciSignals<vci_param_ext>         signal_vci_xram;
+	
     // Components
 
-    VciCcVCacheWrapper<vci_param_d, cmd_width, rsp_width, iss_t>* proc[8];
-    VciDspinInitiatorWrapper<vci_param_d,cmd_width,rsp_width>*    wi_proc[4];
-
-    VciMemCache<vci_param_d, vci_param_x, rsp_width, cmd_width> * memc;
-    VciDspinTargetWrapper<vci_param_d,cmd_width,rsp_width>*       wt_memc;
-
-    VciXicu<vci_param_d>*                                         xicu;
-    VciDspinTargetWrapper<vci_param_d,cmd_width,rsp_width>*       wt_xicu;
-
-    VciMultiDma<vci_param_d>*                                     mdma;
-    VciDspinInitiatorWrapper<vci_param_d,cmd_width,rsp_width>*    wi_mdma;
-    VciDspinTargetWrapper<vci_param_d,cmd_width,rsp_width>*       wt_mdma;
-
-    VciSimpleRam<vci_param_x>*                                    xram;
-
-    VciSimpleRam<vci_param_d>*                                    brom;
-    VciDspinTargetWrapper<vci_param_d,cmd_width,rsp_width>*       wt_brom;
-
-    VciMultiTty<vci_param_d>*                                     mtty;
-    VciDspinTargetWrapper<vci_param_d,cmd_width,rsp_width>*       wt_mtty;
-
-    VciFrameBuffer<vci_param_d>*                                  fbuf;
-    VciDspinTargetWrapper<vci_param_d,cmd_width,rsp_width>*       wt_fbuf;
-
-    VciMultiNic<vci_param_d>*                                     mnic;
-    VciDspinTargetWrapper<vci_param_d,cmd_width,rsp_width>*       wt_mnic;
-
-    VciBlockDeviceTsar<vci_param_d>*                              bdev;
-    VciDspinInitiatorWrapper<vci_param_d,cmd_width,rsp_width>*    wi_bdev;
-    VciDspinTargetWrapper<vci_param_d,cmd_width,rsp_width>*       wt_bdev;
-
-    DspinLocalCrossbar<cmd_width>*                                xbar_cmd_d;
-    DspinLocalCrossbar<rsp_width>*                                xbar_rsp_d;
-    DspinLocalCrossbar<cmd_width>*                                xbar_m2p_c;
-    DspinLocalCrossbar<rsp_width>*                                xbar_p2m_c;
-
-    VirtualDspinRouter<cmd_width>*                                router_cmd;
-    VirtualDspinRouter<rsp_width>*                                router_rsp;
-
-    TsarXbarCluster( sc_module_name                     insname,
-                     size_t                             nb_procs,      // number of processors 
-                     size_t                             nb_ttys,       // number of TTY terminals 
-                     size_t                             nb_dmas,       // number of DMA channels 
+    VciCcVCacheWrapper<vci_param_int, 
+                       dspin_cmd_width,
+                       dspin_rsp_width,
+                       GdbServer<Mips32ElIss> >*  proc[8];
+
+    VciDspinInitiatorWrapper<vci_param_int,
+                             dspin_cmd_width,
+                             dspin_rsp_width>*    wi_proc[8];
+
+    VciMemCache<vci_param_int, 
+                vci_param_ext, 
+                dspin_rsp_width, 
+                dspin_cmd_width>*                 memc;
+
+    VciDspinTargetWrapper<vci_param_int,
+                          dspin_cmd_width,
+                          dspin_rsp_width>*       wt_memc;
+
+    VciXicu<vci_param_int>*                       xicu;
+
+    VciDspinTargetWrapper<vci_param_int,
+                          dspin_cmd_width,
+                          dspin_rsp_width>*       wt_xicu;
+
+    VciMultiDma<vci_param_int>*                   mdma;
+
+    VciDspinInitiatorWrapper<vci_param_int,
+                             dspin_cmd_width,
+                             dspin_rsp_width>*    wi_mdma;
+
+    VciDspinTargetWrapper<vci_param_int,
+                          dspin_cmd_width,
+                          dspin_rsp_width>*       wt_mdma;
+
+    VciSimpleRam<vci_param_ext>*                  xram;
+
+    VciSimpleRam<vci_param_int>*                  brom;
+
+    VciDspinTargetWrapper<vci_param_int,
+                          dspin_cmd_width,
+                          dspin_rsp_width>*       wt_brom;
+
+    VciMultiTty<vci_param_int>*                   mtty;
+
+    VciDspinTargetWrapper<vci_param_int,
+                          dspin_cmd_width,
+                          dspin_rsp_width>*       wt_mtty;
+
+    VciFrameBuffer<vci_param_int>*                fbuf;
+
+    VciDspinTargetWrapper<vci_param_int,
+                          dspin_cmd_width,
+                          dspin_rsp_width>*       wt_fbuf;
+
+    VciMultiNic<vci_param_int>*                   mnic;
+
+    VciDspinTargetWrapper<vci_param_int,
+                          dspin_cmd_width,
+                          dspin_rsp_width>*       wt_mnic;
+
+    VciBlockDeviceTsar<vci_param_int>*            bdev;
+
+    VciDspinInitiatorWrapper<vci_param_int,
+                             dspin_cmd_width,
+                             dspin_rsp_width>*    wi_bdev;
+
+    VciDspinTargetWrapper<vci_param_int,
+                          dspin_cmd_width,
+                          dspin_rsp_width>*       wt_bdev;
+
+    DspinLocalCrossbar<dspin_cmd_width>*          xbar_cmd_d;
+    DspinLocalCrossbar<dspin_rsp_width>*          xbar_rsp_d;
+    DspinLocalCrossbar<dspin_cmd_width>*          xbar_m2p_c;
+    DspinLocalCrossbar<dspin_rsp_width>*          xbar_p2m_c;
+
+    VirtualDspinRouter<dspin_cmd_width>*          router_cmd;
+    VirtualDspinRouter<dspin_rsp_width>*          router_rsp;
+
+	TsarXbarCluster( sc_module_name                     insname,
+                     size_t                             nb_procs,      // processors 
+                     size_t                             nb_ttys,       // TTY terminals 
+                     size_t                             nb_dmas,       //  DMA channels 
                      size_t                             x,             // x coordinate
                      size_t                             y,             // y coordinate
                      size_t                             cluster,       // y + ymax*x
-                     const soclib::common::MappingTable &mtd,          // direct mapping table
-                     const soclib::common::MappingTable &mtx,          // xram mapping table
-                     size_t                             x_width,       // x field number of bits
-                     size_t                             y_width,       // y field number of bits
-                     size_t                             l_width,       // l field number of bits
-                     size_t                             tgtid_memc,
-                     size_t                             tgtid_xicu,
+                     const soclib::common::MappingTable &mtd,          // internal
+                     const soclib::common::MappingTable &mtx,          // external
+                     size_t	                            x_width,       // x field bits
+                     size_t	                            y_width,       // y field bits
+                     size_t	                            l_width,       // l field bits
+                     size_t	                            tgtid_memc,
+                     size_t	                            tgtid_xicu,
                      size_t                             tgtid_mdma,
                      size_t                             tgtid_fbuf,
@@ -239,21 +227,20 @@
                      size_t                             l1_d_ways,
                      size_t                             l1_d_sets,  
-                     size_t                             xram_latency,  // external ram latency
-                     bool                               io,            // I/O cluster if true
-                     size_t                             xfb,           // frame buffer pixels
-                     size_t                             yfb,           // frame buffer lines
-                     char*                              disk_name,     // virtual disk for BDEV
-                     size_t                             block_size,    // block size for BDEV
-                     size_t                             nic_channels,  // number of channels
-                     char*                              nic_rx_name,   // file name rx packets
-                     char*                              nic_tx_name,   // file name tx packets
-                     uint32_t                           nic_timeout,   // number of cycles
-                     const Loader                       &loader,       // loader for BROM
-                     uint32_t                           frozen_cycles, // max frozen cycles
+                     size_t                             xram_latency,  // external ram 
+                     bool                               io,	           // I/O cluster
+                     size_t                             xfb,           // fbf pixels
+                     size_t                             yfb,           // fbf lines
+                     char*                              disk_name,     // virtual disk 
+                     size_t                             block_size,    // block size 
+                     size_t                             nic_channels,  // number channels
+                     char*                              nic_rx_name,   // filename rx 
+                     char*                              nic_tx_name,   // filename tx 
+                     uint32_t							nic_timeout,   // cycles
+			         const Loader                       &loader,       
+                     uint32_t                           frozen_cycles, 
                      uint32_t                           start_debug_cycle,
                      bool                               memc_debug_ok, 
                      bool                               proc_debug_ok); 
 
-    ~TsarXbarCluster();
 };
 }}
Index: trunk/platforms/tsar_generic_xbar/tsar_xbar_cluster/caba/source/src/tsar_xbar_cluster.cpp
===================================================================
--- trunk/platforms/tsar_generic_xbar/tsar_xbar_cluster/caba/source/src/tsar_xbar_cluster.cpp	(revision 389)
+++ trunk/platforms/tsar_generic_xbar/tsar_xbar_cluster/caba/source/src/tsar_xbar_cluster.cpp	(revision 396)
@@ -15,6 +15,5 @@
 // - Each processor has a private dma channel (vci_multi_dma)
 // - It uses the vci_xicu interrupt controller
-// - The peripherals MTTY, BDEV, FBUF, MNIC and BROM are in the cluster 
-//   containing address 0xBFC00000.
+// - The peripherals MTTY, BDEV, FBUF, MNIC and BROM are in cluster (0,0)
 // - The Multi-TTY component controls up to 15 terminals. 
 // - Each Multi-DMA component controls up to 8 DMA channels.
@@ -26,17 +25,17 @@
 #include "../include/tsar_xbar_cluster.h"
 
-#define tmpl(x) template<\
-   typename iss_t,int cmd_width, int rsp_width> \
-   x TsarXbarCluster<\
-   iss_t, cmd_width, rsp_width\
-   >
 
 namespace soclib {
 namespace caba  {
 
-//////////////////////////////////////////////////////////////////////////
-//                 Constructor
-//////////////////////////////////////////////////////////////////////////
-tmpl(/**/)::TsarXbarCluster(
+////////////////////////////////////////////////////////////////////////////////////
+template<size_t dspin_cmd_width, 
+         size_t dspin_rsp_width,
+         typename vci_param_int,
+         typename vci_param_ext> TsarXbarCluster<dspin_cmd_width,
+                                                 dspin_rsp_width,
+                                                 vci_param_int,
+                                                 vci_param_ext>::TsarXbarCluster(
+////////////////////////////////////////////////////////////////////////////////////
          sc_module_name                     insname,
          size_t                             nb_procs,
@@ -86,19 +85,11 @@
 {
     // Vectors of ports definition
-
-    p_cmd_in        = alloc_elems<DspinInput<cmd_width> >("p_cmd_in", 2, 4);
-    p_cmd_out       = alloc_elems<DspinOutput<cmd_width> >("p_cmd_out", 2, 4);
-    p_rsp_in        = alloc_elems<DspinInput<rsp_width> >("p_rsp_in", 2, 4);
-    p_rsp_out       = alloc_elems<DspinOutput<rsp_width> >("p_rsp_out", 2, 4);
-
+    p_cmd_in        = alloc_elems<DspinInput<dspin_cmd_width> >("p_cmd_in", 2, 4);
+    p_cmd_out       = alloc_elems<DspinOutput<dspin_cmd_width> >("p_cmd_out", 2, 4);
+    p_rsp_in        = alloc_elems<DspinInput<dspin_rsp_width> >("p_rsp_in", 2, 4);
+    p_rsp_out       = alloc_elems<DspinOutput<dspin_rsp_width> >("p_rsp_out", 2, 4);
+
+    /////////////////////////////////////////////////////////////////////////////
     // Components definition 
-
-    // on direct network : local srcid[proc] in [0..nb_procs-1]
-    // on direct network : local srcid[mdma] = nb_procs
-    // on direct network : local srcid[bdev] = nb_procs + 1
-
-    // on coherence network : local srcid[proc] in [0...nb_procs-1]
-    // on coherence network : local srcid[memc] = nb_procs
-
     /////////////////////////////////////////////////////////////////////////////
     std::cout << "  - building proc_" << x_id << "_" << y_id << "-*" << std::endl;
@@ -107,6 +98,9 @@
     { 
         std::ostringstream sproc;
-        sproc << "proc_" << p;
-        proc[p] = new VciCcVCacheWrapper<vci_param_d, cmd_width, rsp_width, iss_t>(
+        sproc << "proc_" << x_id << "_" << y_id << "_" << p;
+        proc[p] = new VciCcVCacheWrapper<vci_param_int,
+                                         dspin_cmd_width,
+                                         dspin_rsp_width, 
+                                         GdbServer<Mips32ElIss> >(
                       sproc.str().c_str(),
                       cluster_id*nb_procs + p,        // GLOBAL PROC_ID
@@ -130,5 +124,7 @@
         std::ostringstream swip;
         swip << "wi_proc_" << x_id << "_" << y_id << p;
-        wi_proc[p] = new VciDspinInitiatorWrapper<vci_param_d,cmd_width,rsp_width>(
+        wi_proc[p] = new VciDspinInitiatorWrapper<vci_param_int,
+                                                  dspin_cmd_width,
+                                                  dspin_rsp_width>(
                      swip.str().c_str(),
                      x_width + y_width + l_width);
@@ -138,6 +134,11 @@
     std::cout << "  - building memc_" << x_id << "_" << y_id << std::endl;
 
-    memc = new VciMemCache<vci_param_d, vci_param_x, rsp_width, cmd_width>(
-                     "memc",
+    std::ostringstream smemc;
+    smemc << "memc_" << x_id << "_" << y_id;
+    memc = new VciMemCache<vci_param_int,
+                           vci_param_ext,
+                           dspin_rsp_width,
+                           dspin_cmd_width>(
+                     smemc.str().c_str(),
                      mtd,                                // Mapping Table direct space
                      mtx,                                // Mapping Table external space
@@ -153,5 +154,7 @@
                      memc_debug_ok );
 
-    wt_memc = new VciDspinTargetWrapper<vci_param_d,cmd_width,rsp_width>(
+    wt_memc = new VciDspinTargetWrapper<vci_param_int,
+                                        dspin_cmd_width,
+                                        dspin_rsp_width>(
                      "wt_memc",
                      x_width + y_width + l_width);
@@ -160,6 +163,8 @@
     std::cout << "  - building xram_" << x_id << "_" << y_id << std::endl;
 
-    xram = new VciSimpleRam<vci_param_x>(
-                     "xram",
+    std::ostringstream sxram;
+    sxram << "xram_" << x_id << "_" << y_id;
+    xram = new VciSimpleRam<vci_param_ext>(
+                     sxram.str().c_str(),
                      IntTab(cluster_id),
                      mtx,
@@ -170,6 +175,8 @@
     std::cout << "  - building xicu_" << x_id << "_" << y_id << std::endl;
 
-    xicu = new VciXicu<vci_param_d>(
-                     "xicu",
+    std::ostringstream sxicu;
+    sxicu << "xicu_" << x_id << "_" << y_id;
+    xicu = new VciXicu<vci_param_int>(
+                     sxicu.str().c_str(),
                      mtd,                               // mapping table
                      IntTab(cluster_id, tgtid_xicu),    // TGTID_D
@@ -179,5 +186,7 @@
                      nb_procs);                         // number of output IRQs
 
-    wt_xicu = new VciDspinTargetWrapper<vci_param_d,cmd_width,rsp_width>(
+    wt_xicu = new VciDspinTargetWrapper<vci_param_int,
+                                        dspin_cmd_width,
+                                        dspin_rsp_width>(
                      "wt_xicu",
                      x_width + y_width + l_width);
@@ -186,6 +195,8 @@
     std::cout << "  - building mdma_" << x_id << "_" << y_id << std::endl;
 
-    mdma = new VciMultiDma<vci_param_d>(
-                     "mdma",
+    std::ostringstream smdma;
+    smdma << "mdma_" << x_id << "_" << y_id;
+    mdma = new VciMultiDma<vci_param_int>(
+                     smdma.str().c_str(),
                      mtd,
                      IntTab(cluster_id, nb_procs),        // SRCID
@@ -194,9 +205,13 @@
                      nb_dmas);                            // number of IRQs
 
-    wt_mdma = new VciDspinTargetWrapper<vci_param_d,cmd_width,rsp_width>(
+    wt_mdma = new VciDspinTargetWrapper<vci_param_int,
+                                        dspin_cmd_width,
+                                        dspin_rsp_width>(
                      "wt_mdma",
                      x_width + y_width + l_width);
 
-    wi_mdma = new VciDspinInitiatorWrapper<vci_param_d,cmd_width,rsp_width>(
+    wi_mdma = new VciDspinInitiatorWrapper<vci_param_int,
+                                           dspin_cmd_width,
+                                           dspin_rsp_width>(
                      "wi_mdma",
                      x_width + y_width + l_width);
@@ -213,5 +228,5 @@
     }
 
-    xbar_cmd_d = new DspinLocalCrossbar<cmd_width>(
+    xbar_cmd_d = new DspinLocalCrossbar<dspin_cmd_width>(
                      "xbar_cmd_d",
                      mtd,                          // mapping table
@@ -227,5 +242,5 @@
     std::cout << "  - building xbar_rsp_d_" << x_id << "_" << y_id << std::endl;
 
-    xbar_rsp_d = new DspinLocalCrossbar<rsp_width>(
+    xbar_rsp_d = new DspinLocalCrossbar<dspin_rsp_width>(
                      "xbar_rsp_d",
                      mtd,                          // mapping table
@@ -241,5 +256,5 @@
     std::cout << "  - building xbar_m2p_c" << x_id << "_" << y_id << std::endl;
 
-    xbar_m2p_c = new DspinLocalCrossbar<cmd_width>(
+    xbar_m2p_c = new DspinLocalCrossbar<dspin_cmd_width>(
                      "xbar_m2p_c",
                      mtd,                          // mapping table
@@ -255,5 +270,5 @@
     std::cout << "  - building xbar_p2m_c_" << x_id << "_" << y_id << std::endl;
 
-    xbar_p2m_c = new DspinLocalCrossbar<rsp_width>(
+    xbar_p2m_c = new DspinLocalCrossbar<dspin_rsp_width>(
                      "xbar_p2m_c",
                      mtd,                          // mapping table
@@ -269,5 +284,5 @@
     std::cout << "  - building router_cmd_" << x_id << "_" << y_id << std::endl;
 
-    router_cmd = new VirtualDspinRouter<cmd_width>(
+    router_cmd = new VirtualDspinRouter<dspin_cmd_width>(
                      "router_cmd",
                      x_id,y_id,                    // coordinate in the mesh
@@ -278,5 +293,5 @@
     std::cout << "  - building router_rsp_" << x_id << "_" << y_id << std::endl;
 
-    router_rsp = new VirtualDspinRouter<rsp_width>(
+    router_rsp = new VirtualDspinRouter<dspin_rsp_width>(
                      "router_rsp",
                      x_id,y_id,                    // coordinates in mesh
@@ -290,11 +305,14 @@
         std::cout << "  - building brom" << std::endl;
 
-        brom = new VciSimpleRam<vci_param_d>(
-                        "brom",
-                        IntTab(cluster_id, tgtid_brom),
-                        mtd,
-                        loader);
-
-        wt_brom = new VciDspinTargetWrapper<vci_param_d,cmd_width,rsp_width>("wt_brom",
+        brom = new VciSimpleRam<vci_param_int>(
+                     "brom",
+                     IntTab(cluster_id, tgtid_brom),
+                     mtd,
+                     loader);
+
+        wt_brom = new VciDspinTargetWrapper<vci_param_int,
+                                            dspin_cmd_width,
+                                            dspin_rsp_width>(
+                     "wt_brom",
                      x_width + y_width + l_width);
 
@@ -302,11 +320,14 @@
         std::cout << "  - building fbuf" << std::endl;
 
-        fbuf = new VciFrameBuffer<vci_param_d>(
-                        "fbuf",
-                        IntTab(cluster_id, tgtid_fbuf),
-                        mtd,
-                        xfb, yfb); 
-
-        wt_fbuf = new VciDspinTargetWrapper<vci_param_d,cmd_width,rsp_width>("wt_fbuf",
+        fbuf = new VciFrameBuffer<vci_param_int>(
+                     "fbuf",
+                     IntTab(cluster_id, tgtid_fbuf),
+                     mtd,
+                     xfb, yfb); 
+
+        wt_fbuf = new VciDspinTargetWrapper<vci_param_int,
+                                            dspin_cmd_width,
+                                            dspin_rsp_width>(
+                     "wt_fbuf",
                      x_width + y_width + l_width);
 
@@ -314,16 +335,23 @@
         std::cout << "  - building bdev" << std::endl;
 
-        bdev = new VciBlockDeviceTsar<vci_param_d>(
-                        "bdev",
-                        mtd,
-                        IntTab(cluster_id, nb_procs+1),
-                        IntTab(cluster_id, tgtid_bdev),
-                        disk_name,
-                        block_size,
-                        64);            // burst size
-
-        wt_bdev = new VciDspinTargetWrapper<vci_param_d,cmd_width,rsp_width>("wt_bdev",
-                     x_width + y_width + l_width);
-        wi_bdev = new VciDspinInitiatorWrapper<vci_param_d,cmd_width,rsp_width>("wi_bdev",
+        bdev = new VciBlockDeviceTsar<vci_param_int>(
+                     "bdev",
+                     mtd,
+                     IntTab(cluster_id, nb_procs+1),
+                     IntTab(cluster_id, tgtid_bdev),
+                     disk_name,
+                     block_size,
+                     64);            // burst size
+
+        wt_bdev = new VciDspinTargetWrapper<vci_param_int,
+                                            dspin_cmd_width,
+                                            dspin_rsp_width>(
+                     "wt_bdev",
+                     x_width + y_width + l_width);
+
+        wi_bdev = new VciDspinInitiatorWrapper<vci_param_int,
+                                               dspin_cmd_width,
+                                               dspin_rsp_width>(
+                     "wi_bdev",
                      x_width + y_width + l_width);
 
@@ -331,15 +359,18 @@
         std::cout << "  - building mnic" << std::endl;
 
-        mnic = new VciMultiNic<vci_param_d>(
-                        "mnic",
-                        IntTab(cluster_id, tgtid_mnic),
-                        mtd,
-                        nic_channels,
-                        nic_rx_name,
-                        nic_tx_name,
-                        0,             // mac_4 address
-                        0 );           // mac_2 address
-
-        wt_mnic = new VciDspinTargetWrapper<vci_param_d,cmd_width,rsp_width>("wt_mnic",
+        mnic = new VciMultiNic<vci_param_int>(
+                     "mnic",
+                     IntTab(cluster_id, tgtid_mnic),
+                     mtd,
+                     nic_channels,
+                     nic_rx_name,
+                     nic_tx_name,
+                     0,             // mac_4 address
+                     0 );           // mac_2 address
+
+        wt_mnic = new VciDspinTargetWrapper<vci_param_int,
+                                            dspin_cmd_width,
+                                            dspin_rsp_width>(
+                     "wt_mnic",
                      x_width + y_width + l_width);
 
@@ -354,13 +385,15 @@
             vect_names.push_back(term_name.str().c_str());
         }
-        mtty = new VciMultiTty<vci_param_d>(
-                        "mtty",
-                        IntTab(cluster_id, tgtid_mtty),
-                        mtd, 
-                        vect_names);
-
-        wt_mtty = new VciDspinTargetWrapper<vci_param_d,cmd_width,rsp_width>("wt_mtty",
-                     x_width + y_width + l_width);
-
+        mtty = new VciMultiTty<vci_param_int>(
+                     "mtty",
+                     IntTab(cluster_id, tgtid_mtty),
+                     mtd, 
+                     vect_names);
+
+        wt_mtty = new VciDspinTargetWrapper<vci_param_int,
+                                            dspin_cmd_width,
+                                            dspin_rsp_width>(
+                     "wt_mtty",
+                     x_width + y_width + l_width);
     }
 
@@ -679,11 +712,5 @@
 } // end constructor
 
-///////////////////////////////////////////////////////////////////////////
-//    destructor
-///////////////////////////////////////////////////////////////////////////
-tmpl(/**/)::~TsarXbarCluster() {}
-}
-}
-
+}}
 
 // Local Variables:
