Index: /trunk/platforms/tsar_generic_xbar/top.cpp =================================================================== --- /trunk/platforms/tsar_generic_xbar/top.cpp (revision 427) +++ /trunk/platforms/tsar_generic_xbar/top.cpp (revision 428) @@ -241,6 +241,6 @@ #define FBUF_TGTID 4 #define BDEV_TGTID 5 -#define MNIC_TGTID 6 -#define BROM_TGTID 7 +#define BROM_TGTID 6 +#define MNIC_TGTID 7 ///////////////////////////////// @@ -250,5 +250,4 @@ using namespace soclib::caba; using namespace soclib::common; - char soft_name[256] = SOFT_NAME; // pathname to binary code @@ -386,14 +385,14 @@ int_vci_wrplen_width> vci_param_int; - typedef soclib::caba::VciParamsBis vci_param_ext; + typedef soclib::caba::VciParams vci_param_ext; #if USE_OPENMP @@ -499,4 +498,12 @@ sc_clock signal_clk("clk"); sc_signal signal_resetn("resetn"); + + enum { + NORTH = VirtualDspinRouter::NORTH, + SOUTH = VirtualDspinRouter::SOUTH, + EAST = VirtualDspinRouter::EAST, + WEST = VirtualDspinRouter::WEST, + LOCAL = VirtualDspinRouter::LOCAL + }; // Horizontal inter-clusters DSPIN signals @@ -649,12 +656,12 @@ for (size_t y = 0; y < CLUSTER_Y; y++){ for (size_t k = 0; k < 2; k++){ - clusters[x][y]->p_cmd_out[k][EAST] (signal_dspin_h_cmd_inc[x][y][k]); - clusters[x+1][y]->p_cmd_in[k][WEST] (signal_dspin_h_cmd_inc[x][y][k]); - clusters[x][y]->p_cmd_in[k][EAST] (signal_dspin_h_cmd_dec[x][y][k]); - clusters[x+1][y]->p_cmd_out[k][WEST] (signal_dspin_h_cmd_dec[x][y][k]); - clusters[x][y]->p_rsp_out[k][EAST] (signal_dspin_h_rsp_inc[x][y][k]); - clusters[x+1][y]->p_rsp_in[k][WEST] (signal_dspin_h_rsp_inc[x][y][k]); - clusters[x][y]->p_rsp_in[k][EAST] (signal_dspin_h_rsp_dec[x][y][k]); - clusters[x+1][y]->p_rsp_out[k][WEST] (signal_dspin_h_rsp_dec[x][y][k]); + clusters[x][y]->p_cmd_out[k][EAST] (signal_dspin_h_cmd_inc[x][y][k]); + clusters[x+1][y]->p_cmd_in[k][WEST] (signal_dspin_h_cmd_inc[x][y][k]); + clusters[x][y]->p_cmd_in[k][EAST] (signal_dspin_h_cmd_dec[x][y][k]); + clusters[x+1][y]->p_cmd_out[k][WEST] (signal_dspin_h_cmd_dec[x][y][k]); + clusters[x][y]->p_rsp_out[k][EAST] (signal_dspin_h_rsp_inc[x][y][k]); + clusters[x+1][y]->p_rsp_in[k][WEST] (signal_dspin_h_rsp_inc[x][y][k]); + clusters[x][y]->p_rsp_in[k][EAST] (signal_dspin_h_rsp_dec[x][y][k]); + clusters[x+1][y]->p_rsp_out[k][WEST] (signal_dspin_h_rsp_dec[x][y][k]); } } @@ -668,12 +675,12 @@ for (size_t x = 0; x < CLUSTER_X; x++){ for (size_t k = 0; k < 2; k++){ - clusters[x][y]->p_cmd_out[k][NORTH] (signal_dspin_v_cmd_inc[x][y][k]); - clusters[x][y+1]->p_cmd_in[k][SOUTH] (signal_dspin_v_cmd_inc[x][y][k]); - clusters[x][y]->p_cmd_in[k][NORTH] (signal_dspin_v_cmd_dec[x][y][k]); - clusters[x][y+1]->p_cmd_out[k][SOUTH] (signal_dspin_v_cmd_dec[x][y][k]); - clusters[x][y]->p_rsp_out[k][NORTH] (signal_dspin_v_rsp_inc[x][y][k]); - clusters[x][y+1]->p_rsp_in[k][SOUTH] (signal_dspin_v_rsp_inc[x][y][k]); - clusters[x][y]->p_rsp_in[k][NORTH] (signal_dspin_v_rsp_dec[x][y][k]); - clusters[x][y+1]->p_rsp_out[k][SOUTH] (signal_dspin_v_rsp_dec[x][y][k]); + clusters[x][y]->p_cmd_out[k][NORTH] (signal_dspin_v_cmd_inc[x][y][k]); + clusters[x][y+1]->p_cmd_in[k][SOUTH] (signal_dspin_v_cmd_inc[x][y][k]); + clusters[x][y]->p_cmd_in[k][NORTH] (signal_dspin_v_cmd_dec[x][y][k]); + clusters[x][y+1]->p_cmd_out[k][SOUTH] (signal_dspin_v_cmd_dec[x][y][k]); + clusters[x][y]->p_rsp_out[k][NORTH] (signal_dspin_v_rsp_inc[x][y][k]); + clusters[x][y+1]->p_rsp_in[k][SOUTH] (signal_dspin_v_rsp_inc[x][y][k]); + clusters[x][y]->p_rsp_in[k][NORTH] (signal_dspin_v_rsp_dec[x][y][k]); + clusters[x][y+1]->p_rsp_out[k][SOUTH] (signal_dspin_v_rsp_dec[x][y][k]); } } @@ -687,13 +694,13 @@ for (size_t k = 0; k < 2; k++) { - clusters[0][y]->p_cmd_in[k][WEST] (signal_dspin_false_cmd_in[0][y][k][WEST]); - clusters[0][y]->p_cmd_out[k][WEST] (signal_dspin_false_cmd_out[0][y][k][WEST]); - clusters[0][y]->p_rsp_in[k][WEST] (signal_dspin_false_rsp_in[0][y][k][WEST]); - clusters[0][y]->p_rsp_out[k][WEST] (signal_dspin_false_rsp_out[0][y][k][WEST]); - - clusters[CLUSTER_X-1][y]->p_cmd_in[k][EAST] (signal_dspin_false_cmd_in[CLUSTER_X-1][y][k][EAST]); - clusters[CLUSTER_X-1][y]->p_cmd_out[k][EAST] (signal_dspin_false_cmd_out[CLUSTER_X-1][y][k][EAST]); - clusters[CLUSTER_X-1][y]->p_rsp_in[k][EAST] (signal_dspin_false_rsp_in[CLUSTER_X-1][y][k][EAST]); - clusters[CLUSTER_X-1][y]->p_rsp_out[k][EAST] (signal_dspin_false_rsp_out[CLUSTER_X-1][y][k][EAST]); + clusters[0][y]->p_cmd_in[k][WEST] (signal_dspin_false_cmd_in[0][y][k][WEST]); + clusters[0][y]->p_cmd_out[k][WEST] (signal_dspin_false_cmd_out[0][y][k][WEST]); + clusters[0][y]->p_rsp_in[k][WEST] (signal_dspin_false_rsp_in[0][y][k][WEST]); + clusters[0][y]->p_rsp_out[k][WEST] (signal_dspin_false_rsp_out[0][y][k][WEST]); + + clusters[CLUSTER_X-1][y]->p_cmd_in[k][EAST] (signal_dspin_false_cmd_in[CLUSTER_X-1][y][k][EAST]); + clusters[CLUSTER_X-1][y]->p_cmd_out[k][EAST] (signal_dspin_false_cmd_out[CLUSTER_X-1][y][k][EAST]); + clusters[CLUSTER_X-1][y]->p_rsp_in[k][EAST] (signal_dspin_false_rsp_in[CLUSTER_X-1][y][k][EAST]); + clusters[CLUSTER_X-1][y]->p_rsp_out[k][EAST] (signal_dspin_false_rsp_out[CLUSTER_X-1][y][k][EAST]); } } Index: /trunk/platforms/tsar_generic_xbar/top.desc =================================================================== --- /trunk/platforms/tsar_generic_xbar/top.desc (revision 427) +++ /trunk/platforms/tsar_generic_xbar/top.desc (revision 428) @@ -31,38 +31,30 @@ todo = Platform('caba', 'top.cpp', + uses = [ + Uses('caba:tsar_xbar_cluster', + dspin_cmd_width = dspin_cmd_flit_size, + dspin_rsp_width = dspin_rsp_flit_size, - uses = [ - Uses('caba:tsar_xbar_cluster', - dspin_cmd_width = dspin_cmd_flit_size, - dspin_rsp_width = dspin_rsp_flit_size, + vci_param_int = 'caba:vci_param', - vci_param_int = 'caba:vci_param', + cell_size = int_vci_cell_size, + plen_size = int_vci_plen_size, + addr_size = int_vci_addr_size, + rerror_size = int_vci_rerror_size, + clen_size = int_vci_clen_size, + rflag_size = int_vci_rflag_size, + srcid_size = int_vci_srcid_size, + pktid_size = int_vci_pktid_size, + trdid_size = int_vci_trdid_size, + wrplen_size = int_vci_wrplen_size, - cell_size = int_vci_cell_size, - plen_size = int_vci_plen_size, - addr_size = int_vci_addr_size, - rerror_size = int_vci_rerror_size, - clen_size = int_vci_clen_size, - rflag_size = int_vci_rflag_size, - srcid_size = int_vci_srcid_size, - pktid_size = int_vci_pktid_size, - trdid_size = int_vci_trdid_size, - wrplen_size = int_vci_wrplen_size, + vci_param_ext = 'caba:vci_param', - vci_param_ext = 'caba:vci_param_bis', + cell_size_ext = ext_vci_cell_size, + ), - cell_size_bis = ext_vci_cell_size, - plen_size_bis = ext_vci_plen_size, - addr_size_bis = ext_vci_addr_size, - rerror_size_bis = ext_vci_rerror_size, - clen_size_bis = ext_vci_clen_size, - rflag_size_bis = ext_vci_rflag_size, - srcid_size_bis = ext_vci_srcid_size, - pktid_size_bis = ext_vci_pktid_size, - trdid_size_bis = ext_vci_trdid_size, - wrplen_size_bis = ext_vci_wrplen_size), + Uses('common:elf_file_loader'), + Uses('common:plain_file_loader'), + ], +) - Uses('common:elf_file_loader'), - Uses('common:plain_file_loader'), - ], -) Index: /trunk/platforms/tsar_generic_xbar/tsar_xbar_cluster/caba/metadata/tsar_xbar_cluster.sd =================================================================== --- /trunk/platforms/tsar_generic_xbar/tsar_xbar_cluster/caba/metadata/tsar_xbar_cluster.sd (revision 427) +++ /trunk/platforms/tsar_generic_xbar/tsar_xbar_cluster/caba/metadata/tsar_xbar_cluster.sd (revision 428) @@ -2,92 +2,102 @@ # -*- python -*- -Module('caba:tsar_xbar_cluster', +Module('caba:tsar_xbar_cluster', classname = 'soclib::caba::TsarXbarCluster', - tmpl_parameters = [ - parameter.Int('dspin_cmd_width'), - parameter.Int('dspin_rsp_width'), + + tmpl_parameters = [ + parameter.Int('dspin_cmd_width'), + parameter.Int('dspin_rsp_width'), parameter.Module('vci_param_int'), - parameter.Module('vci_param_ext'), - ], + parameter.Module('vci_param_ext', + cell_size = parameter.Reference('cell_size_ext') + ), + ], - header_files = [ '../source/include/tsar_xbar_cluster.h', ], - implementation_files = [ '../source/src/tsar_xbar_cluster.cpp', ], + header_files = [ '../source/include/tsar_xbar_cluster.h', ], - uses = [ - Uses('caba:base_module'), - Uses('common:mapping_table'), - Uses('common:iss2'), - - Uses('caba:vci_cc_vcache_wrapper', - vci_param = parameter.Reference('vci_param_int'), - dspin_in_width = parameter.Reference('dspin_cmd_width'), - dspin_out_width = parameter.Reference('dspin_rsp_width'), - iss_t = 'common:gdb_iss', - gdb_iss_t = 'common:mips32el'), + implementation_files = [ '../source/src/tsar_xbar_cluster.cpp', ], - Uses('caba:vci_simple_ram', - vci_param = parameter.Reference('vci_param_int')), + uses = [ + Uses('caba:base_module'), + Uses('common:mapping_table'), + Uses('common:iss2'), - Uses('caba:vci_simple_ram', - vci_param = parameter.Reference('vci_param_ext')), + Uses('caba:vci_cc_vcache_wrapper', + vci_param = parameter.Reference('vci_param_int'), + dspin_in_width = parameter.Reference('dspin_cmd_width'), + dspin_out_width = parameter.Reference('dspin_rsp_width'), + iss_t = 'common:gdb_iss', + gdb_iss_t = 'common:mips32el' + ), + Uses('caba:vci_simple_ram', + vci_param = parameter.Reference('vci_param_int') + ), + Uses('caba:vci_simple_ram', + vci_param = parameter.Reference('vci_param_ext'), + cell_size = parameter.Reference('cell_size_ext'), + ), + Uses('caba:vci_xicu', + vci_param = parameter.Reference('vci_param_int') + ), + Uses('caba:dspin_local_crossbar', + flit_width = parameter.Reference('dspin_cmd_width') + ), + Uses('caba:dspin_local_crossbar', + flit_width = parameter.Reference('dspin_rsp_width') + ), + Uses('caba:virtual_dspin_router', + flit_width = parameter.Reference('dspin_cmd_width') + ), + Uses('caba:virtual_dspin_router', + flit_width = parameter.Reference('dspin_rsp_width') + ), + Uses('caba:vci_multi_tty', + vci_param = parameter.Reference('vci_param_int') + ), + Uses('caba:vci_framebuffer', + vci_param = parameter.Reference('vci_param_int') + ), + Uses('caba:vci_multi_nic', + vci_param = parameter.Reference('vci_param_int') + ), + Uses('caba:vci_block_device_tsar', + vci_param = parameter.Reference('vci_param_int') + ), + Uses('caba:vci_multi_dma', + vci_param = parameter.Reference('vci_param_int') + ), + Uses('caba:vci_dspin_target_wrapper', + vci_param = parameter.Reference('vci_param_int') + ), + Uses('caba:vci_dspin_initiator_wrapper', + vci_param = parameter.Reference('vci_param_int') + ), + Uses('caba:vci_mem_cache', + dspin_in_width = parameter.Reference('dspin_rsp_width'), + dspin_out_width = parameter.Reference('dspin_cmd_width'), + memc_cell_size_int = parameter.Reference('cell_size'), + memc_cell_size_ext = parameter.Reference('cell_size_ext') + ), - Uses('caba:vci_xicu', - vci_param = parameter.Reference('vci_param_int')), + Uses('common:elf_file_loader'), + ], - Uses('caba:dspin_local_crossbar', - flit_width = parameter.Reference('dspin_cmd_width')), + ports = [ + Port('caba:bit_in', 'p_resetn', auto = 'resetn'), + Port('caba:clock_in', 'p_clk', auto = 'clock'), - Uses('caba:dspin_local_crossbar', - flit_width = parameter.Reference('dspin_rsp_width')), - - Uses('caba:virtual_dspin_router', - flit_width = parameter.Reference('dspin_cmd_width')), - - Uses('caba:virtual_dspin_router', - flit_width = parameter.Reference('dspin_rsp_width')), - - Uses('caba:vci_multi_tty', - vci_param = parameter.Reference('vci_param_int')), - - Uses('caba:vci_framebuffer', - vci_param = parameter.Reference('vci_param_int')), - - Uses('caba:vci_multi_nic', - vci_param = parameter.Reference('vci_param_int')), - - Uses('caba:vci_block_device_tsar', - vci_param = parameter.Reference('vci_param_int')), - - Uses('caba:vci_multi_dma', - vci_param = parameter.Reference('vci_param_int')), - - Uses('caba:vci_dspin_target_wrapper', - vci_param = parameter.Reference('vci_param_int')), - - Uses('caba:vci_dspin_initiator_wrapper', - vci_param = parameter.Reference('vci_param_int')), - - Uses('caba:vci_mem_cache', - vci_param_int = 'caba:vci_param', - vci_param_ext = 'caba:vci_param_bis', - dspin_in_width = parameter.Reference('dspin_rsp_width'), - dspin_out_width = parameter.Reference('dspin_cmd_width')), - - Uses('common:elf_file_loader'), - ], - - ports = [ - Port('caba:bit_in', 'p_resetn', auto = 'resetn'), - Port('caba:clock_in', 'p_clk', auto = 'clock'), - Port('caba:dspin_output', 'p_cmd_out', [2, 4], - dspin_data_size = parameter.Reference('dspin_cmd_width')), - Port('caba:dspin_input', 'p_cmd_in', [2, 4], - dspin_data_size = parameter.Reference('dspin_cmd_width')), - Port('caba:dspin_output', 'p_rsp_out', [2, 4], - dspin_data_size = parameter.Reference('dspin_rsp_width')), - Port('caba:dspin_input', 'p_rsp_in', [2, 4], - dspin_data_size = parameter.Reference('dspin_rsp_width')), - ], + Port('caba:dspin_output', 'p_cmd_out', [2, 4], + dspin_data_size = parameter.Reference('dspin_cmd_width') + ), + Port('caba:dspin_input', 'p_cmd_in', [2, 4], + dspin_data_size = parameter.Reference('dspin_cmd_width') + ), + Port('caba:dspin_output', 'p_rsp_out', [2, 4], + dspin_data_size = parameter.Reference('dspin_rsp_width') + ), + Port('caba:dspin_input', 'p_rsp_in', [2, 4], + dspin_data_size = parameter.Reference('dspin_rsp_width') + ), + ], ) - Index: /trunk/platforms/tsar_generic_xbar/tsar_xbar_cluster/caba/source/include/tsar_xbar_cluster.h =================================================================== --- /trunk/platforms/tsar_generic_xbar/tsar_xbar_cluster/caba/source/include/tsar_xbar_cluster.h (revision 427) +++ /trunk/platforms/tsar_generic_xbar/tsar_xbar_cluster/caba/source/include/tsar_xbar_cluster.h (revision 428) @@ -1,5 +1,5 @@ ////////////////////////////////////////////////////////////////////////////// // File: tsar_xbar_cluster.h -// Author: Alain Greiner +// Author: Alain Greiner // Copyright: UPMC/LIP6 // Date : march 2013 @@ -38,7 +38,7 @@ /////////////////////////////////////////////////////////////////////////// template class TsarXbarCluster + typename vci_param_ext> class TsarXbarCluster /////////////////////////////////////////////////////////////////////////// : public soclib::caba::BaseModule @@ -46,82 +46,82 @@ public: - // Ports - sc_in p_clk; - sc_in p_resetn; - soclib::caba::DspinOutput **p_cmd_out; - soclib::caba::DspinInput **p_cmd_in; - soclib::caba::DspinOutput **p_rsp_out; - soclib::caba::DspinInput **p_rsp_in; + // Ports + sc_in p_clk; + sc_in p_resetn; + soclib::caba::DspinOutput **p_cmd_out; + soclib::caba::DspinInput **p_cmd_in; + soclib::caba::DspinOutput **p_rsp_out; + soclib::caba::DspinInput **p_rsp_in; // interrupt signals - sc_signal signal_false; - sc_signal signal_proc_it[8]; - sc_signal signal_irq_mdma[8]; - sc_signal signal_irq_mtty[23]; - sc_signal signal_irq_mnic_rx[8]; // unused - sc_signal signal_irq_mnic_tx[8]; // unused - sc_signal signal_irq_bdev; - - // DSPIN signals between DSPIN routers and local_crossbars - DspinSignals signal_dspin_cmd_l2g_d; - DspinSignals signal_dspin_cmd_g2l_d; - DspinSignals signal_dspin_m2p_l2g_c; - DspinSignals signal_dspin_m2p_g2l_c; - DspinSignals signal_dspin_rsp_l2g_d; - DspinSignals signal_dspin_rsp_g2l_d; - DspinSignals signal_dspin_p2m_l2g_c; - DspinSignals signal_dspin_p2m_g2l_c; - - // Direct VCI signals to VCI/DSPIN wrappers - VciSignals signal_vci_ini_proc[8]; - VciSignals signal_vci_ini_mdma; - VciSignals signal_vci_ini_bdev; - - VciSignals signal_vci_tgt_memc; - VciSignals signal_vci_tgt_xicu; - VciSignals signal_vci_tgt_mdma; - VciSignals signal_vci_tgt_mtty; - VciSignals signal_vci_tgt_bdev; - VciSignals signal_vci_tgt_brom; - VciSignals signal_vci_tgt_fbuf; - VciSignals signal_vci_tgt_mnic; - - // Direct DSPIN signals to local crossbars - DspinSignals signal_dspin_cmd_proc_i[8]; - DspinSignals signal_dspin_rsp_proc_i[8]; - DspinSignals signal_dspin_cmd_mdma_i; - DspinSignals signal_dspin_rsp_mdma_i; - DspinSignals signal_dspin_cmd_bdev_i; - DspinSignals signal_dspin_rsp_bdev_i; - - DspinSignals signal_dspin_cmd_memc_t; - DspinSignals signal_dspin_rsp_memc_t; - DspinSignals signal_dspin_cmd_xicu_t; - DspinSignals signal_dspin_rsp_xicu_t; - DspinSignals signal_dspin_cmd_mdma_t; - DspinSignals signal_dspin_rsp_mdma_t; - DspinSignals signal_dspin_cmd_mtty_t; - DspinSignals signal_dspin_rsp_mtty_t; - DspinSignals signal_dspin_cmd_bdev_t; - DspinSignals signal_dspin_rsp_bdev_t; - DspinSignals signal_dspin_cmd_brom_t; - DspinSignals signal_dspin_rsp_brom_t; - DspinSignals signal_dspin_cmd_fbuf_t; - DspinSignals signal_dspin_rsp_fbuf_t; - DspinSignals signal_dspin_cmd_mnic_t; - DspinSignals signal_dspin_rsp_mnic_t; - - // Coherence DSPIN signals to local crossbar - DspinSignals signal_dspin_m2p_memc; - DspinSignals signal_dspin_p2m_memc; - DspinSignals signal_dspin_m2p_proc[8]; - DspinSignals signal_dspin_p2m_proc[8]; - - // external RAM to MEMC VCI signal - VciSignals signal_vci_xram; - + sc_signal signal_false; + sc_signal signal_proc_it[8]; + sc_signal signal_irq_mdma[8]; + sc_signal signal_irq_mtty[23]; + sc_signal signal_irq_mnic_rx[8]; // unused + sc_signal signal_irq_mnic_tx[8]; // unused + sc_signal signal_irq_bdev; + + // DSPIN signals between DSPIN routers and local_crossbars + DspinSignals signal_dspin_cmd_l2g_d; + DspinSignals signal_dspin_cmd_g2l_d; + DspinSignals signal_dspin_m2p_l2g_c; + DspinSignals signal_dspin_m2p_g2l_c; + DspinSignals signal_dspin_rsp_l2g_d; + DspinSignals signal_dspin_rsp_g2l_d; + DspinSignals signal_dspin_p2m_l2g_c; + DspinSignals signal_dspin_p2m_g2l_c; + + // Direct VCI signals to VCI/DSPIN wrappers + VciSignals signal_vci_ini_proc[8]; + VciSignals signal_vci_ini_mdma; + VciSignals signal_vci_ini_bdev; + + VciSignals signal_vci_tgt_memc; + VciSignals signal_vci_tgt_xicu; + VciSignals signal_vci_tgt_mdma; + VciSignals signal_vci_tgt_mtty; + VciSignals signal_vci_tgt_bdev; + VciSignals signal_vci_tgt_brom; + VciSignals signal_vci_tgt_fbuf; + VciSignals signal_vci_tgt_mnic; + + // Direct DSPIN signals to local crossbars + DspinSignals signal_dspin_cmd_proc_i[8]; + DspinSignals signal_dspin_rsp_proc_i[8]; + DspinSignals signal_dspin_cmd_mdma_i; + DspinSignals signal_dspin_rsp_mdma_i; + DspinSignals signal_dspin_cmd_bdev_i; + DspinSignals signal_dspin_rsp_bdev_i; + + DspinSignals signal_dspin_cmd_memc_t; + DspinSignals signal_dspin_rsp_memc_t; + DspinSignals signal_dspin_cmd_xicu_t; + DspinSignals signal_dspin_rsp_xicu_t; + DspinSignals signal_dspin_cmd_mdma_t; + DspinSignals signal_dspin_rsp_mdma_t; + DspinSignals signal_dspin_cmd_mtty_t; + DspinSignals signal_dspin_rsp_mtty_t; + DspinSignals signal_dspin_cmd_bdev_t; + DspinSignals signal_dspin_rsp_bdev_t; + DspinSignals signal_dspin_cmd_brom_t; + DspinSignals signal_dspin_rsp_brom_t; + DspinSignals signal_dspin_cmd_fbuf_t; + DspinSignals signal_dspin_rsp_fbuf_t; + DspinSignals signal_dspin_cmd_mnic_t; + DspinSignals signal_dspin_rsp_mnic_t; + + // Coherence DSPIN signals to local crossbar + DspinSignals signal_dspin_m2p_memc; + DspinSignals signal_dspin_p2m_memc; + DspinSignals signal_dspin_m2p_proc[8]; + DspinSignals signal_dspin_p2m_proc[8]; + + // external RAM to MEMC VCI signal + VciSignals signal_vci_xram; + // Components - VciCcVCacheWrapper* wi_proc[8]; - VciMemCache* memc; @@ -201,8 +201,8 @@ VirtualDspinRouter* router_rsp; - TsarXbarCluster( sc_module_name insname, - size_t nb_procs, // processors - size_t nb_ttys, // TTY terminals - size_t nb_dmas, // DMA channels + TsarXbarCluster( sc_module_name insname, + size_t nb_procs, // processors + size_t nb_ttys, // TTY terminals + size_t nb_dmas, // DMA channels size_t x, // x coordinate size_t y, // y coordinate @@ -210,9 +210,9 @@ const soclib::common::MappingTable &mtd, // internal const soclib::common::MappingTable &mtx, // external - size_t x_width, // x field bits - size_t y_width, // y field bits - size_t l_width, // l field bits - size_t tgtid_memc, - size_t tgtid_xicu, + size_t x_width, // x field bits + size_t y_width, // y field bits + size_t l_width, // l field bits + size_t tgtid_memc, + size_t tgtid_xicu, size_t tgtid_mdma, size_t tgtid_fbuf, @@ -224,22 +224,22 @@ size_t memc_sets, size_t l1_i_ways, - size_t l1_i_sets, + size_t l1_i_sets, size_t l1_d_ways, - size_t l1_d_sets, - size_t xram_latency, // external ram - bool io, // I/O cluster + size_t l1_d_sets, + size_t xram_latency, // external ram + bool io, // I/O cluster size_t xfb, // fbf pixels size_t yfb, // fbf lines - char* disk_name, // virtual disk - size_t block_size, // block size + char* disk_name, // virtual disk + size_t block_size, // block size size_t nic_channels, // number channels - char* nic_rx_name, // filename rx - char* nic_tx_name, // filename tx - uint32_t nic_timeout, // cycles - const Loader &loader, - uint32_t frozen_cycles, + char* nic_rx_name, // filename rx + char* nic_tx_name, // filename tx + uint32_t nic_timeout, // cycles + const Loader &loader, + uint32_t frozen_cycles, uint32_t start_debug_cycle, - bool memc_debug_ok, - bool proc_debug_ok); + bool memc_debug_ok, + bool proc_debug_ok); }; Index: /trunk/platforms/tsar_generic_xbar/tsar_xbar_cluster/caba/source/src/tsar_xbar_cluster.cpp =================================================================== --- /trunk/platforms/tsar_generic_xbar/tsar_xbar_cluster/caba/source/src/tsar_xbar_cluster.cpp (revision 427) +++ /trunk/platforms/tsar_generic_xbar/tsar_xbar_cluster/caba/source/src/tsar_xbar_cluster.cpp (revision 428) @@ -1,5 +1,5 @@ ////////////////////////////////////////////////////////////////////////////// // File: tsar_xbar_cluster.cpp -// Author: Alain Greiner +// Author: Alain Greiner // Copyright: UPMC/LIP6 // Date : march 2011 @@ -7,6 +7,6 @@ ////////////////////////////////////////////////////////////////////////////// // This file define a TSAR cluster architecture with virtual memory: -// - It uses two virtual_dspin_router as distributed global interconnect -// - It uses four dspin_local_crossbar as local interconnect +// - It uses two virtual_dspin_router as distributed global interconnect +// - It uses four dspin_local_crossbar as local interconnect // - It uses the vci_cc_vcache_wrapper // - It uses the vci_mem_cache @@ -16,10 +16,10 @@ // - It uses the vci_xicu interrupt controller // - The peripherals MTTY, BDEV, FBUF, MNIC and BROM are in cluster (0,0) -// - The Multi-TTY component controls up to 15 terminals. +// - The Multi-TTY component controls up to 15 terminals. // - Each Multi-DMA component controls up to 8 DMA channels. // - The DMA IRQs are connected to IRQ_IN[8]...IRQ_IN[15] // - The TTY IRQs are connected to IRQ_IN[16]...IRQ_IN[30] // - The BDEV IRQ is connected to IRQ_IN[31] -////////////////////////////////////////////////////////////////////////////////// +////////////////////////////////////////////////////////////////////////////////// #include "../include/tsar_xbar_cluster.h" @@ -30,5 +30,5 @@ //////////////////////////////////////////////////////////////////////////////////// -template >( sproc.str().c_str(), cluster_id*nb_procs + p, // GLOBAL PROC_ID - mtd, // Mapping Table + mtd, // Mapping Table IntTab(cluster_id,p), // SRCID (cluster_id << l_width) + p, // CC_GLOBAL_ID @@ -234,7 +234,7 @@ x_width, y_width, l_width, nb_direct_initiators, // number of local of sources - nb_direct_targets, // number of local dests - 2, 2, // fifo depths - true, // use local routing table + nb_direct_targets, // number of local dests + 2, 2, // fifo depths + true, // use local routing table false ); // no broacast @@ -247,8 +247,8 @@ x_id, y_id, // cluster coordinates x_width, y_width, l_width, - nb_direct_targets, // number of local sources + nb_direct_targets, // number of local sources nb_direct_initiators, // number of local dests - 2, 2, // fifo depths - false, // don't use local routing table + 2, 2, // fifo depths + false, // don't use local routing table false ); // no broacast @@ -262,6 +262,6 @@ x_width, y_width, l_width, 1, // number of local sources - nb_procs, // number of local targets - 2, 2, // fifo depths + nb_procs, // number of local targets + 2, 2, // fifo depths false, // don't use local routing table true ); // broacast @@ -277,7 +277,7 @@ nb_procs, // number of local sources 1, // number of local dests - 2, 2, // fifo depths + 2, 2, // fifo depths false, // don't use local routing table - false ); // no broacast + false ); // no broacast ///////////////////////////////////////////////////////////////////////////// @@ -324,5 +324,5 @@ IntTab(cluster_id, tgtid_fbuf), mtd, - xfb, yfb); + xfb, yfb); wt_fbuf = new VciDspinTargetWrapperp_global_in (signal_dspin_m2p_g2l_c); xbar_m2p_c->p_local_in[0] (signal_dspin_m2p_memc); - for (size_t p = 0; p < nb_procs; p++) + for (size_t p = 0; p < nb_procs; p++) xbar_m2p_c->p_local_out[p] (signal_dspin_m2p_proc[p]); @@ -505,5 +505,5 @@ xbar_p2m_c->p_global_in (signal_dspin_p2m_g2l_c); xbar_p2m_c->p_local_out[0] (signal_dspin_p2m_memc); - for (size_t p = 0; p < nb_procs; p++) + for (size_t p = 0; p < nb_procs; p++) xbar_p2m_c->p_local_in[p] (signal_dspin_p2m_proc[p]); @@ -535,10 +535,10 @@ ///////////////////////////////////// XICU - xicu->p_clk (this->p_clk); - xicu->p_resetn (this->p_resetn); - xicu->p_vci (signal_vci_tgt_xicu); + xicu->p_clk (this->p_clk); + xicu->p_resetn (this->p_resetn); + xicu->p_vci (signal_vci_tgt_xicu); for ( size_t p=0 ; pp_irq[p] (signal_proc_it[p]); + xicu->p_irq[p] (signal_proc_it[p]); } for ( size_t i=0 ; i<32 ; i++) @@ -547,8 +547,8 @@ { if (i < 8) xicu->p_hwi[i] (signal_false); - else if (i < (8 + nb_dmas)) xicu->p_hwi[i] (signal_irq_mdma[i-8]); + else if (i < (8 + nb_dmas)) xicu->p_hwi[i] (signal_irq_mdma[i-8]); else if (i < 16) xicu->p_hwi[i] (signal_false); else if (i < (16 + nb_ttys)) xicu->p_hwi[i] (signal_irq_mtty[i-16]); - else if (i < 31) xicu->p_hwi[i] (signal_false); + else if (i < 31) xicu->p_hwi[i] (signal_false); else xicu->p_hwi[i] (signal_irq_bdev); } @@ -556,6 +556,6 @@ { if (i < 8) xicu->p_hwi[i] (signal_false); - else if (i < (8 + nb_dmas)) xicu->p_hwi[i] (signal_irq_mdma[i-8]); - else xicu->p_hwi[i] (signal_false); + else if (i < (8 + nb_dmas)) xicu->p_hwi[i] (signal_irq_mdma[i-8]); + else xicu->p_hwi[i] (signal_false); } } @@ -571,10 +571,10 @@ //////////////////////////////////////////////// MEMC - memc->p_clk (this->p_clk); - memc->p_resetn (this->p_resetn); - memc->p_vci_ixr (signal_vci_xram); - memc->p_vci_tgt (signal_vci_tgt_memc); + memc->p_clk (this->p_clk); + memc->p_resetn (this->p_resetn); + memc->p_vci_ixr (signal_vci_xram); + memc->p_vci_tgt (signal_vci_tgt_memc); memc->p_dspin_in (signal_dspin_p2m_memc); - memc->p_dspin_out (signal_dspin_m2p_memc); + memc->p_dspin_out (signal_dspin_m2p_memc); // wrapper MEMC @@ -588,15 +588,15 @@ /////////////////////////////////////////////// XRAM - xram->p_clk (this->p_clk); - xram->p_resetn (this->p_resetn); - xram->p_vci (signal_vci_xram); + xram->p_clk (this->p_clk); + xram->p_resetn (this->p_resetn); + xram->p_vci (signal_vci_xram); std::cout << " - XRAM connected" << std::endl; ////////////////////////////////////////////// MDMA - mdma->p_clk (this->p_clk); - mdma->p_resetn (this->p_resetn); - mdma->p_vci_target (signal_vci_tgt_mdma); - mdma->p_vci_initiator (signal_vci_ini_mdma); + mdma->p_clk (this->p_clk); + mdma->p_resetn (this->p_resetn); + mdma->p_vci_target (signal_vci_tgt_mdma); + mdma->p_vci_initiator (signal_vci_ini_mdma); for (size_t i=0 ; ip_irq[i] (signal_irq_mdma[i]); @@ -618,10 +618,10 @@ std::cout << " - MDMA connected" << std::endl; - /////////////////////////////// Components in I/O cluster - - if ( io ) - { - // BDEV - bdev->p_clk (this->p_clk); + /////////////////////////////// Components in I/O cluster + + if ( io ) + { + // BDEV + bdev->p_clk (this->p_clk); bdev->p_resetn (this->p_resetn); bdev->p_irq (signal_irq_bdev); @@ -698,5 +698,5 @@ for ( size_t i=0 ; ip_irq[i] (signal_irq_mtty[i]); + mtty->p_irq[i] (signal_irq_mtty[i]); }