Index: trunk/modules/vci_mem_cache/caba/source/include/vci_mem_cache.h
===================================================================
--- trunk/modules/vci_mem_cache/caba/source/include/vci_mem_cache.h	(revision 430)
+++ trunk/modules/vci_mem_cache/caba/source/include/vci_mem_cache.h	(revision 434)
@@ -77,10 +77,12 @@
 
       /* States of the TGT_CMD fsm */
-      enum tgt_cmd_fsm_state_e{
+      enum tgt_cmd_fsm_state_e
+      {
         TGT_CMD_IDLE,
         TGT_CMD_ERROR,
         TGT_CMD_READ,
         TGT_CMD_WRITE,
-        TGT_CMD_CAS
+        TGT_CMD_CAS,
+        TGT_CMD_CONFIG
       };
 
@@ -144,5 +146,26 @@
         MULTI_ACK_UPT_LOCK,
         MULTI_ACK_UPT_CLEAR,
-        MULTI_ACK_WRITE_RSP
+        MULTI_ACK_WRITE_RSP,
+        MULTI_ACK_CONFIG_ACK
+      };
+
+      /* States of the CONFIG fsm */
+      enum config_fsm_state_e
+      {
+        CONFIG_IDLE,
+        CONFIG_LOOP,
+        CONFIG_RSP,
+        CONFIG_DIR_REQ,
+        CONFIG_DIR_ACCESS,
+        CONFIG_DIR_INVAL,
+        CONFIG_BC_UPT_LOCK,
+        CONFIG_BC_SEND,
+        CONFIG_BC_WAIT,
+        
+        CONFIG_UPT_WAIT,
+
+        CONFIG_UPT_LOCK,
+
+        CONFIG_HEAP_REQ
       };
 
@@ -277,5 +300,6 @@
         CLEANUP_UPT_CLEAR,
         CLEANUP_WRITE_RSP,
-        CLEANUP_SEND_ACK
+        CLEANUP_CONFIG_ACK,
+        CLEANUP_SEND_CLACK
       };
 
@@ -284,4 +308,5 @@
       {
         ALLOC_DIR_RESET,
+        ALLOC_DIR_CONFIG,
         ALLOC_DIR_READ,
         ALLOC_DIR_WRITE,
@@ -304,4 +329,5 @@
       enum alloc_upt_fsm_state_e
       {
+        ALLOC_UPT_CONFIG,
         ALLOC_UPT_WRITE,
         ALLOC_UPT_XRAM_RSP,
@@ -350,18 +376,13 @@
       };
 
+      /* Configuration commands */
+      enum cmd_config_type_e
+      {
+          CMD_CONFIG_INVAL = 0,
+          CMD_CONFIG_SYNC  = 1
+      };
+
       // debug variables (for each FSM)
-      bool         m_debug_global;
-      bool         m_debug_tgt_cmd_fsm;
-      bool         m_debug_tgt_rsp_fsm;
-      bool         m_debug_cc_send_fsm;
-      bool         m_debug_cc_receive_fsm;
-      bool         m_debug_multi_ack_fsm;
-      bool         m_debug_read_fsm;
-      bool         m_debug_write_fsm;
-      bool         m_debug_cas_fsm;
-      bool         m_debug_cleanup_fsm;
-      bool         m_debug_ixr_cmd_fsm;
-      bool         m_debug_ixr_rsp_fsm;
-      bool         m_debug_xram_rsp_fsm;
+      bool         m_debug;
       bool         m_debug_previous_hit;
       size_t       m_debug_previous_count;
@@ -373,7 +394,17 @@
       // instrumentation counters
       uint32_t     m_cpt_cycles;        // Counter of cycles
+
       uint32_t     m_cpt_read;          // Number of READ transactions
+      uint32_t     m_cpt_read_remote;   // number of remote READ transactions
+      uint32_t     m_cpt_read_flits;    // number of flits for READs
+      uint32_t     m_cpt_read_cost;     // Number of (flits * distance) for READs
+
       uint32_t     m_cpt_read_miss;     // Number of MISS READ
+
       uint32_t     m_cpt_write;         // Number of WRITE transactions
+      uint32_t     m_cpt_write_remote;  // number of remote WRITE transactions
+      uint32_t     m_cpt_write_flits;   // number of flits for WRITEs
+      uint32_t     m_cpt_write_cost;    // Number of (flits * distance) for WRITEs
+
       uint32_t     m_cpt_write_miss;    // Number of MISS WRITE
       uint32_t     m_cpt_write_cells;   // Cumulated length for WRITE transactions
@@ -391,4 +422,15 @@
       uint32_t     m_cpt_cas;           // Number of CAS transactions
 
+      uint32_t     m_cpt_cleanup_cost;  // Number of (flits * distance) for CLEANUPs
+
+      uint32_t     m_cpt_update_flits;  // Number of flits for UPDATEs
+      uint32_t     m_cpt_update_cost;   // Number of (flits * distance) for UPDATEs
+
+      uint32_t     m_cpt_inval_cost;    // Number of (flits * distance) for INVALs
+
+      uint32_t     m_cpt_get;
+
+      uint32_t     m_cpt_put;
+
       size_t       m_prev_count;
 
@@ -407,13 +449,13 @@
       VciMemCache(
           sc_module_name name,                                // Instance Name
-          const soclib::common::MappingTable &mtp,            // Mapping table direct network
-          const soclib::common::MappingTable &mtx,            // Mapping table external network
-          const soclib::common::IntTab       &srcid_x,        // global index on external network
-          const soclib::common::IntTab       &tgtid_d,        // global index on direct network
-          const size_t                       cc_global_id,    // global index on cc network
+          const soclib::common::MappingTable &mtp,            // Mapping table INT network
+          const soclib::common::MappingTable &mtx,            // Mapping table RAM network
+          const soclib::common::IntTab       &srcid_x,        // global index RAM network
+          const soclib::common::IntTab       &tgtid_d,        // global index INT network
+          const size_t                       cc_global_id,    // global index CC network
           const size_t                       nways,           // Number of ways per set
           const size_t                       nsets,           // Number of sets
           const size_t                       nwords,          // Number of words per line
-          const size_t                       max_copies,      // max number of copies in heap
+          const size_t                       max_copies,      // max number of copies
           const size_t                       heap_size=HEAP_ENTRIES,
           const size_t                       trt_lines=TRT_ENTRIES, 
@@ -437,8 +479,9 @@
 
       // Component attributes
-      std::list<soclib::common::Segment> m_seglist;          // segments allocated to memcache
+      std::list<soclib::common::Segment> m_seglist;          // segments allocated 
       size_t                             m_nseg;             // number of segments
       soclib::common::Segment            **m_seg;            // array of segments pointers
-      const size_t                       m_srcid_x;          // global index on external network
+      size_t                             m_seg_config;       // config segment index
+      const size_t                       m_srcid_x;          // global index on RAM network
       const size_t                       m_initiators;       // Number of initiators
       const size_t                       m_heap_size;        // Size of the heap
@@ -458,8 +501,8 @@
       size_t                             m_max_copies;       // max number of copies in heap
       GenericLLSCGlobalTable
-      < 32  ,                              // number of slots
-        4096,                              // number of processors in the system
-        8000,                              // registration life (# of LL operations)
-        addr_t >  m_llsc_table;            // ll/sc global registration table
+      < 32  ,    // number of slots
+        4096,    // number of processors in the system
+        8000,    // registration life (# of LL operations)
+        addr_t >                         m_llsc_table;       // ll/sc registration table
 
       // adress masks
@@ -511,28 +554,64 @@
       // (segmentation violation response request)
       sc_signal<bool>     r_tgt_cmd_to_tgt_rsp_req;
+
+      sc_signal<uint32_t> r_tgt_cmd_to_tgt_rsp_rdata;
+      sc_signal<size_t>   r_tgt_cmd_to_tgt_rsp_error;
       sc_signal<size_t>   r_tgt_cmd_to_tgt_rsp_srcid;
       sc_signal<size_t>   r_tgt_cmd_to_tgt_rsp_trdid;
       sc_signal<size_t>   r_tgt_cmd_to_tgt_rsp_pktid;
 
+      sc_signal<addr_t>   r_tgt_cmd_config_addr;
+      sc_signal<size_t>   r_tgt_cmd_config_cmd;
+
+      ///////////////////////////////////////////////////////
+      // Registers controlled by the CONFIG fsm
+      ///////////////////////////////////////////////////////
+
+      sc_signal<int>      r_config_fsm;        // FSM state
+      sc_signal<bool>     r_config_lock;       // lock protecting exclusive access
+      sc_signal<int>      r_config_cmd;        // config request status
+      sc_signal<addr_t>   r_config_address;    // target buffer physical address
+      sc_signal<size_t>   r_config_srcid;      // config request srcid
+      sc_signal<size_t>   r_config_trdid;      // config request trdid
+      sc_signal<size_t>   r_config_pktid;      // config request pktid
+      sc_signal<size_t>   r_config_nlines;     // number of lines covering the buffer
+      sc_signal<size_t>   r_config_way;        // selected way
+      sc_signal<size_t>   r_config_count;      // number of copies
+      sc_signal<size_t>   r_config_upt_index;  // UPT index
+      sc_signal<bool>     r_config_is_cnt;     // counter mode (broadcast required)
+
+      // Buffer between CONFIG fsm and TGT_RSP fsm (send a done response to L1 cache)
+      sc_signal<bool>     r_config_to_tgt_rsp_req;    // valid request
+      sc_signal<bool>     r_config_to_tgt_rsp_error;  // error response
+      sc_signal<size_t>   r_config_to_tgt_rsp_srcid;  // Transaction srcid
+      sc_signal<size_t>   r_config_to_tgt_rsp_trdid;  // Transaction trdid
+      sc_signal<size_t>   r_config_to_tgt_rsp_pktid;  // Transaction pktid
+
+      // Buffer between CONFIG fsm and CC_SEND fsm (multi-inval / broadcast-inval)
+      sc_signal<bool>     r_config_to_cc_send_multi_req;    // multi-inval request
+      sc_signal<bool>     r_config_to_cc_send_brdcast_req;  // broadcast-inval request
+      sc_signal<size_t>   r_config_to_cc_send_nline;        // line index
+      sc_signal<size_t>   r_config_to_cc_send_trdid;        // UPT index
+
       ///////////////////////////////////////////////////////
       // Registers controlled by the READ fsm
       ///////////////////////////////////////////////////////
 
-      sc_signal<int>      r_read_fsm;        // FSM state
-      sc_signal<size_t>   r_read_copy;       // Srcid of the first copy
-      sc_signal<size_t>   r_read_copy_cache; // Srcid of the first copy
-      sc_signal<bool>     r_read_copy_inst;  // Type of the first copy
-      sc_signal<tag_t>    r_read_tag;        // cache line tag (in directory)
-      sc_signal<bool>     r_read_is_cnt;     // is_cnt bit (in directory)
-      sc_signal<bool>     r_read_lock;       // lock bit (in directory)
-      sc_signal<bool>     r_read_dirty;      // dirty bit (in directory)
-      sc_signal<size_t>   r_read_count;      // number of copies
-      sc_signal<size_t>   r_read_ptr;        // pointer to the heap
-      sc_signal<data_t> * r_read_data;       // data (one cache line)
-      sc_signal<size_t>   r_read_way;        // associative way (in cache)
-      sc_signal<size_t>   r_read_trt_index;  // Transaction Table index
-      sc_signal<size_t>   r_read_next_ptr;   // Next entry to point to
-      sc_signal<bool>     r_read_last_free;  // Last free entry
-      sc_signal<addr_t>   r_read_ll_key;     // LL key from the llsc_global_table
+      sc_signal<int>      r_read_fsm;          // FSM state
+      sc_signal<size_t>   r_read_copy;         // Srcid of the first copy
+      sc_signal<size_t>   r_read_copy_cache;   // Srcid of the first copy
+      sc_signal<bool>     r_read_copy_inst;    // Type of the first copy
+      sc_signal<tag_t>    r_read_tag;          // cache line tag (in directory)
+      sc_signal<bool>     r_read_is_cnt;       // is_cnt bit (in directory)
+      sc_signal<bool>     r_read_lock;         // lock bit (in directory)
+      sc_signal<bool>     r_read_dirty;        // dirty bit (in directory)
+      sc_signal<size_t>   r_read_count;        // number of copies
+      sc_signal<size_t>   r_read_ptr;          // pointer to the heap
+      sc_signal<data_t> * r_read_data;         // data (one cache line)
+      sc_signal<size_t>   r_read_way;          // associative way (in cache)
+      sc_signal<size_t>   r_read_trt_index;    // Transaction Table index
+      sc_signal<size_t>   r_read_next_ptr;     // Next entry to point to
+      sc_signal<bool>     r_read_last_free;    // Last free entry
+      sc_signal<addr_t>   r_read_ll_key;       // LL key from the llsc_global_table
 
       // Buffer between READ fsm and IXR_CMD fsm (ask a missing cache line to XRAM)
@@ -626,4 +705,7 @@
       sc_signal<addr_t>   r_multi_ack_nline;     // pending write nline
 
+      // signaling completion of multi-inval to CONFIG fsm
+      sc_signal<bool>     r_multi_ack_to_config_ack; 
+
       // Buffer between MULTI_ACK fsm and TGT_RSP fsm (complete write/update transaction)
       sc_signal<bool>     r_multi_ack_to_tgt_rsp_req;   // valid request
@@ -662,11 +744,16 @@
       sc_signal<size_t>   r_cleanup_way;           // associative way (in cache)
 
-      sc_signal<size_t>   r_cleanup_write_srcid;   // srcid of write response
+      sc_signal<size_t>   r_cleanup_write_srcid;   // srcid of write rsp
       sc_signal<size_t>   r_cleanup_write_trdid;   // trdid of write rsp
       sc_signal<size_t>   r_cleanup_write_pktid;   // pktid of write rsp
-      sc_signal<bool>     r_cleanup_write_need_rsp;// needs a write rsp
+
+      sc_signal<bool>     r_cleanup_need_rsp;      // write response required
+      sc_signal<bool>     r_cleanup_need_ack;      // config acknowledge required
 
       sc_signal<size_t>   r_cleanup_index;         // index of the INVAL line (in the UPT)
 
+      // signaling completion of broadcast-inval to CONFIG fsm
+      sc_signal<bool>     r_cleanup_to_config_ack;  
+       
       // Buffer between CLEANUP fsm and TGT_RSP fsm (acknowledge a write command from L1)
       sc_signal<bool>     r_cleanup_to_tgt_rsp_req;   // valid request
