Changeset 441 for branches/v5/modules/vci_mem_cache/caba/metadata

Timestamp:

Jul 17, 2013, 10:54:07 AM (11 years ago)

Author:

cfuguet

Message:

Modifications in branches/v5/vci_mem_cache:

• Changing name of CC DSPIN ports: + p_dspin_in => p_dspin_p2m + p_dspin_out => p_dspin_m2p

• Splitting the Update Table in two tables: + UPT (Update Table): Stores the MULTI-UPDATE transactions + IVT (Invalidate Table): Stores the MULTI/BROADCAST INVALIDATE

transactions

Each table has its own allocator FSM: r_alloc_upt and r_alloc_ivt

File:

• branches/v5/modules/vci_mem_cache/caba/metadata/vci_mem_cache.sd (modified) (2 diffs)

branches/v5/modules/vci_mem_cache/caba/metadata/vci_mem_cache.sd

@@ -5 +5 @@
 __version__ = "$Revision: 295 $"
 
-Module('caba:vci_mem_cache',
+Module('caba:vci_mem_cache_branch',
         classname = 'soclib::caba::VciMemCache',
 
@@ -48 +48 @@
             Port('caba:vci_target'   , 'p_vci_tgt'),
             Port('caba:vci_initiator', 'p_vci_ixr'),
-            Port('caba:dspin_input',
-                'p_dspin_in',
+            Port('caba:dspin_p2m',
+                'p_dspin_p2m',
                 dspin_data_size = parameter.Reference('dspin_in_width')
             ),
-            Port('caba:dspin_output',
-                'p_dspin_out',
+            Port('caba:dspin_m2p',
+                'p_dspin_m2p',
+                dspin_data_size = parameter.Reference('dspin_out_width')
+            ),
+            Port('caba:dspin_clack',
+                'p_dspin_clack',
                 dspin_data_size = parameter.Reference('dspin_out_width')
             ),