Index: branches/v5/modules/vci_mem_cache/caba/source/include/vci_mem_cache.h
===================================================================
--- branches/v5/modules/vci_mem_cache/caba/source/include/vci_mem_cache.h	(revision 440)
+++ branches/v5/modules/vci_mem_cache/caba/source/include/vci_mem_cache.h	(revision 441)
@@ -54,4 +54,5 @@
 #define TRT_ENTRIES      4      // Number of entries in TRT
 #define UPT_ENTRIES      4      // Number of entries in UPT
+#define IVT_ENTRIES      4      // Number of entries in IVT
 #define HEAP_ENTRIES     1024   // Number of entries in HEAP
 
@@ -165,5 +166,5 @@
         CONFIG_DIR_REQ,
         CONFIG_DIR_ACCESS,
-        CONFIG_DIR_UPT_LOCK,
+        CONFIG_DIR_IVT_LOCK,
         CONFIG_BC_SEND,
         CONFIG_BC_WAIT,
@@ -213,5 +214,5 @@
         WRITE_MISS_XRAM_REQ,
         WRITE_BC_TRT_LOCK,
-        WRITE_BC_UPT_LOCK,
+        WRITE_BC_IVT_LOCK,
         WRITE_BC_DIR_INVAL,
         WRITE_BC_CC_SEND,
@@ -276,5 +277,5 @@
         CAS_UPT_NEXT,
         CAS_BC_TRT_LOCK,
-        CAS_BC_UPT_LOCK,
+        CAS_BC_IVT_LOCK,
         CAS_BC_DIR_INVAL,
         CAS_BC_CC_SEND,
@@ -301,7 +302,7 @@
         CLEANUP_HEAP_CLEAN,
         CLEANUP_HEAP_FREE,
-        CLEANUP_UPT_LOCK,
-        CLEANUP_UPT_DECREMENT,
-        CLEANUP_UPT_CLEAR,
+        CLEANUP_IVT_LOCK,
+        CLEANUP_IVT_DECREMENT,
+        CLEANUP_IVT_CLEAR,
         CLEANUP_WRITE_RSP,
         CLEANUP_CONFIG_ACK,
@@ -334,10 +335,17 @@
       enum alloc_upt_fsm_state_e
       {
-        ALLOC_UPT_CONFIG,
         ALLOC_UPT_WRITE,
-        ALLOC_UPT_XRAM_RSP,
-        ALLOC_UPT_MULTI_ACK,
-        ALLOC_UPT_CLEANUP,
-        ALLOC_UPT_CAS
+        ALLOC_UPT_CAS,
+        ALLOC_UPT_MULTI_ACK
+      };
+
+      /* States of the ALLOC_IVT fsm */
+      enum alloc_ivt_fsm_state_e
+      {
+        ALLOC_IVT_WRITE,
+        ALLOC_IVT_XRAM_RSP,
+        ALLOC_IVT_CLEANUP,
+        ALLOC_IVT_CAS,
+        ALLOC_IVT_CONFIG
       };
 
@@ -450,6 +458,7 @@
       soclib::caba::VciTarget<vci_param_int>      p_vci_tgt;
       soclib::caba::VciInitiator<vci_param_ext>   p_vci_ixr;
-      soclib::caba::DspinInput<dspin_in_width>    p_dspin_in;
-      soclib::caba::DspinOutput<dspin_out_width>  p_dspin_out;
+      soclib::caba::DspinInput<dspin_in_width>    p_dspin_p2m;
+      soclib::caba::DspinOutput<dspin_out_width>  p_dspin_m2p;
+      soclib::caba::DspinOutput<dspin_out_width>  p_dspin_clack;
 
       VciMemCache(
@@ -467,4 +476,5 @@
           const size_t                       trt_lines=TRT_ENTRIES, 
           const size_t                       upt_lines=UPT_ENTRIES,     
+          const size_t                       ivt_lines=IVT_ENTRIES,     
           const size_t                       debug_start_cycle=0,
           const bool                         debug_ok=false );
@@ -501,5 +511,6 @@
       TransactionTab                     m_trt;              // xram transaction table
       uint32_t                           m_upt_lines;
-      UpdateTab                          m_upt;              // pending update & invalidate
+      UpdateTab                          m_upt;              // pending update
+      UpdateTab                          m_ivt;              // pending invalidate
       CacheDirectory                     m_cache_directory;  // data cache directory
       CacheData                          m_cache_data;       // data array[set][way][word]
@@ -590,5 +601,5 @@
       sc_signal<size_t>   r_config_heap_next;      // current pointer to scan HEAP
 
-      sc_signal<size_t>   r_config_upt_index;  // UPT index
+      sc_signal<size_t>   r_config_ivt_index;      // IVT index
 
       // Buffer between CONFIG fsm and TGT_RSP fsm (send a done response to L1 cache)
@@ -871,5 +882,5 @@
       sc_signal<size_t>   r_xram_rsp_victim_ptr;        // victim line pointer to the heap
       sc_signal<data_t> * r_xram_rsp_victim_data;       // victim line data
-      sc_signal<size_t>   r_xram_rsp_upt_index;         // UPT entry index
+      sc_signal<size_t>   r_xram_rsp_ivt_index;         // IVT entry index
       sc_signal<size_t>   r_xram_rsp_next_ptr;          // Next pointer to the heap
 
@@ -952,4 +963,10 @@
 
       ////////////////////////////////////////////////////
+      // Registers controlled by ALLOC_IVT fsm
+      ////////////////////////////////////////////////////
+
+      sc_signal<int>      r_alloc_ivt_fsm;
+
+      ////////////////////////////////////////////////////
       // Registers controlled by ALLOC_HEAP fsm
       ////////////////////////////////////////////////////
