Index: /branches/v5/communication/dspin_dhccp_param/caba/source/include/dspin_dhccp_param.h
===================================================================
--- /branches/v5/communication/dspin_dhccp_param/caba/source/include/dspin_dhccp_param.h	(revision 441)
+++ /branches/v5/communication/dspin_dhccp_param/caba/source/include/dspin_dhccp_param.h	(revision 442)
@@ -61,14 +61,5 @@
 
 /*
- * Memory Cache to L1 cache command packets
- *
- * CLEANUP ACKNOWLEDGEMENT
- *
- * flit 1
- * ----------------------------------------------------------------------------------------------
- * EOP:1 | DEST(14 bits) | X(3 bits) | SET_INDEX(16 bits) | WAY_INDEX(2 bits) | TYPE:0b10X | BC:0
- * ----------------------------------------------------------------------------------------------
- *                                                                            | X: 0 DATA  |
- *                                                                            |    1 INST  |
+ * M2P command packets
  *
  * MULTICAST UPDATE
@@ -76,5 +67,5 @@
  * flit 1
  * ----------------------------------------------------------------------------------------------
- * EOP:0 | DEST(14 bits) | X(3 bits) | MEMC_ID(14 bits) | UPDT_INDEX(4 bits) | TYPE:0b00X  | BC:0
+ * EOP:0 | DEST(14 bits) | X(4 bits) | MEMC_ID(14 bits) | UPDT_INDEX(4 bits) | TYPE:0b0X   | BC:0
  * ----------------------------------------------------------------------------------------------
  *                                                                           | X: 0 DATA   |
@@ -99,5 +90,5 @@
  * flit 1
  * ----------------------------------------------------------------------------------------------
- * EOP:0 | DEST(14 bits) | X(3 bits) | MEMC_ID(14 bits) | UPDT_INDEX(4 bits) | TYPE:0b01X | BC:0
+ * EOP:0 | DEST(14 bits) | X(4 bits) | MEMC_ID(14 bits) | UPDT_INDEX(4 bits) | TYPE:0b1X  | BC:0
  * ----------------------------------------------------------------------------------------------
  *                                                                           | X: 0 DATA  |
@@ -120,4 +111,18 @@
  * EOP:1 |        X(5 bits)       |                                              NLINE (34 bits)
  * ----------------------------------------------------------------------------------------------
+ *
+ * M2P clack commands
+ *
+ * CLEANUP ACKNOWLEDGEMENT
+ *
+ * flit 1
+ * ----------------------------------------------------------------------------------------------
+ * EOP:1 | DEST(14 bits) | X(5 bits) | SET_INDEX(16 bits) | WAY_INDEX(2 bits) | TYPE:0bX   | BC:0
+ * ----------------------------------------------------------------------------------------------
+ *                                                                            | X: 0 CLACK |
+ *                                                                            |      DATA  |
+ *                                                                            |    1 CLACK |
+ *                                                                            |      INST  |
+ *
  */
 
@@ -135,6 +140,7 @@
   public:
 
-    static const uint8_t  from_memc_flit_width         = 40;
-    static const uint8_t  from_l1_flit_width           = 33;
+    static const uint8_t  m2p_flit_width               = 40;
+    static const uint8_t  p2m_flit_width               = 33;
+    static const uint8_t  clack_flit_width             = 40;
 
     static const uint8_t  UPDT_INDEX_WIDTH             = 4;
@@ -148,13 +154,14 @@
     static const uint8_t  WAY_INDEX_WIDTH              = 2;
     static const uint8_t  BROADCAST_BOX_WIDTH          = 20;
-    static const uint8_t  MC_TYPE_WIDTH                = 3;
-    static const uint8_t  L1_TYPE_WIDTH                = 2;
-
-    static const uint8_t  FROM_L1_TYPE_SHIFT           = 1;
-    static const uint64_t FROM_L1_TYPE_MASK            = ((1ULL<<L1_TYPE_WIDTH)-1);
-    static const uint8_t  FROM_L1_EOP_SHIFT            = 32;
-    static const uint64_t FROM_L1_EOP_MASK             = 1;
-    static const uint8_t  FROM_L1_BC_SHIFT             = 0;
-    static const uint64_t FROM_L1_BC_MASK              = 1;
+    static const uint8_t  M2P_TYPE_WIDTH               = 2;
+    static const uint8_t  P2M_TYPE_WIDTH               = 2;
+    static const uint8_t  CLACK_TYPE_WIDTH             = 1;
+
+    static const uint8_t  P2M_TYPE_SHIFT               = 1;
+    static const uint64_t P2M_TYPE_MASK                = ((1ULL<<P2M_TYPE_WIDTH)-1);
+    static const uint8_t  P2M_EOP_SHIFT                = 32;
+    static const uint64_t P2M_EOP_MASK                 = 1;
+    static const uint8_t  P2M_BC_SHIFT                 = 0;
+    static const uint64_t P2M_BC_MASK                  = 1;
 
     static const uint8_t  CLEANUP_DEST_SHIFT           = 22;
@@ -174,10 +181,10 @@
     static const uint64_t MULTI_ACK_UPDT_INDEX_MASK    = ((1ULL<<UPDT_INDEX_WIDTH)-1);
 
-    static const uint8_t  FROM_MC_TYPE_SHIFT           = 1;
-    static const uint64_t FROM_MC_TYPE_MASK            = ((1ULL<<MC_TYPE_WIDTH)-1);
-    static const uint8_t  FROM_MC_EOP_SHIFT            = 39;
-    static const uint64_t FROM_MC_EOP_MASK             = 1;
-    static const uint8_t  FROM_MC_BC_SHIFT             = 0;
-    static const uint64_t FROM_MC_BC_MASK              = 1;
+    static const uint8_t  M2P_TYPE_SHIFT               = 1;
+    static const uint64_t M2P_TYPE_MASK                = ((1ULL<<M2P_TYPE_WIDTH)-1);
+    static const uint8_t  M2P_EOP_SHIFT                = 39;
+    static const uint64_t M2P_EOP_MASK                 = 1;
+    static const uint8_t  M2P_BC_SHIFT                 = 0;
+    static const uint64_t M2P_BC_MASK                  = 1;
 
     static const uint8_t  MULTI_INVAL_DEST_SHIFT       = 25;
@@ -205,11 +212,4 @@
     static const uint64_t MULTI_UPDT_DATA_MASK         = ((1ULL<<DATA_WIDTH)-1);
 
-    static const uint8_t  CLEANUP_ACK_DEST_SHIFT       = MULTI_INVAL_DEST_SHIFT;
-    static const uint64_t CLEANUP_ACK_DEST_MASK        = MULTI_INVAL_DEST_MASK;
-    static const uint8_t  CLEANUP_ACK_SET_SHIFT        = 6;
-    static const uint64_t CLEANUP_ACK_SET_MASK         = ((1ULL<<SET_INDEX_WIDTH)-1);
-    static const uint8_t  CLEANUP_ACK_WAY_SHIFT        = 4;
-    static const uint64_t CLEANUP_ACK_WAY_MASK         = ((1ULL<<WAY_INDEX_WIDTH)-1);
-
     static const uint8_t  BROADCAST_BOX_SHIFT          = 19;
     static const uint64_t BROADCAST_BOX_MASK           = ((1ULL<<BROADCAST_BOX_WIDTH)-1);
@@ -219,6 +219,19 @@
     static const uint64_t BROADCAST_NLINE_MASK         = MULTI_INVAL_NLINE_MASK;
 
+    static const uint8_t  CLACK_TYPE_SHIFT             = 1;
+    static const uint64_t CLACK_TYPE_MASK              = ((1ULL<<CLACK_TYPE_WIDTH)-1);
+    static const uint8_t  CLACK_EOP_SHIFT              = 39;
+    static const uint64_t CLACK_EOP_MASK               = 1;
+    static const uint8_t  CLACK_BC_SHIFT               = 0;
+    static const uint64_t CLACK_BC_MASK                = 1;
+    static const uint8_t  CLACK_DEST_SHIFT             = 25;
+    static const uint64_t CLACK_DEST_MASK              = ((1ULL<<SRCID_WIDTH)-1);
+    static const uint8_t  CLACK_SET_SHIFT              = 6;
+    static const uint64_t CLACK_SET_MASK               = ((1ULL<<SET_INDEX_WIDTH)-1);
+    static const uint8_t  CLACK_WAY_SHIFT              = 4;
+    static const uint64_t CLACK_WAY_MASK               = ((1ULL<<WAY_INDEX_WIDTH)-1);
+
     /*
-     * L1 cache to Memory Cache command types
+     * P2M command types
      */
     enum
@@ -231,5 +244,5 @@
 
     /*
-     * Memory Cache to L1 cache command types
+     * M2P command types
      */
     enum
@@ -240,15 +253,22 @@
       TYPE_MULTI_INVAL      = 2,
       TYPE_MULTI_INVAL_DATA = TYPE_MULTI_INVAL,
-      TYPE_MULTI_INVAL_INST = 3,
-      TYPE_CLEANUP_ACK      = 4,
-      TYPE_CLEANUP_ACK_DATA = TYPE_CLEANUP_ACK,
-      TYPE_CLEANUP_ACK_INST = 5
+      TYPE_MULTI_INVAL_INST = 3
     };
 
+    /*
+     * CLACK command types
+     */
+    enum
+    {
+      TYPE_CLACK      = 0,
+      TYPE_CLACK_DATA = TYPE_CLACK,
+      TYPE_CLACK_INST = 1
+    };
+
     enum flit_field_e
     {
-      FROM_L1_TYPE,
-      FROM_L1_EOP,
-      FROM_L1_BC,
+      P2M_TYPE,
+      P2M_EOP,
+      P2M_BC,
 
       CLEANUP_DEST,
@@ -261,7 +281,7 @@
       MULTI_ACK_UPDT_INDEX,
 
-      FROM_MC_TYPE,
-      FROM_MC_EOP,
-      FROM_MC_BC,
+      M2P_TYPE,
+      M2P_EOP,
+      M2P_BC,
 
       MULTI_INVAL_DEST,
@@ -278,7 +298,9 @@
       MULTI_UPDT_DATA,
 
-      CLEANUP_ACK_DEST,
-      CLEANUP_ACK_SET,
-      CLEANUP_ACK_WAY,
+      CLACK_TYPE,
+
+      CLACK_DEST,
+      CLACK_SET,
+      CLACK_WAY,
 
       BROADCAST_BOX,
@@ -291,7 +313,7 @@
       switch(field)
       {
-        GET_FIELD(flit,FROM_L1_TYPE);
-        GET_FIELD(flit,FROM_L1_EOP);
-        GET_FIELD(flit,FROM_L1_BC);
+        GET_FIELD(flit,P2M_TYPE);
+        GET_FIELD(flit,P2M_EOP);
+        GET_FIELD(flit,P2M_BC);
         GET_FIELD(flit,CLEANUP_DEST);
         GET_FIELD(flit,CLEANUP_SRCID);
@@ -301,7 +323,7 @@
         GET_FIELD(flit,MULTI_ACK_DEST);
         GET_FIELD(flit,MULTI_ACK_UPDT_INDEX);
-        GET_FIELD(flit,FROM_MC_TYPE);
-        GET_FIELD(flit,FROM_MC_EOP);
-        GET_FIELD(flit,FROM_MC_BC);
+        GET_FIELD(flit,M2P_TYPE);
+        GET_FIELD(flit,M2P_EOP);
+        GET_FIELD(flit,M2P_BC);
         GET_FIELD(flit,MULTI_INVAL_DEST);
         GET_FIELD(flit,MULTI_INVAL_SRCID);
@@ -315,7 +337,8 @@
         GET_FIELD(flit,MULTI_UPDT_BE);
         GET_FIELD(flit,MULTI_UPDT_DATA);
-        GET_FIELD(flit,CLEANUP_ACK_DEST);
-        GET_FIELD(flit,CLEANUP_ACK_SET);
-        GET_FIELD(flit,CLEANUP_ACK_WAY);
+        GET_FIELD(flit,CLACK_TYPE);
+        GET_FIELD(flit,CLACK_DEST);
+        GET_FIELD(flit,CLACK_SET);
+        GET_FIELD(flit,CLACK_WAY);
         GET_FIELD(flit,BROADCAST_BOX);
         GET_FIELD(flit,BROADCAST_SRCID);
@@ -330,7 +353,7 @@
       switch(field)
       {
-        SET_FIELD(flit,value,FROM_L1_TYPE);
-        SET_FIELD(flit,value,FROM_L1_EOP);
-        SET_FIELD(flit,value,FROM_L1_BC);
+        SET_FIELD(flit,value,P2M_TYPE);
+        SET_FIELD(flit,value,P2M_EOP);
+        SET_FIELD(flit,value,P2M_BC);
         SET_FIELD(flit,value,CLEANUP_DEST);
         SET_FIELD(flit,value,CLEANUP_SRCID);
@@ -340,7 +363,7 @@
         SET_FIELD(flit,value,MULTI_ACK_DEST);
         SET_FIELD(flit,value,MULTI_ACK_UPDT_INDEX);
-        SET_FIELD(flit,value,FROM_MC_TYPE);
-        SET_FIELD(flit,value,FROM_MC_EOP);
-        SET_FIELD(flit,value,FROM_MC_BC);
+        SET_FIELD(flit,value,M2P_TYPE);
+        SET_FIELD(flit,value,M2P_EOP);
+        SET_FIELD(flit,value,M2P_BC);
         SET_FIELD(flit,value,MULTI_INVAL_DEST);
         SET_FIELD(flit,value,MULTI_INVAL_SRCID);
@@ -354,7 +377,8 @@
         SET_FIELD(flit,value,MULTI_UPDT_BE);
         SET_FIELD(flit,value,MULTI_UPDT_DATA);
-        SET_FIELD(flit,value,CLEANUP_ACK_DEST);
-        SET_FIELD(flit,value,CLEANUP_ACK_SET);
-        SET_FIELD(flit,value,CLEANUP_ACK_WAY);
+        SET_FIELD(flit,value,CLACK_TYPE);
+        SET_FIELD(flit,value,CLACK_DEST);
+        SET_FIELD(flit,value,CLACK_SET);
+        SET_FIELD(flit,value,CLACK_WAY);
         SET_FIELD(flit,value,BROADCAST_BOX);
         SET_FIELD(flit,value,BROADCAST_SRCID);
Index: /branches/v5/modules/vci_mem_cache/caba/metadata/vci_mem_cache.sd
===================================================================
--- /branches/v5/modules/vci_mem_cache/caba/metadata/vci_mem_cache.sd	(revision 441)
+++ /branches/v5/modules/vci_mem_cache/caba/metadata/vci_mem_cache.sd	(revision 442)
@@ -5,5 +5,5 @@
 __version__ = "$Revision: 295 $"
 
-Module('caba:vci_mem_cache_branch',
+Module('caba:vci_mem_cache',
         classname = 'soclib::caba::VciMemCache',
 
@@ -48,13 +48,13 @@
             Port('caba:vci_target'   , 'p_vci_tgt'),
             Port('caba:vci_initiator', 'p_vci_ixr'),
-            Port('caba:dspin_p2m',
+            Port('caba:dspin_input',
                 'p_dspin_p2m',
                 dspin_data_size = parameter.Reference('dspin_in_width')
             ),
-            Port('caba:dspin_m2p',
+            Port('caba:dspin_output',
                 'p_dspin_m2p',
                 dspin_data_size = parameter.Reference('dspin_out_width')
             ),
-            Port('caba:dspin_clack',
+            Port('caba:dspin_output',
                 'p_dspin_clack',
                 dspin_data_size = parameter.Reference('dspin_out_width')
Index: /branches/v5/modules/vci_mem_cache/caba/source/include/vci_mem_cache.h
===================================================================
--- /branches/v5/modules/vci_mem_cache/caba/source/include/vci_mem_cache.h	(revision 441)
+++ /branches/v5/modules/vci_mem_cache/caba/source/include/vci_mem_cache.h	(revision 442)
@@ -125,10 +125,8 @@
         CC_SEND_WRITE_IDLE,
         CC_SEND_CAS_IDLE,
-        CC_SEND_CLEANUP_IDLE,
         CC_SEND_CONFIG_INVAL_HEADER,
         CC_SEND_CONFIG_INVAL_NLINE,
         CC_SEND_CONFIG_BRDCAST_HEADER,
         CC_SEND_CONFIG_BRDCAST_NLINE,
-        CC_SEND_CLEANUP_ACK,
         CC_SEND_XRAM_RSP_BRDCAST_HEADER,
         CC_SEND_XRAM_RSP_BRDCAST_NLINE,
@@ -790,11 +788,4 @@
       sc_signal<size_t>   r_cleanup_to_tgt_rsp_pktid; // transaction pktid
 
-      // Buffer between CLEANUP fsm and CC_SEND fsm (acknowledge a cleanup command from L1)
-      sc_signal<bool>     r_cleanup_to_cc_send_req;       // valid request
-      sc_signal<size_t>   r_cleanup_to_cc_send_srcid;     // L1 srcid
-      sc_signal<size_t>   r_cleanup_to_cc_send_set_index; // L1 set index
-      sc_signal<size_t>   r_cleanup_to_cc_send_way_index; // L1 way index
-      sc_signal<bool>     r_cleanup_to_cc_send_inst;      // Instruction Cleanup Ack
-
       ///////////////////////////////////////////////////////
       // Registers controlled by CAS fsm
Index: /branches/v5/modules/vci_mem_cache/caba/source/src/vci_mem_cache.cpp
===================================================================
--- /branches/v5/modules/vci_mem_cache/caba/source/src/vci_mem_cache.cpp	(revision 441)
+++ /branches/v5/modules/vci_mem_cache/caba/source/src/vci_mem_cache.cpp	(revision 442)
@@ -99,10 +99,8 @@
   "CC_SEND_WRITE_IDLE",
   "CC_SEND_CAS_IDLE",
-  "CC_SEND_CLEANUP_IDLE",
   "CC_SEND_CONFIG_INVAL_HEADER",
   "CC_SEND_CONFIG_INVAL_NLINE",
   "CC_SEND_CONFIG_BRDCAST_HEADER",
   "CC_SEND_CONFIG_BRDCAST_NLINE",
-  "CC_SEND_CLEANUP_ACK",
   "CC_SEND_XRAM_RSP_BRDCAST_HEADER",
   "CC_SEND_XRAM_RSP_BRDCAST_NLINE",
@@ -4254,5 +4252,5 @@
         DspinDhccpParam::dspin_get(
             flit,
-            DspinDhccpParam::FROM_L1_TYPE);
+            DspinDhccpParam::P2M_TYPE);
 
       r_cleanup_way_index =
@@ -4992,14 +4990,7 @@
     ////////////////////////
     case CLEANUP_SEND_CLACK:  // acknowledgement to a cleanup command
-                              // on the coherence network (request to the CC_SEND FSM).
-                              // wait if pending request to the CC_SEND FSM
-    {
-      if(r_cleanup_to_cc_send_req.read()) break;
-
-      r_cleanup_to_cc_send_req       = true;
-      r_cleanup_to_cc_send_set_index = r_cleanup_nline.read() & 0xFFFF;
-      r_cleanup_to_cc_send_way_index = r_cleanup_way_index.read();
-      r_cleanup_to_cc_send_srcid     = r_cleanup_srcid.read();
-      r_cleanup_to_cc_send_inst      = r_cleanup_inst.read();
+                              // on the coherence CLACK network.
+    {
+      if(not p_dspin_clack.read) break;
 
       r_cleanup_fsm = CLEANUP_IDLE;
@@ -5844,9 +5835,6 @@
   // network, used to update or invalidate cache lines in L1 caches.
   //
-  // This fsm is used also to acknowledge CLEANUP a command after request from
-  // the CLEANUP fsm.
-  //
-  // It implements a round-robin priority between the five possible client FSMs
-  //     XRAM_RSP > CAS > CLEANUP > WRITE > CONFIG 
+  // It implements a round-robin priority between the four possible client FSMs
+  //     XRAM_RSP > CAS > WRITE > CONFIG 
   //
   // Each FSM can request the next services:
@@ -5860,6 +5848,4 @@
   //   r_config_to_cc_send_brdcast_req : broadcast-inval
   //   
-  // - r_cleanup_to_cc_send_req : cleanup acknowledgement
-  //
   // An inval request is a double DSPIN flit command containing:
   // 1. the index of the line to be invalidated.
@@ -5904,10 +5890,4 @@
           break;
         }
-        // CLEANUP
-        if (r_cleanup_to_cc_send_req.read())
-        {
-          r_cc_send_fsm = CC_SEND_CLEANUP_ACK;
-          break;
-        }
         // WRITE
         if(m_write_to_cc_send_inst_fifo.rok() or
@@ -5983,10 +5963,4 @@
           break;
         }
-        // CLEANUP
-        if (r_cleanup_to_cc_send_req.read())
-        {
-          r_cc_send_fsm = CC_SEND_CLEANUP_ACK;
-          break;
-        }
         // WRITE
         if(m_write_to_cc_send_inst_fifo.rok() or
@@ -6022,10 +5996,4 @@
           break;
         }
-        // CLEANUP
-        if(r_cleanup_to_cc_send_req.read())
-        {
-          r_cc_send_fsm = CC_SEND_CLEANUP_ACK;
-          break;
-        }
         // WRITE
         if(m_write_to_cc_send_inst_fifo.rok() or
@@ -6075,9 +6043,4 @@
       case CC_SEND_CAS_IDLE:   // CLEANUP FSM has highest priority
       {
-        if(r_cleanup_to_cc_send_req.read())
-        {
-          r_cc_send_fsm = CC_SEND_CLEANUP_ACK;
-          break;
-        }
         if(m_write_to_cc_send_inst_fifo.rok() or
             r_write_to_cc_send_multi_req.read())
@@ -6130,70 +6093,4 @@
           r_cc_send_fsm = CC_SEND_CAS_BRDCAST_HEADER;
           m_cpt_inval++;
-          break;
-        }
-        break;
-      }
-      //////////////////////////
-      case CC_SEND_CLEANUP_IDLE:   // WRITE FSM has highest priority
-      {
-        // WRITE
-        if(m_write_to_cc_send_inst_fifo.rok() or
-            r_write_to_cc_send_multi_req.read())
-        {
-          r_cc_send_fsm = CC_SEND_WRITE_UPDT_HEADER;
-          m_cpt_update++;
-          break;
-        }
-        if(r_write_to_cc_send_brdcast_req.read())
-        {
-          r_cc_send_fsm = CC_SEND_WRITE_BRDCAST_HEADER;
-          m_cpt_inval++;
-          break;
-        }
-        // CONFIG
-        if(r_config_to_cc_send_multi_req.read())
-        {
-          r_cc_send_fsm = CC_SEND_CONFIG_INVAL_HEADER;
-          m_cpt_inval++;
-          break;
-        }
-        if(r_config_to_cc_send_brdcast_req.read())
-        {
-          r_cc_send_fsm = CC_SEND_CONFIG_BRDCAST_HEADER;
-          m_cpt_inval++;
-          break;
-        }
-        // XRAM_RSP
-        if(m_xram_rsp_to_cc_send_inst_fifo.rok() or
-            r_xram_rsp_to_cc_send_multi_req.read())
-        {
-          r_cc_send_fsm = CC_SEND_XRAM_RSP_INVAL_HEADER;
-          m_cpt_inval++;
-          break;
-        }
-        if(r_xram_rsp_to_cc_send_brdcast_req.read())
-        {
-          r_cc_send_fsm = CC_SEND_XRAM_RSP_BRDCAST_HEADER;
-          m_cpt_inval++;
-          break;
-        }
-        // CAS
-        if(m_cas_to_cc_send_inst_fifo.rok() or
-            r_cas_to_cc_send_multi_req.read())
-        {
-          r_cc_send_fsm = CC_SEND_CAS_UPDT_HEADER;
-          m_cpt_update++;
-          break;
-        }
-        if(r_cas_to_cc_send_brdcast_req.read())
-        {
-          r_cc_send_fsm = CC_SEND_CAS_BRDCAST_HEADER;
-          m_cpt_inval++;
-          break;
-        }
-        // CLEANUP
-        if(r_cleanup_to_cc_send_req.read())
-        {
-          r_cc_send_fsm = CC_SEND_CLEANUP_ACK;
           break;
         }
@@ -6249,20 +6146,4 @@
           << " CC_SEND_CONFIG_BRDCAST_NLINE> BC-Inval for line "
           << std::hex << r_config_to_cc_send_nline.read() << std::endl;
-#endif
-        break;
-      }
-      /////////////////////////
-      case CC_SEND_CLEANUP_ACK:   // send one flit for a cleanup acknowledgement 
-      {
-        if(not p_dspin_m2p.read) break;
-
-        r_cleanup_to_cc_send_req = false;
-        r_cc_send_fsm = CC_SEND_CLEANUP_IDLE;
-
-#if DEBUG_MEMC_CC_SEND
-if(m_debug)
-std::cout << "  <MEMC " << name()
-          << " CC_SEND_CLEANUP_ACK> Cleanup Ack for srcid "
-          << std::hex << r_cleanup_to_cc_send_srcid.read() << std::endl;
 #endif
         break;
@@ -6500,5 +6381,5 @@
           DspinDhccpParam::dspin_get(
               p_dspin_p2m.data.read(),
-              DspinDhccpParam::FROM_L1_TYPE);
+              DspinDhccpParam::P2M_TYPE);
 
         if((type == DspinDhccpParam::TYPE_CLEANUP_DATA) or
@@ -8041,5 +7922,4 @@
     case CC_SEND_WRITE_IDLE:
     case CC_SEND_CAS_IDLE:
-    case CC_SEND_CLEANUP_IDLE:
     {
         break;
@@ -8076,5 +7956,5 @@
         DspinDhccpParam::dspin_set( flit,
                                     multi_inval_type,
-                                    DspinDhccpParam::FROM_MC_TYPE);
+                                    DspinDhccpParam::M2P_TYPE);
         p_dspin_m2p.write = true;
         p_dspin_m2p.data  = flit;
@@ -8093,49 +7973,4 @@
         break;
     }
-    ////////////////////////
-    case CC_SEND_CLEANUP_ACK:
-      {
-        uint8_t cleanup_ack_type;
-        if(r_cleanup_to_cc_send_inst.read())
-        {
-          cleanup_ack_type = DspinDhccpParam::TYPE_CLEANUP_ACK_INST;
-        }
-        else
-        {
-          cleanup_ack_type = DspinDhccpParam::TYPE_CLEANUP_ACK_DATA;
-        }
-
-        uint64_t flit = 0;
-        uint64_t dest =
-          r_cleanup_to_cc_send_srcid.read() <<
-          (DspinDhccpParam::SRCID_WIDTH - vci_param_int::S);
-
-        DspinDhccpParam::dspin_set(
-            flit,
-            dest,
-            DspinDhccpParam::CLEANUP_ACK_DEST);
-
-        DspinDhccpParam::dspin_set(
-            flit,
-            r_cleanup_to_cc_send_set_index.read(),
-            DspinDhccpParam::CLEANUP_ACK_SET);
-
-        DspinDhccpParam::dspin_set(
-            flit,
-            r_cleanup_to_cc_send_way_index.read(),
-            DspinDhccpParam::CLEANUP_ACK_WAY);
-
-        DspinDhccpParam::dspin_set(
-            flit,
-            cleanup_ack_type,
-            DspinDhccpParam::FROM_MC_TYPE);
-
-        p_dspin_m2p.eop   = true;
-        p_dspin_m2p.write = true;
-        p_dspin_m2p.data  = flit;
-
-        break;
-    }
-
     ///////////////////////////////////
     case CC_SEND_XRAM_RSP_INVAL_HEADER:
@@ -8171,5 +8006,5 @@
         DspinDhccpParam::dspin_set( flit,
                                     multi_inval_type,
-                                    DspinDhccpParam::FROM_MC_TYPE);
+                                    DspinDhccpParam::M2P_TYPE);
         p_dspin_m2p.write = true;
         p_dspin_m2p.data  = flit;
@@ -8209,5 +8044,5 @@
         DspinDhccpParam::dspin_set( flit,
                                     1ULL,
-                                    DspinDhccpParam::FROM_MC_BC);
+                                    DspinDhccpParam::M2P_BC);
         p_dspin_m2p.write = true;
         p_dspin_m2p.data  = flit;
@@ -8300,5 +8135,5 @@
             flit,
             multi_updt_type,
-            DspinDhccpParam::FROM_MC_TYPE);
+            DspinDhccpParam::M2P_TYPE);
 
         p_dspin_m2p.write = true;
@@ -8393,5 +8228,5 @@
             flit,
             multi_updt_type,
-            DspinDhccpParam::FROM_MC_TYPE);
+            DspinDhccpParam::M2P_TYPE);
 
         p_dspin_m2p.write = true;
@@ -8464,12 +8299,84 @@
   }
 
+  ////////////////////////////////////////////////////////////////////
+  //  p_dspin_clack port (CLEANUP FSM)
+  ////////////////////////////////////////////////////////////////////
+
+  switch(r_cleanup_fsm.read())
+  {
+    case CLEANUP_IDLE:
+    case CLEANUP_GET_NLINE:
+    case CLEANUP_DIR_REQ:
+    case CLEANUP_DIR_LOCK:
+    case CLEANUP_DIR_WRITE:
+    case CLEANUP_HEAP_REQ:
+    case CLEANUP_HEAP_LOCK:
+    case CLEANUP_HEAP_SEARCH:
+    case CLEANUP_HEAP_CLEAN:
+    case CLEANUP_HEAP_FREE:
+    case CLEANUP_IVT_LOCK:
+    case CLEANUP_IVT_DECREMENT:
+    case CLEANUP_IVT_CLEAR:
+    case CLEANUP_WRITE_RSP:
+    case CLEANUP_CONFIG_ACK:
+      p_dspin_clack.write = false;
+      p_dspin_clack.eop   = false;
+      p_dspin_clack.data  = 0;
+
+      break;
+
+    case CLEANUP_SEND_CLACK: 
+      {
+        uint8_t cleanup_ack_type;
+        if(r_cleanup_inst.read())
+        {
+          cleanup_ack_type = DspinDhccpParam::TYPE_CLACK_INST;
+        }
+        else
+        {
+          cleanup_ack_type = DspinDhccpParam::TYPE_CLACK_DATA;
+        }
+
+        uint64_t flit = 0;
+        uint64_t dest =
+          r_cleanup_srcid.read() <<
+          (DspinDhccpParam::SRCID_WIDTH - vci_param_int::S);
+
+        DspinDhccpParam::dspin_set(
+            flit,
+            dest,
+            DspinDhccpParam::CLACK_DEST);
+
+        DspinDhccpParam::dspin_set(
+            flit,
+            r_cleanup_nline.read() & 0xFFFF,
+            DspinDhccpParam::CLACK_SET);
+
+        DspinDhccpParam::dspin_set(
+            flit,
+            r_cleanup_way_index.read(),
+            DspinDhccpParam::CLACK_WAY);
+
+        DspinDhccpParam::dspin_set(
+            flit,
+            cleanup_ack_type,
+            DspinDhccpParam::CLACK_TYPE);
+
+        p_dspin_clack.eop   = true;
+        p_dspin_clack.write = true;
+        p_dspin_clack.data  = flit;
+      }
+      break;
+  }
+
   ///////////////////////////////////////////////////////////////////
   //  p_dspin_p2m port (CC_RECEIVE FSM)
   ///////////////////////////////////////////////////////////////////
-  p_dspin_p2m.read = false;
+  //
   switch(r_cc_receive_fsm.read())
   {
     case CC_RECEIVE_IDLE:
       {
+        p_dspin_p2m.read = false;
         break;
       }