Changeset 444 for branches/v5/modules/vci_cc_vcache_wrapper
- Timestamp:
- Jul 17, 2013, 2:46:46 PM (11 years ago)
- File:
-
- 1 edited
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branches/v5/modules/vci_cc_vcache_wrapper/caba/source/src/vci_cc_vcache_wrapper.cpp
r443 r444 5451 5451 // initialize coherence packet type 5452 5452 uint64_t receive_type = DspinDhccpParam::dspin_get(receive_data, 5453 DspinDhccpParam:: FROM_MC_TYPE);5453 DspinDhccpParam::M2P_TYPE); 5454 5454 // initialize data/ins flip_flop (0 data / 1 ins) 5455 5455 r_cc_receive_data_ins = (bool)(receive_type & 0x1); 5456 5456 // test for a broadcast 5457 if (DspinDhccpParam::dspin_get(receive_data,DspinDhccpParam:: FROM_MC_BC))5457 if (DspinDhccpParam::dspin_get(receive_data,DspinDhccpParam::M2P_BC)) 5458 5458 { 5459 5459 r_cc_receive_fsm = CC_RECEIVE_BRDCAST_HEADER; 5460 5460 } 5461 5461 // test for a CLACK 5462 else if ((receive_type == DspinDhccpParam::TYPE_CL EANUP_ACK_DATA) or5463 (receive_type == DspinDhccpParam::TYPE_CL EANUP_ACK_INST))5462 else if ((receive_type == DspinDhccpParam::TYPE_CLACK_DATA) or 5463 (receive_type == DspinDhccpParam::TYPE_CLACK_INST)) 5464 5464 { 5465 5465 r_cc_receive_fsm = CC_RECEIVE_CLACK; … … 5492 5492 r_cc_receive_dcache_req = true; 5493 5493 r_cc_receive_dcache_set = DspinDhccpParam::dspin_get(receive_data, 5494 DspinDhccpParam::CL EANUP_ACK_SET) &5494 DspinDhccpParam::CLACK_SET) & 5495 5495 ((1ULL<<(uint32_log2(m_dcache_sets)))-1); 5496 5496 r_cc_receive_dcache_way = DspinDhccpParam::dspin_get(receive_data, 5497 DspinDhccpParam::CL EANUP_ACK_WAY) &5497 DspinDhccpParam::CLACK_WAY) & 5498 5498 ((1ULL<<(uint32_log2(m_dcache_ways)))-1); 5499 5499 r_cc_receive_dcache_type = CC_TYPE_CLACK; … … 5509 5509 r_cc_receive_icache_req = true; 5510 5510 r_cc_receive_icache_set = DspinDhccpParam::dspin_get(receive_data, 5511 DspinDhccpParam::CL EANUP_ACK_SET) &5511 DspinDhccpParam::CLACK_SET) & 5512 5512 ((1ULL<<(uint32_log2(m_icache_sets)))-1); 5513 5513 r_cc_receive_icache_way = DspinDhccpParam::dspin_get(receive_data, 5514 DspinDhccpParam::CL EANUP_ACK_WAY) &5514 DspinDhccpParam::CLACK_WAY) & 5515 5515 ((1ULL<<(uint32_log2(m_icache_ways)))-1); 5516 5516 r_cc_receive_icache_type = CC_TYPE_CLACK; … … 5906 5906 // DspinDhccpParam::dspin_set(dspin_send_data, 5907 5907 // 0, 5908 // DspinDhccpParam:: FROM_L1_EOP);5908 // DspinDhccpParam::P2M_EOP); 5909 5909 DspinDhccpParam::dspin_set(dspin_send_data, 5910 5910 m_cc_global_id, … … 5912 5912 DspinDhccpParam::dspin_set(dspin_send_data, 5913 5913 0, 5914 DspinDhccpParam:: FROM_L1_BC);5914 DspinDhccpParam::P2M_BC); 5915 5915 5916 5916 if(r_cc_send_last_client.read() == 0) // dcache active request … … 5934 5934 DspinDhccpParam::dspin_set(dspin_send_data, 5935 5935 DspinDhccpParam::TYPE_CLEANUP_DATA, 5936 DspinDhccpParam:: FROM_L1_TYPE);5936 DspinDhccpParam::P2M_TYPE); 5937 5937 } 5938 5938 else // icache active request … … 5956 5956 DspinDhccpParam::dspin_set(dspin_send_data, 5957 5957 DspinDhccpParam::TYPE_CLEANUP_INST, 5958 DspinDhccpParam:: FROM_L1_TYPE);5958 DspinDhccpParam::P2M_TYPE); 5959 5959 } 5960 5960 // send flit … … 5970 5970 // DspinDhccpParam::dspin_set(dspin_send_data, 5971 5971 // 1, 5972 // DspinDhccpParam:: FROM_L1_EOP);5972 // DspinDhccpParam::P2M_EOP); 5973 5973 5974 5974 if(r_cc_send_last_client.read() == 0) // dcache active request … … 5996 5996 // DspinDhccpParam::dspin_set(dspin_send_data, 5997 5997 // 1, 5998 // DspinDhccpParam:: FROM_L1_EOP);5998 // DspinDhccpParam::P2M_EOP); 5999 5999 DspinDhccpParam::dspin_set(dspin_send_data, 6000 6000 0, 6001 DspinDhccpParam:: FROM_L1_BC);6001 DspinDhccpParam::P2M_BC); 6002 6002 DspinDhccpParam::dspin_set(dspin_send_data, 6003 6003 DspinDhccpParam::TYPE_MULTI_ACK, 6004 DspinDhccpParam:: FROM_L1_TYPE);6004 DspinDhccpParam::P2M_TYPE); 6005 6005 6006 6006 if(r_cc_send_last_client.read() == 0) // dcache active request
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