Changeset 458 for branches/RWT
- Timestamp:
- Jul 19, 2013, 2:21:49 PM (11 years ago)
- Location:
- branches/RWT/modules
- Files:
-
- 3 edited
Legend:
- Unmodified
- Added
- Removed
-
branches/RWT/modules/vci_cc_vcache_wrapper/caba/source/include/vci_cc_vcache_wrapper.h
r456 r458 549 549 GenericFifo<uint32_t> r_vci_rsp_fifo_dcache; // response FIFO to DCACHE FSM 550 550 551 GenericFifo<uint32_t> r_cc_send_data_fifo;552 553 551 //RWT 554 552 GenericFifo<bool> r_vci_rsp_fifo_rpktid; 553 554 555 GenericFifo<uint32_t> r_cc_send_data_fifo; 556 555 557 556 558 /////////////////////////////////// -
branches/RWT/modules/vci_cc_vcache_wrapper/caba/source/src/vci_cc_vcache_wrapper.cpp
r456 r458 1117 1117 else 1118 1118 { 1119 r_icache_vci_paddr = ( paddr_t)r_mmu_word_hi.read() << 32 |1119 r_icache_vci_paddr = (uint64_t)r_mmu_word_hi.read() << 32 | 1120 1120 (paddr_t)r_mmu_word_lo.read(); 1121 1121 } … … 2247 2247 // we take into account the paddr extension 2248 2248 if (vci_param::N > 32) 2249 paddr = paddr | (( paddr_t)(r_dcache_paddr_ext.read()) << 32);2249 paddr = paddr | ((uint64_t)(r_dcache_paddr_ext.read()) << 32); 2250 2250 } 2251 2251 } // end physical address computation … … 2565 2565 else 2566 2566 { 2567 r_dcache_save_paddr = ( paddr_t)r_mmu_word_hi.read() << 32 |2567 r_dcache_save_paddr = ((uint64_t)r_mmu_word_hi.read()) << 32 | 2568 2568 (paddr_t)r_mmu_word_lo.read(); 2569 2569 } … … 3325 3325 } 3326 3326 3327 uint32_t pte_flags ;3328 uint32_t pte_ppn ;3329 size_t way ;3330 size_t set ;3331 size_t word ;3332 int cache_state ;3327 uint32_t pte_flags = 0; 3328 uint32_t pte_ppn = 0; 3329 size_t way = 0; 3330 size_t set = 0; 3331 size_t word = 0; 3332 int cache_state = 0; 3333 3333 3334 3334 r_dcache.read( r_dcache_tlb_paddr.read(), … … 3860 3860 r_dcache_xtn_flush_data_cpt = 0; 3861 3861 r_dcache_cc_cleanup_updt_data = true; 3862 for ( int w = 0; w< m_dcache_words; w++)3862 for (size_t w = 0; w < m_dcache_words; w++) 3863 3863 { 3864 3864 m_cpt_cleanup_data_dirty_word += r_dcache_dirty_word[(m_dcache_sets*way+set)*m_dcache_words + w]; … … 4100 4100 { 4101 4101 r_dcache_cc_cleanup_updt_data = true; 4102 for ( int w = 0; w< m_dcache_words; w++)4102 for (size_t w = 0; w< m_dcache_words; w++) 4103 4103 { 4104 4104 m_cpt_cleanup_data_dirty_word += r_dcache_dirty_word[(m_dcache_sets*way+set)*m_dcache_words + w]; … … 4274 4274 { 4275 4275 r_dcache_cc_cleanup_updt_data = true; 4276 for ( int w = 0; w< m_dcache_words; w++)4276 for (size_t w = 0; w< m_dcache_words; w++) 4277 4277 { 4278 4278 m_cpt_cleanup_data_dirty_word += r_dcache_dirty_word[(m_dcache_sets*way+set)*m_dcache_words + w]; … … 4606 4606 CACHE_SLOT_STATE_VALID_NCC ); 4607 4607 r_dcache_content_state[way*m_dcache_sets+set] = LINE_CACHE_DATA_NOT_DIRTY; 4608 for ( int word =0; word < m_dcache_words ; word++)4608 for (size_t word = 0; word < m_dcache_words ; word++) 4609 4609 { 4610 4610 r_dcache_dirty_word[(way*m_dcache_sets +set)*m_dcache_words+word] = 0; … … 5197 5197 { 5198 5198 r_dcache_cc_cleanup_updt_data = true; 5199 for ( int w = 0; w< m_dcache_words; w++)5199 for (size_t w = 0; w < m_dcache_words; w++) 5200 5200 { 5201 5201 m_cpt_cleanup_data_dirty_word += r_dcache_dirty_word[(m_dcache_sets*way+set)*m_dcache_words + w]; -
branches/RWT/modules/vci_mem_cache/caba/source/src/vci_mem_cache.cpp
r457 r458 353 353 : soclib::caba::BaseModule(name), 354 354 355 m_monitor_ok(false), 355 356 p_clk( "p_clk" ), 356 357 p_resetn( "p_resetn" ), … … 360 361 p_dspin_out( "p_dspin_out" ), 361 362 362 m_monitor_ok(false),363 363 m_seglist( mtp.getSegmentList(tgtid_d) ), 364 364 m_nseg( 0 ), … … 1326 1326 error = 0; 1327 1327 r_config_address = (r_config_address.read() & 0x00000000FFFFFFFFLL) | 1328 (( addr_t)p_vci_tgt.wdata.read())<<32;1328 ((uint64_t)p_vci_tgt.wdata.read())<<32; 1329 1329 } 1330 1330 else if ( (p_vci_tgt.cmd.read() == vci_param_int::CMD_WRITE) // set buf_lines
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