Changeset 505
- Timestamp:
- Sep 1, 2013, 7:49:00 PM (11 years ago)
- Location:
- trunk/modules/vci_mem_cache/caba/source
- Files:
-
- 2 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/modules/vci_mem_cache/caba/source/include/vci_mem_cache.h
r504 r505 716 716 // Buffer between WRITE fsm and IXR_CMD fsm 717 717 sc_signal<bool> r_write_to_ixr_cmd_req; // valid request 718 sc_signal<bool> r_write_to_ixr_cmd_put; // request type (GET/PUT)719 718 sc_signal<size_t> r_write_to_ixr_cmd_index; // TRT index 720 719 … … 820 819 // Buffer between CAS fsm and IXR_CMD fsm 821 820 sc_signal<bool> r_cas_to_ixr_cmd_req; // valid request 822 sc_signal<bool> r_cas_to_ixr_cmd_put; // request type (GET/PUT)823 821 sc_signal<size_t> r_cas_to_ixr_cmd_index; // TRT index 824 822 -
trunk/modules/vci_mem_cache/caba/source/src/vci_mem_cache.cpp
r504 r505 3310 3310 { 3311 3311 r_write_to_ixr_cmd_req = true; 3312 r_write_to_ixr_cmd_put = false;3313 3312 r_write_to_ixr_cmd_index = r_write_trt_index.read(); 3314 3313 r_write_fsm = WRITE_RSP; … … 3511 3510 { 3512 3511 r_write_to_ixr_cmd_req = true; 3513 r_write_to_ixr_cmd_put = true;3514 3512 r_write_to_ixr_cmd_index = r_write_trt_index.read(); 3515 3513 r_write_fsm = WRITE_IDLE; … … 3612 3610 r_ixr_cmd_word = 0; 3613 3611 r_ixr_cmd_fsm = IXR_CMD_READ_SEND; 3614 for( size_t i=0 ; i<m_words ; i++ ) r_ixr_cmd_wdata[i] = entry.wdata[i];3615 3612 3616 3613 #if DEBUG_MEMC_IXR_CMD … … 3634 3631 r_ixr_cmd_word = 0; 3635 3632 r_ixr_cmd_fsm = IXR_CMD_WRITE_SEND; 3636 for( size_t i=0 ; i<m_words ; i++ ) r_ixr_cmd_wdata[i] = entry.wdata[i]; 3633 3634 // Read data from TRT if PUT transaction 3635 if (not entry.xram_read) 3636 { 3637 for( size_t i=0 ; i<m_words ; i++ ) r_ixr_cmd_wdata[i] = entry.wdata[i]; 3638 } 3637 3639 3638 3640 #if DEBUG_MEMC_IXR_CMD … … 3656 3658 r_ixr_cmd_word = 0; 3657 3659 r_ixr_cmd_fsm = IXR_CMD_CAS_SEND; 3658 for( size_t i=0 ; i<m_words ; i++ ) r_ixr_cmd_wdata[i] = entry.wdata[i]; 3660 3661 // Read data from TRT if PUT transaction 3662 if (not entry.xram_read) 3663 { 3664 for( size_t i=0 ; i<m_words ; i++ ) r_ixr_cmd_wdata[i] = entry.wdata[i]; 3665 } 3659 3666 3660 3667 #if DEBUG_MEMC_IXR_CMD … … 3733 3740 if (p_vci_ixr.cmdack) 3734 3741 { 3735 if ( r_write_to_ixr_cmd_put.read()) // PUT3742 if (not r_ixr_cmd_get.read()) // PUT 3736 3743 { 3737 3744 if (r_ixr_cmd_word.read() == (m_words - 2)) … … 3770 3777 if (p_vci_ixr.cmdack) 3771 3778 { 3772 if ( r_cas_to_ixr_cmd_put.read()) // PUT3779 if (not r_ixr_cmd_get.read()) // PUT 3773 3780 { 3774 3781 if (r_ixr_cmd_word.read() == (m_words - 2)) … … 5665 5672 { 5666 5673 r_cas_to_ixr_cmd_req = true; 5667 r_cas_to_ixr_cmd_put = true;5668 5674 r_cas_to_ixr_cmd_index = r_cas_trt_index.read(); 5669 5675 r_cas_fsm = CAS_IDLE; … … 5802 5808 { 5803 5809 r_cas_to_ixr_cmd_req = true; 5804 r_cas_to_ixr_cmd_put = false;5805 5810 r_cas_to_ixr_cmd_index = r_cas_trt_index.read(); 5806 5811 r_cas_fsm = CAS_WAIT;
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