Changeset 521 for trunk/modules/vci_cc_vcache_wrapper/caba/source/src

Timestamp:

Sep 9, 2013, 11:18:05 AM (11 years ago)

Author:

cfuguet

Message:

Bugfix in vci_cc_vcache_wrapper:

• The DCACHE FSM must be interruptible by clack and CC request in the XTN_SWITCH state. This is to avoid a deadlock situation between the DCACHE and the ICACHE.

This bug was found in simulation with the next situation:

DCACHE_FSM -> XTN_SWITH state
DCACHE_FSM -> Wait r_dcache_xtn_req to be reset

ICACHE_FSM -> MISS_DIR_UPDT state
ICACHE_FSM -> Wait r_icache_miss_clack to be reset

The ICACHE_FSM only treats the xtn requests in the IDLE state.

The clack to the ICACHE is blocked on the DSPIN port by another
clack to the DCACHE but the DCACHE cannnot treat it as it is
blocked in the XTN_SWITCH state.

File:

• trunk/modules/vci_cc_vcache_wrapper/caba/source/src/vci_cc_vcache_wrapper.cpp (modified) (1 diff)

trunk/modules/vci_cc_vcache_wrapper/caba/source/src/vci_cc_vcache_wrapper.cpp

@@ -3645 +3645 @@
                                 // Caution : the itlb miss requests must be taken
                                 // to avoid dead-lock in case of simultaneous ITLB miss
-    {
+                                // Caution : the clack and cc requests must be taken
+                                // to avoid dead-lock
+    {
+        // coherence clack request (from DSPIN CLACK)
+        if ( r_dcache_clack_req.read() )
+        {
+            r_dcache_fsm = DCACHE_CC_CHECK;
+            r_dcache_fsm_cc_save = r_dcache_fsm.read();
+            break;
+        }
+
+        // coherence request (from CC_RECEIVE FSM)
+        if ( r_cc_receive_dcache_req.read() and not r_dcache_cc_send_req.read())
+        {
+            r_dcache_fsm = DCACHE_CC_CHECK;
+            r_dcache_fsm_cc_save = r_dcache_fsm.read();
+            break;
+        }
+
         // itlb miss request
         if ( r_icache_tlb_miss_req.read() )