Changeset 530 for trunk/modules/vci_mem_cache/caba/source/src

Timestamp:

Sep 19, 2013, 4:01:04 PM (11 years ago)

Author:

cfuguet

Message:

Modification in vci_mem_cache:

• Aligning the FSM states values with the values of the RTL model to allow the cosimulation of this model.

• Introducing one output port per FSM which are used when cosimulating this model. These ports are compiled only when the MONITOR_MEMCACHE_FSM preprocessor variable is equal to 1.

File:

• trunk/modules/vci_mem_cache/caba/source/src/vci_mem_cache.cpp (modified) (11 diffs)

trunk/modules/vci_mem_cache/caba/source/src/vci_mem_cache.cpp

@@ -61 +61 @@
     {
         "TGT_CMD_IDLE",
-        "TGT_CMD_ERROR",
         "TGT_CMD_READ",
         "TGT_CMD_WRITE",
         "TGT_CMD_CAS",
+        "TGT_CMD_ERROR",
         "TGT_CMD_CONFIG"
     };
     const char *tgt_rsp_fsm_str[] =
     {
-        "TGT_RSP_CONFIG_IDLE",
-        "TGT_RSP_TGT_CMD_IDLE",
         "TGT_RSP_READ_IDLE",
         "TGT_RSP_WRITE_IDLE",
@@ -77 +75 @@
         "TGT_RSP_MULTI_ACK_IDLE",
         "TGT_RSP_CLEANUP_IDLE",
-        "TGT_RSP_CONFIG",
-        "TGT_RSP_TGT_CMD",
+        "TGT_RSP_CONFIG_IDLE",
+        "TGT_RSP_TGT_CMD_IDLE",
         "TGT_RSP_READ",
         "TGT_RSP_WRITE",
@@ -84 +82 @@
         "TGT_RSP_XRAM",
         "TGT_RSP_MULTI_ACK",
-        "TGT_RSP_CLEANUP"
+        "TGT_RSP_CLEANUP",
+        "TGT_RSP_CONFIG",
+        "TGT_RSP_TGT_CMD"
     };
     const char *cc_receive_fsm_str[] =
@@ -95 +95 @@
     const char *cc_send_fsm_str[] =
     {
-        "CC_SEND_CONFIG_IDLE",
         "CC_SEND_XRAM_RSP_IDLE",
         "CC_SEND_WRITE_IDLE",
         "CC_SEND_CAS_IDLE",
-        "CC_SEND_CONFIG_INVAL_HEADER",
-        "CC_SEND_CONFIG_INVAL_NLINE",
-        "CC_SEND_CONFIG_BRDCAST_HEADER",
-        "CC_SEND_CONFIG_BRDCAST_NLINE",
+        "CC_SEND_CONFIG_IDLE",
         "CC_SEND_XRAM_RSP_BRDCAST_HEADER",
         "CC_SEND_XRAM_RSP_BRDCAST_NLINE",
@@ -117 +113 @@
         "CC_SEND_CAS_UPDT_NLINE",
         "CC_SEND_CAS_UPDT_DATA",
-        "CC_SEND_CAS_UPDT_DATA_HIGH"
+        "CC_SEND_CAS_UPDT_DATA_HIGH",
+        "CC_SEND_CONFIG_INVAL_HEADER",
+        "CC_SEND_CONFIG_INVAL_NLINE",
+        "CC_SEND_CONFIG_BRDCAST_HEADER",
+        "CC_SEND_CONFIG_BRDCAST_NLINE"
     };
     const char *multi_ack_fsm_str[] =
@@ -272 +272 @@
     {
         "ALLOC_DIR_RESET",
-        "ALLOC_DIR_CONFIG",
         "ALLOC_DIR_READ",
         "ALLOC_DIR_WRITE",
         "ALLOC_DIR_CAS",
         "ALLOC_DIR_CLEANUP",
-        "ALLOC_DIR_XRAM_RSP"
+        "ALLOC_DIR_XRAM_RSP",
+        "ALLOC_DIR_CONFIG"
     };
     const char *alloc_trt_fsm_str[] =
@@ -286 +286 @@
         "ALLOC_TRT_XRAM_RSP",
         "ALLOC_TRT_IXR_RSP",
-        "ALLOC_TRT_CONFIG",
-        "ALLOC_TRT_IXR_CMD"
+        "ALLOC_TRT_IXR_CMD",
+        "ALLOC_TRT_CONFIG"
     };
     const char *alloc_upt_fsm_str[] =
@@ -461 +461 @@
         r_alloc_heap_fsm("r_alloc_heap_fsm"),
         r_alloc_heap_reset_cpt("r_alloc_heap_reset_cpt")
+#if MONITOR_MEMCACHE_FSM == 1
+        ,
+        p_read_fsm("p_read_fsm"), 
+        p_write_fsm("p_write_fsm"), 
+        p_xram_rsp_fsm("p_xram_rsp_fsm"), 
+        p_cas_fsm("p_cas_fsm"), 
+        p_cleanup_fsm("p_cleanup_fsm"), 
+        p_config_fsm("p_config_fsm"), 
+        p_alloc_heap_fsm("p_alloc_heap_fsm"), 
+        p_alloc_dir_fsm("p_alloc_dir_fsm"), 
+        p_alloc_trt_fsm("p_alloc_trt_fsm"), 
+        p_alloc_upt_fsm("p_alloc_upt_fsm"), 
+        p_alloc_ivt_fsm("p_alloc_ivt_fsm"), 
+        p_tgt_cmd_fsm("p_tgt_cmd_fsm"), 
+        p_tgt_rsp_fsm("p_tgt_rsp_fsm"), 
+        p_ixr_cmd_fsm("p_ixr_cmd_fsm"), 
+        p_ixr_rsp_fsm("p_ixr_rsp_fsm"), 
+        p_cc_send_fsm("p_cc_send_fsm"), 
+        p_cc_receive_fsm("p_cc_receive_fsm"),
+        p_multi_ack_fsm("p_multi_ack_fsm")
+#endif
         {
             std::cout << "  - Building VciMemCache : " << name << std::endl;
@@ -814 +835 @@
             r_tgt_cmd_fsm    = TGT_CMD_IDLE;
             r_config_fsm     = CONFIG_IDLE;
-            r_tgt_rsp_fsm    = TGT_RSP_TGT_CMD_IDLE;
+            r_tgt_rsp_fsm    = TGT_RSP_READ_IDLE;
             r_cc_send_fsm    = CC_SEND_XRAM_RSP_IDLE;
             r_cc_receive_fsm = CC_RECEIVE_IDLE;
@@ -826 +847 @@
             r_alloc_trt_fsm  = ALLOC_TRT_READ;
             r_alloc_upt_fsm  = ALLOC_UPT_WRITE;
-            r_alloc_ivt_fsm  = ALLOC_IVT_XRAM_RSP;
+            r_alloc_ivt_fsm  = ALLOC_IVT_WRITE;
             r_ixr_rsp_fsm    = IXR_RSP_IDLE;
             r_xram_rsp_fsm   = XRAM_RSP_IDLE;
@@ -7847 +7868 @@
         /////////////////////////////
     {
+#if MONITOR_MEMCACHE_FSM == 1
+        p_read_fsm.write        (r_read_fsm.read()       );
+        p_write_fsm.write       (r_write_fsm.read()      );
+        p_xram_rsp_fsm.write    (r_xram_rsp_fsm.read()   );
+        p_cas_fsm.write         (r_cas_fsm.read()        );
+        p_cleanup_fsm.write     (r_cleanup_fsm.read()    );
+        p_config_fsm.write      (r_config_fsm.read()     );
+        p_alloc_heap_fsm.write  (r_alloc_heap_fsm.read() );
+        p_alloc_dir_fsm.write   (r_alloc_dir_fsm.read()  );
+        p_alloc_trt_fsm.write   (r_alloc_trt_fsm.read()  );
+        p_alloc_upt_fsm.write   (r_alloc_upt_fsm.read()  );
+        p_alloc_ivt_fsm.write   (r_alloc_ivt_fsm.read()  );
+        p_tgt_cmd_fsm.write     (r_tgt_cmd_fsm.read()    );
+        p_tgt_rsp_fsm.write     (r_tgt_rsp_fsm.read()    );
+        p_ixr_cmd_fsm.write     (r_ixr_cmd_fsm.read()    );
+        p_ixr_rsp_fsm.write     (r_ixr_rsp_fsm.read()    );
+        p_cc_send_fsm.write     (r_cc_send_fsm.read()    );
+        p_cc_receive_fsm.write  (r_cc_receive_fsm.read() );
+        p_multi_ack_fsm.write   (r_multi_ack_fsm.read()  );
+#endif
+
         ////////////////////////////////////////////////////////////
         // Command signals on the p_vci_ixr port