Ignore:
Timestamp:
Oct 17, 2013, 8:50:46 PM (11 years ago)
Author:
alain
Message:

Compliance with mapping_table defined in release 2462
Introducing the dspin_router_tsar component used in tsar_generic_iob
platform to implement the RAM networt (between L2 & L3).

File:
1 edited

Legend:

Unmodified
Added
Removed
  • trunk/modules/vci_iox_network/caba/source/src/vci_iox_network.cpp

    r471 r549  
    2626 */
    2727
     28////////////////////////////////////////////////////////////////////////////////
     29// This component emulates an external IO bus such as PCIe or Hypertransport,
     30// but respect the VCI protocol. It can be attached to one OR SEVERAL clusters,
     31// using a vci_io_bridge component.
     32// It is considered as a local interconnect, for the ADDRESS or SRCID
     33// decoding tables:
     34// - the CMD routing_table decodes the local field of the VCI ADDRESS
     35//   to return the local target port
     36// - The RSP routing_table decodes the local field of the VCI SRCID
     37//   to return the initator port
     38// It is implemented as two independant crossbars, for VCI commands and
     39// VCI responses respectively.
     40// - The CMD crossbar has nb_ini input ports, and nb_tgt output ports,
     41//   including the ports to the vci_io_bridge component(s).
     42// - The RSP crossbar has nb_tgt input ports, and nb_ini output ports.
     43//   including the ports to the vci_io_bridge component(s).
     44// For both crossbars, output ports allocation policy is round robin.
     45////////////////////////////////////////////////////////////////////////////////
     46
    2847#include <systemc>
    2948#include <cassert>
     
    5069    typedef typename pkt_t::output_port_t   output_port_t;
    5170
    52     const bool                              m_is_cmd;         // CMD XBAR if true
    53     const size_t                                    m_inputs;         // number of inputs
    54     const size_t                                    m_outputs;        // number of outputs
    55     AddressDecodingTable<uint64_t,size_t>*  m_rt;             // pointer on routing table (CMD or RSP)
    56 
    57     sc_signal<bool>*                            r_out_allocated;  // for each output: allocation state
    58     sc_signal<size_t>*                          r_out_origin;     // for each output: input port index
    59     sc_signal<bool>*                            r_in_allocated;   // for each input: allocation state
    60     sc_signal<size_t>*                          r_in_dest;        // for each input: output port index
     71    const bool            m_is_cmd;         // CMD XBAR if true
     72    const size_t                  m_inputs;         // number of inputs
     73    const size_t                  m_outputs;        // number of outputs
     74    void*                 m_rt;             // pointer on routing table (CMD or RSP)
     75
     76    sc_signal<bool>*      r_out_allocated;  // for each output: allocation state
     77    sc_signal<size_t>*    r_out_origin;     // for each output: input port index
     78    sc_signal<bool>*      r_in_allocated;   // for each input: allocation state
     79    sc_signal<size_t>*    r_in_dest;        // for each input: output port index
    6180
    6281public:
    6382    ///////////////////////
    64     IoXbar( bool                                    is_cmd,
    65             size_t                                  nb_inputs,
    66             size_t                                  nb_outputs,
    67                 AddressDecodingTable<uint64_t,size_t>*  rt )
     83    IoXbar( bool   is_cmd,
     84            size_t nb_inputs,
     85            size_t nb_outputs,
     86                void*  rt )
    6887        : m_is_cmd( is_cmd ),
    6988      m_inputs( nb_inputs ),
     
    150169                        if ( m_is_cmd )
    151170                        {
    152                             req = ((AddressDecodingTable<uint64_t,size_t>*)m_rt)->get_value(
    153                                    (uint64_t)(input_port[in]->address.read()) );
     171                            AddressDecodingTable<uint64_t, size_t>* rt =
     172                               (AddressDecodingTable<uint64_t, size_t>*)m_rt;
     173                            req = rt->get_value((uint64_t)(input_port[in]->address.read()));
    154174                        }
    155175                        else           
    156176                        {
    157                             req = ((AddressDecodingTable<uint64_t,size_t>*)m_rt)->get_value(
    158                                    (uint64_t)(input_port[in]->rsrcid.read()) );
     177                            AddressDecodingTable<uint32_t, size_t>* rt =
     178                               (AddressDecodingTable<uint32_t, size_t>*)m_rt;
     179                            req = rt->get_value((uint32_t)(input_port[in]->rsrcid.read()));
    159180                        }
    160181                        // allocate the output port if requested
     
    260281tmpl(/**/)::VciIoxNetwork( sc_core::sc_module_name             name,
    261282                               const soclib::common::MappingTable  &mt,
    262                            size_t                              cluster_id,
    263283                                           size_t                              nb_tgt,
    264284                                           size_t                              nb_ini )
     
    274294           m_nb_ini( nb_ini ),
    275295
    276            m_cmd_rt( mt.getPortidFromAddress(cluster_id) ),
    277            m_rsp_rt( mt.getPortidFromSrcid(cluster_id) )
     296           m_cmd_rt( mt.getLocalIndexFromAddress(0) ),
     297           m_rsp_rt( mt.getLocalIndexFromSrcid(0) )
    278298{
    279299    std::cout << "    Building VciIoxNetwork : " << name << std::endl;
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