Index: unk/platforms/tsar_generic_iob/soclib.conf =================================================================== --- /trunk/platforms/tsar_generic_iob/soclib.conf (revision 549) +++ (revision ) @@ -1,2 +1,0 @@ - -config.addDescPath("/Users/alain/soc/tsar-trunk-svn-2013/") Index: /trunk/platforms/tsar_generic_iob/top.cpp =================================================================== --- /trunk/platforms/tsar_generic_iob/top.cpp (revision 549) +++ /trunk/platforms/tsar_generic_iob/top.cpp (revision 550) @@ -240,5 +240,5 @@ #define BDEV_BASE 0x00B3000000 -#define BDEV_SIZE 0x0000001000 // 4 Kbytes +#define BDEV_SIZE 0x0000008000 // 4 Kbytes #define MTTY_BASE 0x00B4000000 @@ -291,14 +291,14 @@ //////////////////////////////////////////////////////////////////////// -#define PROC_LOCAL_SRCID 0 // from 0 to 7 -#define MDMA_LOCAL_SRCID 8 -#define IOBX_LOCAL_SRCID 9 -#define BDEV_LOCAL_SRCID 10 -#define CDMA_LOCAL_SRCID 11 -#define MEMC_LOCAL_SRCID 12 - -//////////////////////////////////////////////////////////////////// +#define PROC_LOCAL_SRCID 0x0 // from 0 to 7 +#define MDMA_LOCAL_SRCID 0x8 +#define IOBX_LOCAL_SRCID 0x9 +#define MEMC_LOCAL_SRCID 0xA +#define CDMA_LOCAL_SRCID 0xE // hard-coded in dspin_tsar +#define BDEV_LOCAL_SRCID 0xF // hard-coded in dspin_tsar + +/////////////////////////////////////////////////////////////////////// // TGT_ID and INI_ID port indexing for INT local interconnect -//////////////////////////////////////////////////////////////////// +/////////////////////////////////////////////////////////////////////// #define INT_MEMC_TGT_ID 0 @@ -311,7 +311,7 @@ #define INT_IOBX_INI_ID (NB_PROCS_MAX+1) -//////////////////////////////////////////////////////////////////// +/////////////////////////////////////////////////////////////////////// // TGT_ID and INI_ID port indexing for RAM local interconnect -//////////////////////////////////////////////////////////////////// +/////////////////////////////////////////////////////////////////////// #define RAM_XRAM_TGT_ID 0 @@ -320,7 +320,7 @@ #define RAM_IOBX_INI_ID 1 -//////////////////////////////////////////////////////////////////// +/////////////////////////////////////////////////////////////////////// // TGT_ID and INI_ID port indexing for I0X local interconnect -//////////////////////////////////////////////////////////////////// +/////////////////////////////////////////////////////////////////////// #define IOX_IOB0_TGT_ID 0 // don't change this value @@ -338,7 +338,7 @@ #define IOX_CDMA_INI_ID 3 -///////////////////////////////////////////////////////////////////// +//////////////////////////////////////////////////////////////////////// int _main(int argc, char *argv[]) -///////////////////////////////////////////////////////////////////// +//////////////////////////////////////////////////////////////////////// { using namespace sc_core; @@ -533,5 +533,6 @@ uint64_t offset = ((uint64_t)cluster(x,y)) << (vci_address_width-x_width-y_width); - bool config = true; + bool config = true; + bool cacheable = true; // the four following segments are defined in all clusters @@ -540,20 +541,20 @@ smemc_conf << "int_seg_memc_conf_" << x << "_" << y; maptab_int.add(Segment(smemc_conf.str(), MEMC_BASE+offset, MEMC_SIZE, - IntTab(cluster(x,y),INT_MEMC_TGT_ID), true, config )); + IntTab(cluster(x,y),INT_MEMC_TGT_ID), cacheable, config )); std::ostringstream smemc_xram; smemc_xram << "int_seg_memc_xram_" << x << "_" << y; maptab_int.add(Segment(smemc_xram.str(), XRAM_BASE+offset, XRAM_SIZE, - IntTab(cluster(x,y),INT_MEMC_TGT_ID), true)); + IntTab(cluster(x,y),INT_MEMC_TGT_ID), cacheable)); std::ostringstream sxicu; sxicu << "int_seg_xicu_" << x << "_" << y; maptab_int.add(Segment(sxicu.str(), XICU_BASE+offset, XICU_SIZE, - IntTab(cluster(x,y),INT_XICU_TGT_ID), false)); + IntTab(cluster(x,y),INT_XICU_TGT_ID), not cacheable)); std::ostringstream smdma; smdma << "int_seg_mdma_" << x << "_" << y; maptab_int.add(Segment(smdma.str(), MDMA_BASE+offset, MDMA_SIZE, - IntTab(cluster(x,y),INT_MDMA_TGT_ID), false)); + IntTab(cluster(x,y),INT_MDMA_TGT_ID), not cacheable)); // the following segments are only defined in cluster_iob0 or in cluster_iob1 @@ -564,35 +565,35 @@ siobx << "int_seg_iobx_" << x << "_" << y; maptab_int.add(Segment(siobx.str(), IOBX_BASE+offset, IOBX_SIZE, - IntTab(cluster(x,y), INT_IOBX_TGT_ID), false, config )); + IntTab(cluster(x,y), INT_IOBX_TGT_ID), not cacheable, config )); std::ostringstream stty; stty << "int_seg_mtty_" << x << "_" << y; maptab_int.add(Segment(stty.str(), MTTY_BASE+offset, MTTY_SIZE, - IntTab(cluster(x,y), INT_IOBX_TGT_ID), false)); + IntTab(cluster(x,y), INT_IOBX_TGT_ID), not cacheable)); std::ostringstream sfbf; sfbf << "int_seg_fbuf_" << x << "_" << y; maptab_int.add(Segment(sfbf.str(), FBUF_BASE+offset, FBUF_SIZE, - IntTab(cluster(x,y), INT_IOBX_TGT_ID), false)); + IntTab(cluster(x,y), INT_IOBX_TGT_ID), not cacheable)); std::ostringstream sbdv; sbdv << "int_seg_bdev_" << x << "_" << y; maptab_int.add(Segment(sbdv.str(), BDEV_BASE+offset, BDEV_SIZE, - IntTab(cluster(x,y), INT_IOBX_TGT_ID), false)); + IntTab(cluster(x,y), INT_IOBX_TGT_ID), not cacheable)); std::ostringstream snic; snic << "int_seg_mnic_" << x << "_" << y; maptab_int.add(Segment(snic.str(), MNIC_BASE+offset, MNIC_SIZE, - IntTab(cluster(x,y), INT_IOBX_TGT_ID), false)); + IntTab(cluster(x,y), INT_IOBX_TGT_ID), not cacheable)); std::ostringstream srom; srom << "int_seg_brom_" << x << "_" << y; maptab_int.add(Segment(srom.str(), BROM_BASE+offset, BROM_SIZE, - IntTab(cluster(x,y), INT_IOBX_TGT_ID), true)); + IntTab(cluster(x,y), INT_IOBX_TGT_ID), cacheable )); std::ostringstream sdma; sdma << "int_seg_cdma_" << x << "_" << y; maptab_int.add(Segment(sdma.str(), CDMA_BASE+offset, CDMA_SIZE, - IntTab(cluster(x,y), INT_IOBX_TGT_ID), false)); + IntTab(cluster(x,y), INT_IOBX_TGT_ID), not cacheable)); } @@ -600,10 +601,13 @@ // and the port index on the local interconnect. - maptab_int.srcid_map( IntTab( cluster(x,y), MDMA_LOCAL_SRCID ), INT_MDMA_INI_ID ); - - maptab_int.srcid_map( IntTab( cluster(x,y), IOBX_LOCAL_SRCID ), INT_IOBX_INI_ID ); + maptab_int.srcid_map( IntTab( cluster(x,y), MDMA_LOCAL_SRCID ), + IntTab( cluster(x,y), INT_MDMA_INI_ID ) ); + + maptab_int.srcid_map( IntTab( cluster(x,y), IOBX_LOCAL_SRCID ), + IntTab( cluster(x,y), INT_IOBX_INI_ID ) ); for ( size_t p = 0 ; p < NB_PROCS_MAX ; p++ ) - maptab_int.srcid_map( IntTab( cluster(x,y), PROC_LOCAL_SRCID+p ), INT_PROC_INI_ID+p ); + maptab_int.srcid_map( IntTab( cluster(x,y), PROC_LOCAL_SRCID+p ), + IntTab( cluster(x,y), INT_PROC_INI_ID+p ) ); } } @@ -637,15 +641,22 @@ } - // This define the mapping between the initiators (identified by their - // global SRCID) and the port index on the RAM local interconnect. + // This define the mapping between the initiators SRCID + // and the port index on the RAM local interconnect. // External initiator have two alias SRCID (iob0 / iob1) - maptab_ram.srcid_map( IntTab( cluster_iob0, CDMA_LOCAL_SRCID ), RAM_IOBX_INI_ID ); - maptab_ram.srcid_map( IntTab( cluster_iob1, CDMA_LOCAL_SRCID ), RAM_IOBX_INI_ID ); - - maptab_ram.srcid_map( IntTab( cluster_iob0, BDEV_LOCAL_SRCID ), RAM_IOBX_INI_ID ); - maptab_ram.srcid_map( IntTab( cluster_iob1, BDEV_LOCAL_SRCID ), RAM_IOBX_INI_ID ); - - maptab_ram.srcid_map( IntTab( cluster_iob1, MEMC_LOCAL_SRCID ), RAM_MEMC_INI_ID ); + maptab_ram.srcid_map( IntTab( cluster_iob0, CDMA_LOCAL_SRCID ), + IntTab( cluster_iob0, RAM_IOBX_INI_ID ) ); + + maptab_ram.srcid_map( IntTab( cluster_iob1, CDMA_LOCAL_SRCID ), + IntTab( cluster_iob1, RAM_IOBX_INI_ID ) ); + + maptab_ram.srcid_map( IntTab( cluster_iob0, BDEV_LOCAL_SRCID ), + IntTab( cluster_iob0, RAM_IOBX_INI_ID ) ); + + maptab_ram.srcid_map( IntTab( cluster_iob1, BDEV_LOCAL_SRCID ), + IntTab( cluster_iob1, RAM_IOBX_INI_ID ) ); + + maptab_ram.srcid_map( IntTab( cluster_iob1, MEMC_LOCAL_SRCID ), + IntTab( cluster_iob1, RAM_MEMC_INI_ID ) ); std::cout << "RAM network " << maptab_ram << std::endl; @@ -735,9 +746,15 @@ // External initiator have two alias SRCID (iob0 / iob1 access) - maptab_iox.srcid_map( IntTab( cluster_iob0, CDMA_LOCAL_SRCID ), IOX_CDMA_INI_ID ); - maptab_iox.srcid_map( IntTab( cluster_iob1, CDMA_LOCAL_SRCID ), IOX_CDMA_INI_ID ); - - maptab_iox.srcid_map( IntTab( cluster_iob0, BDEV_LOCAL_SRCID ), IOX_BDEV_INI_ID ); - maptab_iox.srcid_map( IntTab( cluster_iob1, BDEV_LOCAL_SRCID ), IOX_BDEV_INI_ID ); + maptab_iox.srcid_map( IntTab( cluster_iob0, CDMA_LOCAL_SRCID ), + IntTab( cluster_iob0, IOX_CDMA_INI_ID ) ); + + maptab_iox.srcid_map( IntTab( cluster_iob1, CDMA_LOCAL_SRCID ), + IntTab( cluster_iob1, IOX_CDMA_INI_ID ) ); + + maptab_iox.srcid_map( IntTab( cluster_iob0, BDEV_LOCAL_SRCID ), + IntTab( cluster_iob0, IOX_BDEV_INI_ID ) ); + + maptab_iox.srcid_map( IntTab( cluster_iob1, BDEV_LOCAL_SRCID ), + IntTab( cluster_iob0, IOX_BDEV_INI_ID ) ); for (size_t x = 0; x < XMAX; x++) @@ -745,20 +762,12 @@ for (size_t y = 0; y < YMAX ; y++) { - if ( x < (XMAX/2) ) // send response to proc or mdma through IOB0 - { - maptab_iox.srcid_map( IntTab( cluster(x,y), PROC_LOCAL_SRCID ), IOX_IOB0_INI_ID ); - maptab_iox.srcid_map( IntTab( cluster(x,y), PROC_LOCAL_SRCID+1 ), IOX_IOB0_INI_ID ); - maptab_iox.srcid_map( IntTab( cluster(x,y), PROC_LOCAL_SRCID+2 ), IOX_IOB0_INI_ID ); - maptab_iox.srcid_map( IntTab( cluster(x,y), PROC_LOCAL_SRCID+3 ), IOX_IOB0_INI_ID ); - maptab_iox.srcid_map( IntTab( cluster(x,y), MDMA_LOCAL_SRCID ), IOX_IOB0_INI_ID ); - } - else // send response to proc or mdma through IOB1 - { - maptab_iox.srcid_map( IntTab( cluster(x,y), PROC_LOCAL_SRCID ), IOX_IOB1_INI_ID ); - maptab_iox.srcid_map( IntTab( cluster(x,y), PROC_LOCAL_SRCID+1 ), IOX_IOB1_INI_ID ); - maptab_iox.srcid_map( IntTab( cluster(x,y), PROC_LOCAL_SRCID+2 ), IOX_IOB1_INI_ID ); - maptab_iox.srcid_map( IntTab( cluster(x,y), PROC_LOCAL_SRCID+3 ), IOX_IOB1_INI_ID ); - maptab_iox.srcid_map( IntTab( cluster(x,y), MDMA_LOCAL_SRCID ), IOX_IOB1_INI_ID ); - } + size_t iob = ( x < (XMAX/2) ) ? IOX_IOB0_INI_ID : IOX_IOB1_INI_ID; + + for (size_t p = 0 ; p < NB_PROCS_MAX ; p++) + maptab_iox.srcid_map( IntTab( cluster(x,y), PROC_LOCAL_SRCID + p ), + IntTab( cluster(x,y), iob ) ); + + maptab_iox.srcid_map( IntTab( cluster(x,y), MDMA_LOCAL_SRCID ), + IntTab( cluster(x,y), IOX_IOB0_INI_ID ) ); } } @@ -770,28 +779,34 @@ /////////////////// - sc_clock signal_clk("clk"); - sc_signal signal_resetn("resetn"); - - sc_signal signal_unused_irq[32]; - sc_signal signal_irq_bdev; - sc_signal signal_irq_mnic_rx[NB_NIC_CHANNELS]; - sc_signal signal_irq_mnic_tx[NB_NIC_CHANNELS]; - sc_signal signal_irq_mtty[NB_TTY_CHANNELS]; - sc_signal signal_irq_cdma[NB_NIC_CHANNELS*2]; + sc_clock signal_clk("clk"); + sc_signal signal_resetn("resetn"); + + sc_signal signal_unused_irq[32]; + sc_signal signal_irq_bdev; + sc_signal signal_irq_mnic_rx[NB_NIC_CHANNELS]; + sc_signal signal_irq_mnic_tx[NB_NIC_CHANNELS]; + sc_signal signal_irq_mtty[NB_TTY_CHANNELS]; + sc_signal signal_irq_cdma[NB_NIC_CHANNELS*2]; + + // DSPIN signals for loopback in cluster_iob0 & cluster_iob1 + DspinSignals signal_dspin_cmd_iob0_loopback; + DspinSignals signal_dspin_rsp_iob0_loopback; + DspinSignals signal_dspin_cmd_iob1_loopback; + DspinSignals signal_dspin_rsp_iob1_loopback; // VCI signals for IOX network - VciSignals signal_vci_ini_iob0("signal_vci_ini_iob0"); - VciSignals signal_vci_ini_iob1("signal_vci_ini_iob1"); - VciSignals signal_vci_ini_bdev("signal_vci_ini_bdev"); - VciSignals signal_vci_ini_cdma("signal_vci_ini_cdma"); - - VciSignals signal_vci_tgt_iob0("signal_vci_tgt_iob0"); - VciSignals signal_vci_tgt_iob1("signal_vci_tgt_iob1"); - VciSignals signal_vci_tgt_mtty("signal_vci_tgt_mtty"); - VciSignals signal_vci_tgt_fbuf("signal_vci_tgt_fbuf"); - VciSignals signal_vci_tgt_mnic("signal_vci_tgt_mnic"); - VciSignals signal_vci_tgt_brom("signal_vci_tgt_brom"); - VciSignals signal_vci_tgt_bdev("signal_vci_tgt_bdev"); - VciSignals signal_vci_tgt_cdma("signal_vci_tgt_cdma"); + VciSignals signal_vci_ini_iob0("signal_vci_ini_iob0"); + VciSignals signal_vci_ini_iob1("signal_vci_ini_iob1"); + VciSignals signal_vci_ini_bdev("signal_vci_ini_bdev"); + VciSignals signal_vci_ini_cdma("signal_vci_ini_cdma"); + + VciSignals signal_vci_tgt_iob0("signal_vci_tgt_iob0"); + VciSignals signal_vci_tgt_iob1("signal_vci_tgt_iob1"); + VciSignals signal_vci_tgt_mtty("signal_vci_tgt_mtty"); + VciSignals signal_vci_tgt_fbuf("signal_vci_tgt_fbuf"); + VciSignals signal_vci_tgt_mnic("signal_vci_tgt_mnic"); + VciSignals signal_vci_tgt_brom("signal_vci_tgt_brom"); + VciSignals signal_vci_tgt_bdev("signal_vci_tgt_bdev"); + VciSignals signal_vci_tgt_cdma("signal_vci_tgt_cdma"); // Horizontal inter-clusters INT network DSPIN @@ -881,49 +896,52 @@ iox_network = new VciIoxNetwork( "iox_network", maptab_iox, - 0, // cluster_id 8, // number of targets 4 ); // number of initiators // boot ROM - VciSimpleRom* iox_brom; - iox_brom = new VciSimpleRom( "iox_brom", - IntTab(0, IOX_BROM_TGT_ID), - maptab_iox, - loader ); + VciSimpleRom* brom; + brom = new VciSimpleRom( "brom", + IntTab(0, IOX_BROM_TGT_ID), + maptab_iox, + loader ); // Network Controller - VciMultiNic* iox_mnic; - iox_mnic = new VciMultiNic( "iox_mnic", - IntTab(0, IOX_MNIC_TGT_ID), - maptab_iox, - NB_NIC_CHANNELS, - nic_rx_name, - nic_tx_name, - 0, // mac_4 address - 0 ); // mac_2 address + VciMultiNic* mnic; + mnic = new VciMultiNic( "mnic", + IntTab(0, IOX_MNIC_TGT_ID), + maptab_iox, + NB_NIC_CHANNELS, + nic_rx_name, + nic_tx_name, + 0, // mac_4 address + 0 ); // mac_2 address // Frame Buffer - VciFrameBuffer* iox_fbuf; - iox_fbuf = new VciFrameBuffer( "iox_fbuf", - IntTab(0, IOX_FBUF_TGT_ID), - maptab_iox, - FBUF_X_SIZE, FBUF_Y_SIZE ); + VciFrameBuffer* fbuf; + fbuf = new VciFrameBuffer( "fbuf", + IntTab(0, IOX_FBUF_TGT_ID), + maptab_iox, + FBUF_X_SIZE, FBUF_Y_SIZE ); // Block Device - VciBlockDeviceTsar* iox_bdev; - iox_bdev = new VciBlockDeviceTsar( "iox_bdev", - maptab_iox, - IntTab(0, BDEV_LOCAL_SRCID), - IntTab(0, IOX_BDEV_TGT_ID), - disk_name, - block_size, - 64); // burst size (bytes) + // for AHCI + // std::vector filenames; + // filenames.push_back(disk_name); // one single disk + VciBlockDeviceTsar* bdev; + bdev = new VciBlockDeviceTsar( "bdev", + maptab_iox, + IntTab(0, BDEV_LOCAL_SRCID), + IntTab(0, IOX_BDEV_TGT_ID), + disk_name, + block_size, + 64, // burst size (bytes) + 0 ); // disk latency // Chained Buffer DMA controller - VciChbufDma* iox_cdma; - iox_cdma = new VciChbufDma( "iox_cdma", - maptab_iox, - IntTab(0, CDMA_LOCAL_SRCID), - IntTab(0, IOX_CDMA_TGT_ID), - 64, // burst size (bytes) - 2*NB_NIC_CHANNELS ); + VciChbufDma* cdma; + cdma = new VciChbufDma( "cdma", + maptab_iox, + IntTab(0, CDMA_LOCAL_SRCID), + IntTab(0, IOX_CDMA_TGT_ID), + 64, // burst size (bytes) + 2*NB_NIC_CHANNELS ); // Multi-TTY controller std::vector vect_names; @@ -934,9 +952,9 @@ vect_names.push_back(term_name.str().c_str()); } - VciMultiTty* iox_mtty; - iox_mtty = new VciMultiTty( "iox_mtty", - IntTab(0, IOX_MTTY_TGT_ID), - maptab_iox, - vect_names); + VciMultiTty* mtty; + mtty = new VciMultiTty( "mtty", + IntTab(0, IOX_MTTY_TGT_ID), + maptab_iox, + vect_names); // Clusters TsarIobClusterp_clk (signal_clk); - iox_bdev->p_resetn (signal_resetn); - iox_bdev->p_irq (signal_irq_bdev); - iox_bdev->p_vci_target (signal_vci_tgt_bdev); - iox_bdev->p_vci_initiator (signal_vci_ini_bdev); + bdev->p_clk (signal_clk); + bdev->p_resetn (signal_resetn); + bdev->p_irq (signal_irq_bdev); + // For AHCI + // bdev->p_channel_irq[0] (signal_irq_bdev); + bdev->p_vci_target (signal_vci_tgt_bdev); + bdev->p_vci_initiator (signal_vci_ini_bdev); std::cout << " - BDEV connected" << std::endl; // FBUF connexion - iox_fbuf->p_clk (signal_clk); - iox_fbuf->p_resetn (signal_resetn); - iox_fbuf->p_vci (signal_vci_tgt_fbuf); + fbuf->p_clk (signal_clk); + fbuf->p_resetn (signal_resetn); + fbuf->p_vci (signal_vci_tgt_fbuf); std::cout << " - FBUF connected" << std::endl; // MNIC connexion - iox_mnic->p_clk (signal_clk); - iox_mnic->p_resetn (signal_resetn); - iox_mnic->p_vci (signal_vci_tgt_mnic); + mnic->p_clk (signal_clk); + mnic->p_resetn (signal_resetn); + mnic->p_vci (signal_vci_tgt_mnic); for ( size_t i=0 ; ip_rx_irq[i] (signal_irq_mnic_rx[i]); - iox_mnic->p_tx_irq[i] (signal_irq_mnic_tx[i]); + mnic->p_rx_irq[i] (signal_irq_mnic_rx[i]); + mnic->p_tx_irq[i] (signal_irq_mnic_tx[i]); } @@ -1080,17 +1100,17 @@ // BROM connexion - iox_brom->p_clk (signal_clk); - iox_brom->p_resetn (signal_resetn); - iox_brom->p_vci (signal_vci_tgt_brom); + brom->p_clk (signal_clk); + brom->p_resetn (signal_resetn); + brom->p_vci (signal_vci_tgt_brom); std::cout << " - BROM connected" << std::endl; // MTTY connexion - iox_mtty->p_clk (signal_clk); - iox_mtty->p_resetn (signal_resetn); - iox_mtty->p_vci (signal_vci_tgt_mtty); + mtty->p_clk (signal_clk); + mtty->p_resetn (signal_resetn); + mtty->p_vci (signal_vci_tgt_mtty); for ( size_t i=0 ; ip_irq[i] (signal_irq_mtty[i]); + mtty->p_irq[i] (signal_irq_mtty[i]); } @@ -1098,11 +1118,11 @@ // CDMA connexion - iox_cdma->p_clk (signal_clk); - iox_cdma->p_resetn (signal_resetn); - iox_cdma->p_vci_target (signal_vci_tgt_cdma); - iox_cdma->p_vci_initiator (signal_vci_ini_cdma); + cdma->p_clk (signal_clk); + cdma->p_resetn (signal_resetn); + cdma->p_vci_target (signal_vci_tgt_cdma); + cdma->p_vci_initiator (signal_vci_ini_cdma); for ( size_t i=0 ; i<(NB_NIC_CHANNELS*2) ; i++) { - iox_cdma->p_irq[i] (signal_irq_cdma[i]); + cdma->p_irq[i] (signal_irq_cdma[i]); } @@ -1129,10 +1149,10 @@ // IOB0 cluster connexion to IOX network - (*clusters[0][0]->p_vci_iox_ini) (signal_vci_ini_iob0); - (*clusters[0][0]->p_vci_iox_tgt) (signal_vci_tgt_iob0); + (*clusters[0][0]->p_vci_iob_iox_ini) (signal_vci_ini_iob0); + (*clusters[0][0]->p_vci_iob_iox_tgt) (signal_vci_tgt_iob0); // IOB1 cluster connexion to IOX network - (*clusters[XMAX-1][YMAX-1]->p_vci_iox_ini) (signal_vci_ini_iob1); - (*clusters[XMAX-1][YMAX-1]->p_vci_iox_tgt) (signal_vci_tgt_iob1); + (*clusters[XMAX-1][YMAX-1]->p_vci_iob_iox_ini) (signal_vci_ini_iob1); + (*clusters[XMAX-1][YMAX-1]->p_vci_iob_iox_tgt) (signal_vci_tgt_iob1); // All clusters Clock & RESET connexions @@ -1239,13 +1259,42 @@ } - clusters[0][y]->p_dspin_ram_cmd_in[WEST] (signal_dspin_false_ram_cmd_in[0][y][WEST]); - clusters[0][y]->p_dspin_ram_cmd_out[WEST] (signal_dspin_false_ram_cmd_out[0][y][WEST]); - clusters[0][y]->p_dspin_ram_rsp_in[WEST] (signal_dspin_false_ram_rsp_in[0][y][WEST]); - clusters[0][y]->p_dspin_ram_rsp_out[WEST] (signal_dspin_false_ram_rsp_out[0][y][WEST]); - - clusters[XMAX-1][y]->p_dspin_ram_cmd_in[EAST] (signal_dspin_false_ram_cmd_in[XMAX-1][y][EAST]); - clusters[XMAX-1][y]->p_dspin_ram_cmd_out[EAST] (signal_dspin_false_ram_cmd_out[XMAX-1][y][EAST]); - clusters[XMAX-1][y]->p_dspin_ram_rsp_in[EAST] (signal_dspin_false_ram_rsp_in[XMAX-1][y][EAST]); - clusters[XMAX-1][y]->p_dspin_ram_rsp_out[EAST] (signal_dspin_false_ram_rsp_out[XMAX-1][y][EAST]); + if( y == 0 ) // handling IOB to RAM network connection in cluster_iob0 + { + (*clusters[0][0]->p_dspin_iob_cmd_out) (signal_dspin_cmd_iob0_loopback); + clusters[0][0]->p_dspin_ram_cmd_in[WEST] (signal_dspin_cmd_iob0_loopback); + + clusters[0][0]->p_dspin_ram_cmd_out[WEST] (signal_dspin_false_ram_cmd_out[0][0][WEST]); + clusters[0][0]->p_dspin_ram_rsp_in[WEST] (signal_dspin_false_ram_rsp_in[0][0][WEST]); + + clusters[0][0]->p_dspin_ram_rsp_out[WEST] (signal_dspin_rsp_iob0_loopback); + (*clusters[0][0]->p_dspin_iob_rsp_in) (signal_dspin_rsp_iob0_loopback); + + } + else + { + clusters[0][y]->p_dspin_ram_cmd_in[WEST] (signal_dspin_false_ram_cmd_in[0][y][WEST]); + clusters[0][y]->p_dspin_ram_cmd_out[WEST] (signal_dspin_false_ram_cmd_out[0][y][WEST]); + clusters[0][y]->p_dspin_ram_rsp_in[WEST] (signal_dspin_false_ram_rsp_in[0][y][WEST]); + clusters[0][y]->p_dspin_ram_rsp_out[WEST] (signal_dspin_false_ram_rsp_out[0][y][WEST]); + } + + if( y == YMAX-1 ) // handling IOB to RAM network connection in cluster_iob1 + { + (*clusters[XMAX-1][YMAX-1]->p_dspin_iob_cmd_out) (signal_dspin_cmd_iob1_loopback); + clusters[XMAX-1][YMAX-1]->p_dspin_ram_cmd_in[EAST] (signal_dspin_cmd_iob1_loopback); + + clusters[XMAX-1][YMAX-1]->p_dspin_ram_cmd_out[EAST] (signal_dspin_false_ram_cmd_out[XMAX-1][YMAX-1][EAST]); + clusters[XMAX-1][YMAX-1]->p_dspin_ram_rsp_in[EAST] (signal_dspin_false_ram_rsp_in[XMAX-1][YMAX-1][EAST]); + + clusters[XMAX-1][YMAX-1]->p_dspin_ram_rsp_out[EAST] (signal_dspin_rsp_iob1_loopback); + (*clusters[XMAX-1][YMAX-1]->p_dspin_iob_rsp_in) (signal_dspin_rsp_iob1_loopback); + } + else + { + clusters[XMAX-1][y]->p_dspin_ram_cmd_in[EAST] (signal_dspin_false_ram_cmd_in[XMAX-1][y][EAST]); + clusters[XMAX-1][y]->p_dspin_ram_cmd_out[EAST] (signal_dspin_false_ram_cmd_out[XMAX-1][y][EAST]); + clusters[XMAX-1][y]->p_dspin_ram_rsp_in[EAST] (signal_dspin_false_ram_rsp_in[XMAX-1][y][EAST]); + clusters[XMAX-1][y]->p_dspin_ram_rsp_out[EAST] (signal_dspin_false_ram_rsp_out[XMAX-1][y][EAST]); + } } @@ -1282,5 +1331,5 @@ } - std::cout << "North & South boundaries established" << std::endl; + std::cout << "North & South boundaries established" << std::endl << std::endl; //////////////////////////////////////////////////////// @@ -1327,154 +1376,137 @@ } - sc_start(sc_core::sc_time(1, SC_NS)); - signal_resetn = true; - - for (size_t n = 1; n < ncycles; n++) - { - // Monitor a specific address for L1 & L2 caches - // clusters[1][1]->proc[0]->cache_monitor(0x8ba4ULL); - // clusters[0][0]->memc->cache_monitor( 0x12180ULL); - - if (debug_ok and (n > debug_from) and (n % debug_period == 0)) - { - std::cout << "****************** cycle " << std::dec << n ; - std::cout << " ************************************************" << std::endl; - - // trace proc[debug_proc_id] - if ( debug_proc_id < XMAX*YMAX*NB_PROCS_MAX ) + sc_start(sc_core::sc_time(1, SC_NS)); + signal_resetn = true; + + for (size_t n = 1; n < ncycles; n++) + { + // Monitor a specific address for L1 & L2 caches + // clusters[1][1]->proc[0]->cache_monitor(0x8ba4ULL); + // clusters[0][0]->memc->cache_monitor( 0x12180ULL); + + if (debug_ok and (n > debug_from) and (n % debug_period == 0)) { - - size_t l = debug_proc_id % NB_PROCS_MAX ; - size_t y = (debug_proc_id / NB_PROCS_MAX) % YMAX ; - size_t x = debug_proc_id / (YMAX * NB_PROCS_MAX) ; - - clusters[x][y]->proc[l]->print_trace(1); - - std::ostringstream proc_signame; - proc_signame << "[SIG]PROC_" << x << "_" << y << "_" << l ; - clusters[x][y]->signal_int_vci_ini_proc[l].print_trace(proc_signame.str()); - - std::ostringstream p2m_signame; - p2m_signame << "[SIG]PROC_" << x << "_" << y << "_" << l << " P2M" ; - clusters[x][y]->signal_int_dspin_p2m_proc[l].print_trace(p2m_signame.str()); - - std::ostringstream m2p_signame; - m2p_signame << "[SIG]PROC_" << x << "_" << y << "_" << l << " M2P" ; - clusters[x][y]->signal_int_dspin_m2p_proc[l].print_trace(m2p_signame.str()); - -// std::ostringstream p_cmd_signame; -// p_cmd_signame << "[SIG]PROC_" << x << "_" << y << "_" << l << " CMD" ; -// clusters[x][y]->signal_int_dspin_cmd_proc_i[l].print_trace(p_cmd_signame.str()); - -// std::ostringstream p_rsp_signame; -// p_rsp_signame << "[SIG]PROC_" << x << "_" << y << "_" << l << " RSP" ; -// clusters[x][y]->signal_int_dspin_rsp_proc_i[l].print_trace(p_rsp_signame.str()); - - // trace INT routers and xbar in a given cluster -// clusters[x][y]->int_xbar_m2p_c->print_trace(); -// clusters[x][y]->int_router_cmd->print_trace(1); -// clusters[x][y]->int_xbar_rsp_d->print_trace(); -// clusters[x][y]->int_xbar_cmd_d->print_trace(); -// clusters[x][y]->signal_int_dspin_cmd_l2g_d.print_trace("[SIG]L2G CMD"); -// clusters[x][y]->signal_int_dspin_cmd_g2l_d.print_trace("[SIG]G2L CMD"); -// clusters[x][y]->signal_int_dspin_rsp_l2g_d.print_trace("[SIG]L2G RSP"); -// clusters[x][y]->signal_int_dspin_rsp_g2l_d.print_trace("[SIG]G2L RSP"); + std::cout << "****************** cycle " << std::dec << n ; + std::cout << " ************************************************" << std::endl; + + // trace proc[debug_proc_id] + if ( debug_proc_id < XMAX*YMAX*NB_PROCS_MAX ) + { + + size_t l = debug_proc_id % NB_PROCS_MAX ; + size_t y = (debug_proc_id / NB_PROCS_MAX) % YMAX ; + size_t x = debug_proc_id / (YMAX * NB_PROCS_MAX) ; + + clusters[x][y]->proc[l]->print_trace(0); + + std::ostringstream proc_signame; + proc_signame << "[SIG]PROC_" << x << "_" << y << "_" << l ; + clusters[x][y]->signal_int_vci_ini_proc[l].print_trace(proc_signame.str()); + +// std::ostringstream p2m_signame; +// p2m_signame << "[SIG]PROC_" << x << "_" << y << "_" << l << " P2M" ; +// clusters[x][y]->signal_int_dspin_p2m_proc[l].print_trace(p2m_signame.str()); + +// std::ostringstream m2p_signame; +// m2p_signame << "[SIG]PROC_" << x << "_" << y << "_" << l << " M2P" ; +// clusters[x][y]->signal_int_dspin_m2p_proc[l].print_trace(m2p_signame.str()); + +// std::ostringstream p_cmd_signame; +// p_cmd_signame << "[SIG]PROC_" << x << "_" << y << "_" << l << " CMD" ; +// clusters[x][y]->signal_int_dspin_cmd_proc_i[l].print_trace(p_cmd_signame.str()); + +// std::ostringstream p_rsp_signame; +// p_rsp_signame << "[SIG]PROC_" << x << "_" << y << "_" << l << " RSP" ; +// clusters[x][y]->signal_int_dspin_rsp_proc_i[l].print_trace(p_rsp_signame.str()); + } + + // trace INT_CMD_D xbar and router in 1_0 +// clusters[1][0]->int_xbar_cmd_d->print_trace(); +// clusters[1][0]->int_xbar_rsp_d->print_trace(); + +// clusters[1][0]->signal_int_dspin_cmd_l2g_d.print_trace("[SIG] INT_CMD_L2G_D_1_0"); +// clusters[1][0]->signal_int_dspin_rsp_g2l_d.print_trace("[SIG] INT_RSP_G2L_D_1_0"); + +// clusters[1][0]->int_router_cmd->print_trace(0); +// clusters[1][0]->int_router_rsp->print_trace(0); + + // trace INT_CMD_D xbar and router in 0_0 +// clusters[0][0]->int_xbar_cmd_d->print_trace(); +// clusters[0][0]->int_xbar_rsp_d->print_trace(); + +// clusters[0][0]->signal_int_dspin_cmd_g2l_d.print_trace("[SIG] INT_CMD_G2L_D_0_0"); +// clusters[0][0]->signal_int_dspin_rsp_l2g_d.print_trace("[SIG] INT_RSP_L2G_D_0_0"); + +// clusters[0][0]->int_router_cmd->print_trace(0); +// clusters[0][0]->int_router_rsp->print_trace(0); + + // trace memc[debug_memc_id] and xram[debug_memc_id] + if ( debug_memc_id < XMAX*YMAX ) + { + size_t x = debug_memc_id / YMAX; + size_t y = debug_memc_id % YMAX; + clusters[x][y]->memc->print_trace(0); + std::ostringstream smemc_tgt; + smemc_tgt << "[SIG]MEMC_TGT_" << x << "_" << y; + clusters[x][y]->signal_int_vci_tgt_memc.print_trace(smemc_tgt.str()); + std::ostringstream smemc_ini; + smemc_ini << "[SIG]MEMC_INI_" << x << "_" << y; + clusters[x][y]->signal_ram_vci_ini_memc.print_trace(smemc_ini.str()); + clusters[x][y]->xram->print_trace(); + std::ostringstream sxram_tgt; + sxram_tgt << "[SIG]XRAM_TGT_" << x << "_" << y; + clusters[x][y]->signal_ram_vci_tgt_xram.print_trace(sxram_tgt.str()); + } + + // trace RAM network + for( size_t cluster = 0 ; cluster < XMAX*YMAX ; cluster++ ) + { + size_t x = cluster / YMAX; + size_t y = cluster % YMAX; + clusters[x][y]->ram_router_cmd->print_trace(); + clusters[x][y]->ram_router_rsp->print_trace(); + } + + // trace iob, iox and external peripherals + if ( debug_iob ) + { + clusters[0][0]->iob->print_trace(); + clusters[0][0]->signal_int_vci_tgt_iobx.print_trace( "[SIG]IOB0_INT_TGT"); + clusters[0][0]->signal_int_vci_ini_iobx.print_trace( "[SIG]IOB0_INT_INI"); + clusters[0][0]->signal_ram_vci_ini_iobx.print_trace( "[SIG]IOB0_RAM_INI"); + + signal_vci_ini_iob0.print_trace("[SIG]IOB0_IOX_INI"); + signal_vci_tgt_iob0.print_trace("[SIG]IOB0_IOX_TGT"); + + signal_dspin_cmd_iob0_loopback.print_trace("[SIG]IOB0_CMD_LOOPBACK"); + signal_dspin_rsp_iob0_loopback.print_trace("[SIG]IOB0_RSP_LOOPBACK"); + +// cdma->print_trace(); +// signal_vci_tgt_cdma.print_trace("[SIG]IOX_CDMA_TGT"); +// signal_vci_ini_cdma.print_trace("[SIG]IOX_CDMA_INI"); + +// brom->print_trace(); +// signal_vci_tgt_brom.print_trace("[SIG]IOX_BROM_TGT"); + +// mtty->print_trace(); +// signal_vci_tgt_mtty.print_trace("[SIG]IOX_MTTY_TGT"); + + bdev->print_trace(); + signal_vci_tgt_bdev.print_trace("[SIG]IOX_BDEV_TGT"); + signal_vci_ini_bdev.print_trace("[SIG]IOX_BDEV_INI"); + +// fbuf->print_trace(); +// signal_vci_tgt_fbuf.print_trace("[SIG]FBUF"); + + iox_network->print_trace(); + + // interrupts + if (signal_irq_bdev) std::cout << "### IRQ_BDEV ACTIVATED" << std::endl; + } } - // trace memc[debug_memc_id] - if ( debug_memc_id < XMAX*YMAX ) - { - - size_t x = debug_memc_id / YMAX; - size_t y = debug_memc_id % YMAX; - - clusters[x][y]->memc->print_trace(); - - std::ostringstream smemc_tgt; - smemc_tgt << "[SIG]MEMC_TGT_" << x << "_" << y; - clusters[x][y]->signal_int_vci_tgt_memc.print_trace(smemc_tgt.str()); - - std::ostringstream smemc_ini; - smemc_ini << "[SIG]MEMC_INI_" << x << "_" << y; - clusters[x][y]->signal_ram_vci_ini_memc.print_trace(smemc_ini.str()); - -// clusters[x][y]->ram_router_cmd->print_trace(); -// clusters[x][y]->ram_xbar_cmd->print_trace(); - -// std::ostringstream sg2l; -// sg2l << "[SIG]G2L_" << x << "_" << y; -// clusters[x][y]->signal_ram_dspin_cmd_g2l.print_trace(sg2l.str()); - - clusters[x][y]->xram->print_trace(); - - std::ostringstream sxram_tgt; - sxram_tgt << "[SIG]XRAM_TGT_" << x << "_" << y; - clusters[x][y]->signal_ram_vci_tgt_xram.print_trace(sxram_tgt.str()); - - std::ostringstream sm2p; - sm2p << "[SIG]MEMC_" << x << "_" << y << " M2P" ; - clusters[x][y]->signal_int_dspin_m2p_memc.print_trace(sm2p.str()); - - std::ostringstream sp2m; - sp2m << "[SIG]MEMC_" << x << "_" << y << " P2M" ; - clusters[x][y]->signal_int_dspin_p2m_memc.print_trace(sp2m.str()); - -// std::ostringstream m_cmd_signame; -// m_cmd_signame << "[SIG]MEMC_" << x << "_" << y << " CMD" ; -// clusters[x][y]->signal_int_dspin_cmd_memc_t.print_trace(m_cmd_signame.str()); - -// std::ostringstream m_rsp_signame; -// m_rsp_signame << "[SIG]MEMC_" << x << "_" << y << " RSP" ; -// clusters[x][y]->signal_int_dspin_rsp_memc_t.print_trace(m_rsp_signame.str()); - - std::ostringstream siob_ini; - siob_ini << "[SIG]IOB_INI_" << x << "_" << y; - clusters[x][y]->signal_ram_vci_ini_iobx.print_trace(siob_ini.str()); - } - - // trace components iob - if ( debug_iob ) - { - clusters[0][0]->iob->print_trace(); - clusters[0][0]->signal_int_vci_tgt_iobx.print_trace( "[SIG]IOB0 INT TGT" ); -// clusters[0][0]->signal_int_dspin_cmd_iobx_t.print_trace("[SIG]IOB0 INT CMD"); -// clusters[0][0]->signal_int_dspin_rsp_iobx_t.print_trace("[SIG]IOB0 INT RSP"); - - clusters[XMAX-1][YMAX-1]->iob->print_trace(); - clusters[XMAX-1][YMAX-1]->signal_int_vci_tgt_iobx.print_trace( "[SIG]IOB1 INT TGT" ); -// clusters[XMAX-1][YMAX-1]->signal_int_dspin_cmd_iobx_t.print_trace("[SIG]IOB1 INT CMD"); -// clusters[XMAX-1][YMAX-1]->signal_int_dspin_rsp_iobx_t.print_trace("[SIG]IOB1 INT RSP"); - } - - // trace external peripherals - iox_network->print_trace(); - - signal_vci_ini_iob0.print_trace("[SIG]IOB0 IOX INI"); - signal_vci_tgt_iob0.print_trace("[SIG]IOB0 IOX TGT"); - signal_vci_ini_iob1.print_trace("[SIG]IOB1 IOX INI"); - signal_vci_tgt_iob1.print_trace("[SIG]IOB1 IOX TGT"); - - iox_cdma->print_trace(); - signal_vci_tgt_cdma.print_trace("[SIG]CDMA_TGT"); - signal_vci_ini_cdma.print_trace("[SIG]CDMA_INI"); - -// iox_brom->print_trace(); -// signal_vci_tgt_brom.print_trace("[SIG]BROM"); - - iox_mtty->print_trace(); - signal_vci_tgt_mtty.print_trace("[SIG]MTTY"); - - iox_bdev->print_trace(); - signal_vci_tgt_bdev.print_trace("[SIG]BDEV_TGT"); - signal_vci_ini_bdev.print_trace("[SIG]BDEV_INI"); - -// iox_fbuf->print_trace(); -// signal_vci_tgt_fbuf.print_trace("[SIG]FBUF"); - - } - - sc_start(sc_core::sc_time(1, SC_NS)); - } - return EXIT_SUCCESS; + sc_start(sc_core::sc_time(1, SC_NS)); + } + return EXIT_SUCCESS; } Index: /trunk/platforms/tsar_generic_iob/tsar_iob_cluster/caba/metadata/tsar_iob_cluster.sd =================================================================== --- /trunk/platforms/tsar_generic_iob/tsar_iob_cluster/caba/metadata/tsar_iob_cluster.sd (revision 549) +++ /trunk/platforms/tsar_generic_iob/tsar_iob_cluster/caba/metadata/tsar_iob_cluster.sd (revision 550) @@ -83,14 +83,8 @@ dspin_rsp_width = parameter.Reference('dspin_ram_rsp_width')), - Uses('caba:dspin_local_crossbar', + Uses('caba:dspin_router_tsar', flit_width = parameter.Reference('dspin_ram_cmd_width')), - Uses('caba:dspin_local_crossbar', - flit_width = parameter.Reference('dspin_ram_rsp_width')), - - Uses('caba:dspin_router', - flit_width = parameter.Reference('dspin_ram_cmd_width')), - - Uses('caba:dspin_router', + Uses('caba:dspin_router_tsar', flit_width = parameter.Reference('dspin_ram_rsp_width')), Index: /trunk/platforms/tsar_generic_iob/tsar_iob_cluster/caba/source/include/tsar_iob_cluster.h =================================================================== --- /trunk/platforms/tsar_generic_iob/tsar_iob_cluster/caba/source/include/tsar_iob_cluster.h (revision 549) +++ /trunk/platforms/tsar_generic_iob/tsar_iob_cluster/caba/source/include/tsar_iob_cluster.h (revision 550) @@ -25,5 +25,5 @@ #include "vci_dspin_initiator_wrapper.h" #include "vci_dspin_target_wrapper.h" -#include "dspin_router.h" +#include "dspin_router_tsar.h" #include "virtual_dspin_router.h" #include "vci_multi_dma.h" @@ -52,9 +52,16 @@ sc_in p_resetn; - soclib::caba::VciInitiator* p_vci_iox_ini; - soclib::caba::VciTarget* p_vci_iox_tgt; - - sc_in* p_irq[32]; // not always used - + // Thes two ports are used to connect IOB to IOX nework in top cell + soclib::caba::VciInitiator* p_vci_iob_iox_ini; + soclib::caba::VciTarget* p_vci_iob_iox_tgt; + + // These ports are used to connect IOB to RAM network in top cell + soclib::caba::DspinOutput* p_dspin_iob_cmd_out; + soclib::caba::DspinInput* p_dspin_iob_rsp_in; + + // These ports are used to connect hard IRQ from external peripherals to IOB0 + sc_in* p_irq[32]; + + // These arrays of ports are used to connect the INT & RAM networks in top cell soclib::caba::DspinOutput** p_dspin_int_cmd_out; soclib::caba::DspinInput** p_dspin_int_cmd_in; @@ -124,18 +131,10 @@ VciSignals signal_ram_vci_tgt_xram; - // RAM network DSPIN signals between VCI/DSPIN wrappers and crossbars or routers + // RAM network DSPIN signals between VCI/DSPIN wrappers and routers DspinSignals signal_ram_dspin_cmd_xram_t; DspinSignals signal_ram_dspin_rsp_xram_t; DspinSignals signal_ram_dspin_cmd_memc_i; DspinSignals signal_ram_dspin_rsp_memc_i; - DspinSignals signal_ram_dspin_cmd_iobx_i; - DspinSignals signal_ram_dspin_rsp_iobx_i; - // RAM network DSPIN signals between DSPIN routers and DSPIN local crossbars - DspinSignals signal_ram_dspin_cmd_l2g; - DspinSignals signal_ram_dspin_cmd_g2l; - DspinSignals signal_ram_dspin_rsp_l2g; - DspinSignals signal_ram_dspin_rsp_g2l; - ////////////////////////////////////// // Hardwate Components (pointers) @@ -194,6 +193,6 @@ dspin_ram_rsp_width>* xram_ram_wt; - DspinRouter* ram_router_cmd; - DspinRouter* ram_router_rsp; + DspinRouterTsar* ram_router_cmd; + DspinRouterTsar* ram_router_rsp; // IO Network Components (not instanciated in all clusters) @@ -214,7 +213,4 @@ dspin_ram_rsp_width>* iob_ram_wi; - DspinLocalCrossbar* ram_xbar_cmd; - DspinLocalCrossbar* ram_xbar_rsp; - // cluster constructor TsarIobCluster( sc_module_name insname, Index: /trunk/platforms/tsar_generic_iob/tsar_iob_cluster/caba/source/src/tsar_iob_cluster.cpp =================================================================== --- /trunk/platforms/tsar_generic_iob/tsar_iob_cluster/caba/source/src/tsar_iob_cluster.cpp (revision 549) +++ /trunk/platforms/tsar_generic_iob/tsar_iob_cluster/caba/source/src/tsar_iob_cluster.cpp (revision 550) @@ -49,17 +49,17 @@ size_t l_width, - size_t memc_int_tgtid, - size_t xicu_int_tgtid, - size_t mdma_int_tgtid, - size_t iobx_int_tgtid, - - size_t proc_int_srcid, - size_t mdma_int_srcid, - size_t iobx_int_srcid, - - size_t xram_ram_tgtid, - - size_t memc_ram_srcid, - size_t iobx_ram_srcid, + size_t memc_int_tgtid, // local index + size_t xicu_int_tgtid, // local index + size_t mdma_int_tgtid, // local index + size_t iobx_int_tgtid, // local index + + size_t proc_int_srcid, // local index + size_t mdma_int_srcid, // local index + size_t iobx_int_srcid, // local index + + size_t xram_ram_tgtid, // local index + + size_t memc_ram_srcid, // local index + size_t iobx_ram_srcid, // local index size_t memc_ways, @@ -85,6 +85,7 @@ size_t cluster_id = x_id * ymax + y_id; - size_t cluster_iob0 = 0; - size_t cluster_iob1 = xmax*ymax-1; + + size_t cluster_iob0 = 0; // South-West cluster + size_t cluster_iob1 = xmax*ymax-1; // North-East cluster // Vectors of DSPIN ports for inter-cluster communications @@ -99,9 +100,14 @@ p_dspin_ram_rsp_out = alloc_elems >("p_ext_rsp_out", 4); - // VCI ports to IOB0 and IOB1 in cluster_iob0 and cluster_iob1 + // ports in cluster_iob0 and cluster_iob1 only if ( (cluster_id == cluster_iob0) or (cluster_id == cluster_iob1) ) { - p_vci_iox_ini = new soclib::caba::VciInitiator; - p_vci_iox_tgt = new soclib::caba::VciTarget; + // VCI ports from IOB to IOX network + p_vci_iob_iox_ini = new soclib::caba::VciInitiator; + p_vci_iob_iox_tgt = new soclib::caba::VciTarget; + + // DSPIN ports from IOB to RAM network + p_dspin_iob_cmd_out = new soclib::caba::DspinOutput; + p_dspin_iob_rsp_in = new soclib::caba::DspinInput; } @@ -166,6 +172,6 @@ IntTab(cluster_id, memc_int_tgtid), // TGTID INT network (cluster_id << l_width) + nb_procs, // CC_GLOBAL_ID - x_width, // Number of x bits in platform - y_width, // Number of y bits in platform + x_width, // number of bits for x coordinate + y_width, // number of bits for y coordinate memc_ways, memc_sets, 16, // CACHE SIZE 3, // MAX NUMBER OF COPIES @@ -334,5 +340,5 @@ int_router_rsp = new VirtualDspinRouter( s_int_router_rsp.str().c_str(), - x_id,y_id, // coordinates in mesh + x_id,y_id, // router coordinates in mesh x_width, y_width, // x & y fields width 2, // nb virtual channels @@ -360,17 +366,28 @@ std::ostringstream s_ram_router_cmd; s_ram_router_cmd << "ram_router_cmd_" << x_id << "_" << y_id; - ram_router_cmd = new DspinRouter( + ram_router_cmd = new DspinRouterTsar( s_ram_router_cmd.str().c_str(), - x_id,y_id, // coordinate in the mesh - x_width, y_width, // x & y fields width - 4,4); // input & output fifo depths + x_id, y_id, // router coordinates in mesh + x_width, // x field width in first flit + x_width, // y field width in first flit + 4, 4, // input & output fifo depths + cluster_iob0, // cluster containing IOB0 + cluster_iob1, // cluster containing IOB1 + l_width, // local field width in first flit + iobx_ram_srcid ); // IOB local index std::ostringstream s_ram_router_rsp; s_ram_router_rsp << "ram_router_rsp_" << x_id << "_" << y_id; - ram_router_rsp = new DspinRouter( + ram_router_rsp = new DspinRouterTsar( s_ram_router_rsp.str().c_str(), - x_id,y_id, // coordinates in mesh - x_width, y_width, // x & y fields width - 4,4); // input & output fifo depths + x_id, y_id, // coordinates in mesh + x_width, // x field width in first flit + y_width, // y field width in first flit + 4, 4, // input & output fifo depths + cluster_iob0, // cluster containing IOB0 + cluster_iob1, // cluster containing IOB1 + l_width, // local field width in first flit + iobx_ram_srcid ); // IOB local index + ////////////////////// I/O CLUSTER ONLY /////////////////////// @@ -435,34 +452,5 @@ s_iob_ram_wi.str().c_str(), x_width + y_width + l_width); - - ///////////// RAM LOCAL_XBAR(S) - std::ostringstream s_ram_xbar_cmd; - s_ram_xbar_cmd << "ram_xbar_cmd_" << x_id << "_" << y_id; - ram_xbar_cmd = new DspinLocalCrossbar( - s_ram_xbar_cmd.str().c_str(), - mt_ram, // mapping table - x_id, y_id, // cluster coordinates - x_width, y_width, 0, // one dest on ram_cmd network - 2, // number of local sources - 1, // number of local dests - 2, 2, // fifo depths - true, // CMD crossbar - false, // no routing table (one dest) - false ); // no broadcast - - std::ostringstream s_ram_xbar_rsp; - s_ram_xbar_rsp << "ram_xbar_rsp_" << x_id << "_" << y_id; - ram_xbar_rsp = new DspinLocalCrossbar( - s_ram_xbar_rsp.str().c_str(), - mt_ram, // mapping table - x_id, y_id, // cluster coordinates - x_width, y_width, l_width, // two sources on ram_rsp network - 1, // number of local sources - 2, // number of local dests - 2, 2, // fifo depths - false, // RSP crossbar - true, // use routing table - false ); // no broadcast - } + } // end if IO //////////////////////////////////// @@ -682,46 +670,42 @@ mdma_int_wi->p_vci (signal_int_vci_ini_mdma); - // For the IO bridge and the RAM network components, the connexions - // depend on cluster type: The vci_io_bridge and dspin_local_crossbar - // components are only in cluster_iob0 & cluster_iob1 - - if ( (cluster_id != cluster_iob0) and (cluster_id != cluster_iob1) ) - { - // RAM network CMD & RSP routers - ram_router_cmd->p_clk (this->p_clk); - ram_router_cmd->p_resetn (this->p_resetn); - ram_router_rsp->p_clk (this->p_clk); - ram_router_rsp->p_resetn (this->p_resetn); - for( size_t n=0 ; n<4 ; n++) - { - ram_router_cmd->p_out[n] (this->p_dspin_ram_cmd_out[n]); - ram_router_cmd->p_in[n] (this->p_dspin_ram_cmd_in[n]); - ram_router_rsp->p_out[n] (this->p_dspin_ram_rsp_out[n]); - ram_router_rsp->p_in[n] (this->p_dspin_ram_rsp_in[n]); - } - ram_router_cmd->p_out[4] (signal_ram_dspin_cmd_xram_t); - ram_router_cmd->p_in[4] (signal_ram_dspin_cmd_memc_i); - ram_router_rsp->p_out[4] (signal_ram_dspin_rsp_memc_i); - ram_router_rsp->p_in[4] (signal_ram_dspin_rsp_xram_t); - } - else // IO cluster + //////////////////////////// RAM network CMD & RSP routers + ram_router_cmd->p_clk (this->p_clk); + ram_router_cmd->p_resetn (this->p_resetn); + ram_router_rsp->p_clk (this->p_clk); + ram_router_rsp->p_resetn (this->p_resetn); + for( size_t n=0 ; n<4 ; n++) + { + ram_router_cmd->p_out[n] (this->p_dspin_ram_cmd_out[n]); + ram_router_cmd->p_in[n] (this->p_dspin_ram_cmd_in[n]); + ram_router_rsp->p_out[n] (this->p_dspin_ram_rsp_out[n]); + ram_router_rsp->p_in[n] (this->p_dspin_ram_rsp_in[n]); + } + ram_router_cmd->p_out[4] (signal_ram_dspin_cmd_xram_t); + ram_router_cmd->p_in[4] (signal_ram_dspin_cmd_memc_i); + ram_router_rsp->p_out[4] (signal_ram_dspin_rsp_memc_i); + ram_router_rsp->p_in[4] (signal_ram_dspin_rsp_xram_t); + + ///////////////////////// IOB exists only in cluster_iob0 & cluster_iob1. + if ( (cluster_id == cluster_iob0) or (cluster_id == cluster_iob1) ) { // IO bridge iob->p_clk (this->p_clk); iob->p_resetn (this->p_resetn); - iob->p_vci_ini_iox (*(this->p_vci_iox_ini)); - iob->p_vci_tgt_iox (*(this->p_vci_iox_tgt)); + iob->p_vci_ini_iox (*(this->p_vci_iob_iox_ini)); + iob->p_vci_tgt_iox (*(this->p_vci_iob_iox_tgt)); iob->p_vci_tgt_int (signal_int_vci_tgt_iobx); iob->p_vci_ini_int (signal_int_vci_ini_iobx); iob->p_vci_ini_ram (signal_ram_vci_ini_iobx); + if ( cluster_id == cluster_iob0 ) - for ( size_t n=0 ; n<32 ; n++ ) - (*iob->p_irq[n]) (*(this->p_irq[n])); + for ( size_t n=0 ; n<32 ; n++ ) + (*iob->p_irq[n]) (*(this->p_irq[n])); // initiator wrapper to RAM network iob_ram_wi->p_clk (this->p_clk); iob_ram_wi->p_resetn (this->p_resetn); - iob_ram_wi->p_dspin_cmd (signal_ram_dspin_cmd_iobx_i); - iob_ram_wi->p_dspin_rsp (signal_ram_dspin_rsp_iobx_i); + iob_ram_wi->p_dspin_cmd (*(this->p_dspin_iob_cmd_out)); + iob_ram_wi->p_dspin_rsp (*(this->p_dspin_iob_rsp_in)); iob_ram_wi->p_vci (signal_ram_vci_ini_iobx); @@ -739,41 +723,6 @@ iob_int_wt->p_dspin_rsp (signal_int_dspin_rsp_iobx_t); iob_int_wt->p_vci (signal_int_vci_tgt_iobx); - - // RAM network CMD local crossbar - ram_xbar_cmd->p_clk (this->p_clk); - ram_xbar_cmd->p_resetn (this->p_resetn); - ram_xbar_cmd->p_global_out (signal_ram_dspin_cmd_l2g); - ram_xbar_cmd->p_global_in (signal_ram_dspin_cmd_g2l); - ram_xbar_cmd->p_local_in[0] (signal_ram_dspin_cmd_memc_i); - ram_xbar_cmd->p_local_in[1] (signal_ram_dspin_cmd_iobx_i); - ram_xbar_cmd->p_local_out[0] (signal_ram_dspin_cmd_xram_t); - - // RAM network RSP local crossbar - ram_xbar_rsp->p_clk (this->p_clk); - ram_xbar_rsp->p_resetn (this->p_resetn); - ram_xbar_rsp->p_global_out (signal_ram_dspin_rsp_l2g); - ram_xbar_rsp->p_global_in (signal_ram_dspin_rsp_g2l); - ram_xbar_rsp->p_local_in[0] (signal_ram_dspin_rsp_xram_t); - ram_xbar_rsp->p_local_out[0] (signal_ram_dspin_rsp_memc_i); - ram_xbar_rsp->p_local_out[1] (signal_ram_dspin_rsp_iobx_i); - - // RAM network CMD & RSP routers - ram_router_cmd->p_clk (this->p_clk); - ram_router_cmd->p_resetn (this->p_resetn); - ram_router_rsp->p_clk (this->p_clk); - ram_router_rsp->p_resetn (this->p_resetn); - for( size_t n=0 ; n<4 ; n++) - { - ram_router_cmd->p_out[n] (this->p_dspin_ram_cmd_out[n]); - ram_router_cmd->p_in[n] (this->p_dspin_ram_cmd_in[n]); - ram_router_rsp->p_out[n] (this->p_dspin_ram_rsp_out[n]); - ram_router_rsp->p_in[n] (this->p_dspin_ram_rsp_in[n]); - } - ram_router_cmd->p_out[4] (signal_ram_dspin_cmd_g2l); - ram_router_cmd->p_in[4] (signal_ram_dspin_cmd_l2g); - ram_router_rsp->p_out[4] (signal_ram_dspin_rsp_g2l); - ram_router_rsp->p_in[4] (signal_ram_dspin_rsp_l2g); - } - + } + } // end constructor