Index: /trunk/modules/vci_cc_vcache_wrapper2_v1/caba/source/src/vci_cc_vcache_wrapper2_v1.cpp
===================================================================
--- /trunk/modules/vci_cc_vcache_wrapper2_v1/caba/source/src/vci_cc_vcache_wrapper2_v1.cpp	(revision 54)
+++ /trunk/modules/vci_cc_vcache_wrapper2_v1/caba/source/src/vci_cc_vcache_wrapper2_v1.cpp	(revision 55)
@@ -32,5 +32,6 @@
 namespace caba {
 
-#define SOCLIB_MODULE_DEBUG
+//#define SOCLIB_MODULE_DEBUG
+#define DEBUG_START_CYCLE 33069000
 #ifdef SOCLIB_MODULE_DEBUG
 namespace {
@@ -611,5 +612,6 @@
 
 #ifdef SOCLIB_MODULE_DEBUG
-std::cout << name() << "cycle = " << m_cpt_total_cycles  
+if(m_cpt_total_cycles > DEBUG_START_CYCLE && m_srcid_rw==0){
+std::cout << name() << " cycle = " << std::dec << m_cpt_total_cycles  
        	  << " tgt fsm: " << tgt_fsm_state_str[r_vci_tgt_fsm]
        	  << " dcache fsm: " << dcache_fsm_state_str[r_dcache_fsm]
@@ -619,4 +621,5 @@
        	  << " inval itlb fsm: " << inval_itlb_fsm_state_str[r_inval_itlb_fsm] 
           << " inval dtlb fsm: " << inval_dtlb_fsm_state_str[r_inval_dtlb_fsm] << std::endl;
+}
 #endif
 
@@ -632,6 +635,8 @@
 
 #ifdef SOCLIB_MODULE_DEBUG
+if(m_cpt_total_cycles > DEBUG_START_CYCLE && m_srcid_rw==0){
     std::cout << name() << " Instruction Request: " << ireq << std::endl;
     std::cout << name() << " Data Request: " << dreq << std::endl;
+}
 #endif
 
@@ -2053,5 +2058,7 @@
 
 #ifdef SOCLIB_MODULE_DEBUG
+if(m_cpt_total_cycles > DEBUG_START_CYCLE && m_srcid_rw==0){
     std::cout << name() << " Instruction Response: " << irsp << std::endl;
+}
 #endif
 
@@ -4397,8 +4404,9 @@
             if(dreq.type == iss_t::DATA_SC) 
 	    {
+		if(r_dcache_cleanup_req) break;
 		size_t way = 0;
 		size_t set = 0;
                 // Simulate an invalidate request
-		r_dcache_cleanup_req = r_dcache.inval(r_dcache_paddr_save, &way, &set);
+		r_dcache_cleanup_req = r_dcache.inval(r_dcache_paddr_save, &way, &set);        //   !!!!!!!!!
 		r_dcache_cleanup_line = r_dcache_paddr_save.read() >> (uint32_log2(m_dcache_words)+2);
 		m_cpt_cc_cleanup_data++;
@@ -4993,5 +5001,7 @@
 
 #ifdef SOCLIB_MODULE_DEBUG
+if(m_cpt_total_cycles > DEBUG_START_CYCLE && m_srcid_rw==0){
     std::cout << name() << " Data Response: " << drsp << std::endl;
+}
 #endif
 
@@ -5909,6 +5919,7 @@
 
 #ifdef SOCLIB_MODULE_DEBUG 
+if(m_cpt_total_cycles > DEBUG_START_CYCLE && m_srcid_rw==0){
    std::cout << name() 
-      	     << "Moore R/W:" << std::hex
+      	     << " Moore R/W:" << std::hex
       	     << " p_vci_ini_rw.cmdval: " << p_vci_ini_rw.cmdval
       	     << " p_vci_ini_rw.address: " << p_vci_ini_rw.address
@@ -5919,10 +5930,10 @@
 
    std::cout << name() 
-      	     << "Moore TGT:" << std::hex
+      	     << " Moore TGT:" << std::hex
       	     << " p_vci_tgt.rspval: " << p_vci_tgt.rspval
       	     << std::endl;
 
    std::cout << name() 
-      	     << "Moore Cleanup:" << std::hex
+      	     << " Moore Cleanup:" << std::hex
       	     << " p_vci_ini_c.cmdval: " << p_vci_ini_c.cmdval
       	     << " p_vci_ini_c.address: " << p_vci_ini_c.address
@@ -5931,5 +5942,5 @@
       	     << " p_vci_ini_c.eop: " << p_vci_ini_c.eop
       	     << std::endl;
-
+}
 #endif
 }