Changeset 56

Timestamp:

Jun 16, 2010, 1:52:39 PM (15 years ago)

Author:

guthmull

Message:

SC don't generate invalidations and cleanup any more, add treatment of coherence requests in blocking fsm states

File:

• trunk/modules/vci_cc_vcache_wrapper2_v1/caba/source/src/vci_cc_vcache_wrapper2_v1.cpp (modified) (4 diffs)

trunk/modules/vci_cc_vcache_wrapper2_v1/caba/source/src/vci_cc_vcache_wrapper2_v1.cpp

@@ -4059 +4059 @@
     case DCACHE_ITLB_INVAL:
     {
+        // external cache invalidate request
+        if ( r_tgt_dcache_req )   
+        {
+            r_dcache_fsm = DCACHE_CC_CHECK;
+            r_dcache_fsm_save = r_dcache_fsm;
+            break;
+        }  
         if ( !r_dcache_xtn_req ) 
         {
@@ -4238 +4245 @@
     case DCACHE_DCACHE_SYNC:
     {
+        // external cache invalidate request
+        if ( r_tgt_dcache_req )   
+        {
+            r_dcache_fsm = DCACHE_CC_CHECK;
+            r_dcache_fsm_save = r_dcache_fsm;
+            break;
+        }  
         if ( !r_dcache_write_req ) 
         {
@@ -4402 +4416 @@
             }
 
-            if(dreq.type == iss_t::DATA_SC) 
-            {
-                if(r_dcache_cleanup_req) break;
-                size_t way = 0;
-                size_t set = 0;
-                // Simulate an invalidate request
-                r_dcache_cleanup_req = r_dcache.inval(r_dcache_paddr_save, &way, &set);        //   !!!!!!!!!
-                r_dcache_cleanup_line = r_dcache_paddr_save.read() >> (uint32_log2(m_dcache_words)+2);
-                m_cpt_cc_cleanup_data++;
-                
-                if ( r_dcache_in_itlb[way*m_dcache_sets+set] || r_dcache_in_dtlb[way*m_dcache_sets+set] ) 
-                {       
-                    // ins tlb invalidate verification
-                    r_dcache_itlb_inval_req = r_dcache_in_itlb[way*m_dcache_sets+set];
-                    r_dcache_itlb_inval_line = r_dcache_paddr_save.read() >> (uint32_log2(m_dcache_words)+2);
-                    r_dcache_in_itlb[way*m_dcache_sets+set] = false;
-                
-                    // data tlb invalidate verification
-                    r_dcache_dtlb_inval_req = r_dcache_in_dtlb[way*m_dcache_sets+set];
-                    r_dcache_dtlb_inval_line = r_dcache_paddr_save.read() >> (uint32_log2(m_dcache_words)+2);
-                    r_dcache_in_dtlb[way*m_dcache_sets+set] = false;
-                    r_dcache_fsm = DCACHE_TLB_CC_INVAL;
-                    r_dcache_fsm_save = r_dcache_fsm;
-                    break;
-                }
-
-            }           
             drsp.valid = true;
             drsp.rdata = r_dcache_miss_buf[0];
@@ -4969 +4956 @@
 
         if (((r_dcache_fsm_save == DCACHE_BIS)||(r_dcache_fsm_save == DCACHE_MISS_WAIT) ||
-             (r_dcache_fsm_save == DCACHE_UNC_WAIT)||(r_dcache_fsm_save == DCACHE_MISS_UPDT)) && 
+             (r_dcache_fsm_save == DCACHE_MISS_UPDT)) && 
              (r_dcache_tlb_nline.read() == r_dcache_dtlb_inval_line.read()))
         {