Ignore:
Timestamp:
Oct 26, 2013, 5:34:58 PM (11 years ago)
Author:
bouyer
Message:

prefix some register name with spi_ for readability
Can't write r_ctrl_go_bsy from both VCI and SPI FSMs. Add a r_spi_done signal
which resets r_ctrl_go_bsy in the VCI fsm.

File:
1 edited

Legend:

Unmodified
Added
Removed
  • trunk/modules/vci_spi/caba/source/src/vci_spi.cpp

    r564 r565  
    5555        r_ctrl_cpha       = false;
    5656        r_ctrl_go_bsy     = false;
    57         r_clk_counter     = 0xffff;
     57        r_spi_clk_counter     = 0xffff;
    5858        r_spi_clk        = 0;
     59        r_spi_done        = false;
    5960
    6061        r_irq             = false;
     
    6869    // r_target_fsm, r_irq_enable, r_nblocks, r_buf adress, r_lba, r_go, r_read
    6970    //////////////////////////////////////////////////////////////////////////////
     71
     72    if (r_spi_done)
     73        r_ctrl_go_bsy = false;
    7074
    7175    switch(r_target_fsm) {
     
    210214    // the SPI FSM controls SPI signals
    211215    //////////////////////////////////////////////////////////////////////////////
     216    if (r_ctrl_go_bsy == false)
     217        r_spi_done = false;
    212218    switch (r_spi_fsm) {
    213219    case S_IDLE:
    214         r_clk_counter = r_divider.read();
     220        r_spi_clk_counter = r_divider.read();
    215221        r_spi_clk = 0;
    216222        r_spi_clk_previous = r_ctrl_cpha;
    217223        r_spi_clk_ignore = r_ctrl_cpha;
    218         r_bit_count = r_ctrl_char_len;
     224        r_spi_bit_count = r_ctrl_char_len;
    219225        r_spi_out = (r_txrx[(r_ctrl_char_len -1)/ 64] >> ((r_ctrl_char_len - 1) % 64)) & (uint64_t)0x0000000000000001ULL;
    220         if (r_ctrl_go_bsy.read())
     226        if (r_ctrl_go_bsy.read() && !r_spi_done.read())
    221227                r_spi_fsm = S_XMIT;
    222228        break;
     
    231237                r_txrx[1] = (r_txrx[1] << 1) | (r_txrx[0] >> 63);
    232238                r_txrx[0] = (r_txrx[0] << 1) | p_spi_miso;
    233                 r_bit_count = r_bit_count - 1;
     239                r_spi_bit_count = r_spi_bit_count - 1;
    234240            } else if (r_spi_clk_previous == 1 && s_clk_sample == 0) {
    235241                // high to low transition: change output, or stop
    236                 if (r_bit_count == 0) {
     242                if (r_spi_bit_count == 0) {
    237243                    r_spi_fsm = S_IDLE;
    238244                    r_irq = r_ctrl_ie;
    239                     r_ctrl_go_bsy = false;
     245                    r_spi_done = true;
    240246#ifdef SOCLIB_MODULE_DEBUG0
    241247                    std::cout << name() << " end xfer " << std::dec << (int)r_ctrl_char_len.read() << " data " << std::hex << r_txrx[1] << " " << r_txrx[0] << std::endl;
     
    248254        r_spi_clk_previous = s_clk_sample;
    249255        // generate the SPI clock
    250         if (r_clk_counter.read() == 0) {
    251             r_clk_counter = r_divider.read();
     256        if (r_spi_clk_counter.read() == 0) {
     257            r_spi_clk_counter = r_divider.read();
    252258            r_spi_clk = !r_spi_clk.read();
    253259            r_spi_clk_ignore = false;
    254260        } else {
    255             r_clk_counter = r_clk_counter.read() - 1;
     261            r_spi_clk_counter = r_spi_clk_counter.read() - 1;
    256262        }
    257263        break;
     
    766772            << std::endl;
    767773        std::cout << name() << " _SPI : " << spi_str[r_spi_fsm.read()]
    768             << " clk_counter " << r_clk_counter.read()
    769             << " r_bit_count " << r_bit_count.read()
     774            << " clk_counter " << r_spi_clk_counter.read()
     775            << " r_spi_bit_count " << r_spi_bit_count.read()
    770776            << " r_ctrl_go_bsy " << (int)r_ctrl_go_bsy.read() << std::endl;
    771777        std::cout << name() << " _SPI : "
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