Ignore:
Timestamp:
Oct 30, 2013, 11:19:23 AM (11 years ago)
Author:
cfuguet
Message:

Adding support for TSAR platforms using the vci_io_bridge component.

In this case (USE_IOB=1), when a block is read from the disk controller,
the buffer containing the read data must be invalidated in the Memory
Cache as the transfer is done between the disk controller and the RAM.

File:
1 edited

Legend:

Unmodified
Added
Removed
  • trunk/softs/tsar_boot/conf/platform_fpga_de2-115/defs_platform.h

    r425 r568  
    44#define IRQ_PER_PROC    1
    55
     6#define USE_IOB         0
    67#define CACHE_COHERENCE 1
    78#define CACHE_LINE_SIZE 64//bytes
     
    1314#define TTY_BASE        0xFC000000
    1415#define ICU_BASE        0xFD000000
     16#define MCC_BASE        0xFFFFFFFF // not used
    1517
    1618/* Mandatory argument only for FPGA platforms */
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