Changeset 577 for branches/RWT/modules/vci_cc_vcache_wrapper
- Timestamp:
- Nov 21, 2013, 10:46:36 AM (11 years ago)
- Location:
- branches/RWT/modules/vci_cc_vcache_wrapper/caba/source
- Files:
-
- 2 edited
Legend:
- Unmodified
- Added
- Removed
-
branches/RWT/modules/vci_cc_vcache_wrapper/caba/source/include/vci_cc_vcache_wrapper.h
r513 r577 311 311 312 312 // STRUCTURAL PARAMETERS 313 soclib::common::AddressDecodingTable<uint 32_t, bool> m_cacheability_table;313 soclib::common::AddressDecodingTable<uint64_t, bool> m_cacheability_table; 314 314 315 315 const size_t m_srcid; … … 403 403 sc_signal<bool> r_icache_tlb_rsp_error; // tlb miss response error 404 404 405 // Filp-Flop in ICACHE FSM for saving the cleanup victim request406 sc_signal<bool> r_icache_cleanup_victim_req;407 sc_signal<paddr_t> r_icache_cleanup_victim_nline;408 405 409 406 // communication between ICACHE FSM and CC_SEND FSM … … 413 410 sc_signal<size_t> r_icache_cc_send_way; // ICACHE cc_send way 414 411 sc_signal<size_t> r_icache_cc_send_updt_tab_idx; // ICACHE cc_send update table index 412 413 // Filp-Flop in ICACHE FSM for saving the cleanup victim request 414 sc_signal<bool> r_icache_cleanup_victim_req; 415 sc_signal<paddr_t> r_icache_cleanup_victim_nline; 415 416 416 417 /////////////////////////////// -
branches/RWT/modules/vci_cc_vcache_wrapper/caba/source/src/vci_cc_vcache_wrapper.cpp
r538 r577 288 288 r_icache_cc_send_way("r_icache_cc_send_way"), 289 289 r_icache_cc_send_updt_tab_idx("r_icache_cc_send_updt_tab_idx"), 290 291 r_icache_cleanup_victim_req("r_icache_cleanup_victim_req"), 292 r_icache_cleanup_victim_nline("r_icache_cleanup_victim_nline"), 290 293 291 294 r_dcache_fsm("r_dcache_fsm"), … … 354 357 r_dcache_xtn_req("r_dcache_xtn_req"), 355 358 r_dcache_xtn_opcode("r_dcache_xtn_opcode"), 356 359 357 360 r_dcache_cleanup_victim_req("r_dcache_cleanup_victim_req"), 358 361 r_dcache_cleanup_victim_nline("r_dcache_cleanup_victim_nline"), 359 360 r_icache_cleanup_victim_req("r_icache_cleanup_victim_req"),361 r_icache_cleanup_victim_nline("r_icache_cleanup_victim_nline"),362 362 363 363 r_dcache_cc_send_req("r_dcache_cc_send_req"), … … 1219 1219 // cacheability 1220 1220 if ( not (r_mmu_mode.read() & INS_CACHE_MASK) ) cacheable = false; 1221 else cacheable = m_cacheability_table[ m_ireq.addr];1221 else cacheable = m_cacheability_table[(uint64_t)m_ireq.addr]; 1222 1222 } 1223 1223 else // itlb activated … … 2296 2296 if ( m_dreq.valid ) 2297 2297 { 2298 2298 2299 if ( r_mmu_mode.read() & DATA_TLB_MASK ) // DTLB activated 2299 2300 { … … 2725 2726 2726 2727 if ( not (r_mmu_mode.read() & DATA_CACHE_MASK) ) cacheable = false; 2727 else cacheable = m_cacheability_table[ m_dreq.addr];2728 else cacheable = m_cacheability_table[(uint64_t)m_dreq.addr]; 2728 2729 } 2729 2730 else // dtlb activated … … 4392 4393 bool s_cleanup_updt_data = false; 4393 4394 bool s_cleanup_line_ncc = false; 4394 uint32_t mask = 0;4395 4395 4396 4396 #ifdef INSTRUMENTATION … … 4427 4427 m_cpt_cleanup_data_dirty_word += r_dcache_dirty_word[(m_dcache_sets*way+set)*m_dcache_words + w]; 4428 4428 } 4429 mask = r_dcache.get_cache_mask(way, set);4430 // std::cout << "found a vcitim ncc dirty mask = " << mask << std::endl;4431 4429 r_dcache_fsm = DCACHE_MISS_DATA; 4432 4430 } … … 4434 4432 { 4435 4433 s_cleanup_updt_data = false; 4436 mask = r_dcache.get_cache_mask(way, set);4437 // std::cout << "found a vcitim ncc non dirty mask = " << mask << std::endl;4438 4434 } 4439 4435 … … 4728 4724 { 4729 4725 r_dcache_fsm = DCACHE_MISS_DIR_UPDT; 4730 r_dcache.reset_cache_mask(r_dcache_miss_way.read(), r_dcache_miss_set.read());4731 4726 } 4732 4727 } … … 5340 5335 int cache_state = r_dcache_cc_state.read(); 5341 5336 bool dirty_save = false; 5342 uint32_t mask = 0;5343 5337 5344 5338 if (r_dcache_cc_need_write.read()) … … 5406 5400 } 5407 5401 5408 mask = r_dcache.get_cache_mask(way, set);5409 // std::cout << "cc inval ncc dirty mask = " << mask << std::endl;5410 5411 5402 r_dcache_fsm = DCACHE_CC_INVAL_DATA; 5412 5403 } … … 5417 5408 CACHE_SLOT_STATE_ZOMBI ); 5418 5409 5419 mask = r_dcache.get_cache_mask(way, set);5420 // std::cout << "cc inval ncc non dirty mask = " << mask << std::endl;5421 5422 5410 r_dcache_cc_cleanup_updt_data = false; 5423 5411 r_dcache_fsm = r_dcache_fsm_cc_save.read();
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