Index: branches/RWT/modules/vci_cc_vcache_wrapper/caba/source/include/vci_cc_vcache_wrapper.h
===================================================================
--- branches/RWT/modules/vci_cc_vcache_wrapper/caba/source/include/vci_cc_vcache_wrapper.h	(revision 538)
+++ branches/RWT/modules/vci_cc_vcache_wrapper/caba/source/include/vci_cc_vcache_wrapper.h	(revision 577)
@@ -311,5 +311,5 @@
 
     // STRUCTURAL PARAMETERS
-    soclib::common::AddressDecodingTable<uint32_t, bool> m_cacheability_table;
+    soclib::common::AddressDecodingTable<uint64_t, bool> m_cacheability_table;
 
     const size_t                        m_srcid;
@@ -403,7 +403,4 @@
     sc_signal<bool>         r_icache_tlb_rsp_error;      // tlb miss response error
 
-    // Filp-Flop in ICACHE FSM for saving the cleanup victim request
-    sc_signal<bool>         r_icache_cleanup_victim_req; 
-    sc_signal<paddr_t>      r_icache_cleanup_victim_nline;
 
     // communication between ICACHE FSM and CC_SEND FSM
@@ -413,4 +410,8 @@
     sc_signal<size_t>       r_icache_cc_send_way;           // ICACHE cc_send way
     sc_signal<size_t>       r_icache_cc_send_updt_tab_idx;  // ICACHE cc_send update table index
+    
+    // Filp-Flop in ICACHE FSM for saving the cleanup victim request
+    sc_signal<bool>         r_icache_cleanup_victim_req; 
+    sc_signal<paddr_t>      r_icache_cleanup_victim_nline;
 
     ///////////////////////////////
Index: branches/RWT/modules/vci_cc_vcache_wrapper/caba/source/src/vci_cc_vcache_wrapper.cpp
===================================================================
--- branches/RWT/modules/vci_cc_vcache_wrapper/caba/source/src/vci_cc_vcache_wrapper.cpp	(revision 538)
+++ branches/RWT/modules/vci_cc_vcache_wrapper/caba/source/src/vci_cc_vcache_wrapper.cpp	(revision 577)
@@ -288,4 +288,7 @@
       r_icache_cc_send_way("r_icache_cc_send_way"),
       r_icache_cc_send_updt_tab_idx("r_icache_cc_send_updt_tab_idx"),
+ 
+      r_icache_cleanup_victim_req("r_icache_cleanup_victim_req"),
+      r_icache_cleanup_victim_nline("r_icache_cleanup_victim_nline"),
 
       r_dcache_fsm("r_dcache_fsm"),
@@ -354,10 +357,7 @@
       r_dcache_xtn_req("r_dcache_xtn_req"),
       r_dcache_xtn_opcode("r_dcache_xtn_opcode"),
- 
+      
       r_dcache_cleanup_victim_req("r_dcache_cleanup_victim_req"),
       r_dcache_cleanup_victim_nline("r_dcache_cleanup_victim_nline"),
-
-      r_icache_cleanup_victim_req("r_icache_cleanup_victim_req"),
-      r_icache_cleanup_victim_nline("r_icache_cleanup_victim_nline"),
   
       r_dcache_cc_send_req("r_dcache_cc_send_req"),
@@ -1219,5 +1219,5 @@
                 // cacheability
                 if ( not (r_mmu_mode.read() & INS_CACHE_MASK) ) cacheable = false;
-                else     cacheable = m_cacheability_table[m_ireq.addr];
+                else     cacheable = m_cacheability_table[(uint64_t)m_ireq.addr];
             }
             else						        // itlb activated
@@ -2296,4 +2296,5 @@
         if ( m_dreq.valid )
         {
+
             if ( r_mmu_mode.read() & DATA_TLB_MASK )  // DTLB activated
             {
@@ -2725,5 +2726,5 @@
 
                     if ( not (r_mmu_mode.read() & DATA_CACHE_MASK) ) cacheable = false;
-                    else cacheable = m_cacheability_table[m_dreq.addr];
+                    else cacheable = m_cacheability_table[(uint64_t)m_dreq.addr];
                 }
                 else 							                   // dtlb activated
@@ -4392,5 +4393,4 @@
             bool     s_cleanup_updt_data = false;
             bool     s_cleanup_line_ncc = false;
-            uint32_t mask = 0;
 
 #ifdef INSTRUMENTATION
@@ -4427,6 +4427,4 @@
                                 m_cpt_cleanup_data_dirty_word += r_dcache_dirty_word[(m_dcache_sets*way+set)*m_dcache_words + w];
                             }
-                            mask = r_dcache.get_cache_mask(way, set);
-                           // std::cout << "found a vcitim ncc dirty mask = " << mask << std::endl;
                             r_dcache_fsm = DCACHE_MISS_DATA;
                         }
@@ -4434,6 +4432,4 @@
                         {
                             s_cleanup_updt_data = false;
-                            mask = r_dcache.get_cache_mask(way, set);
-                           // std::cout << "found a vcitim ncc non dirty mask = " << mask << std::endl;
                         }
 
@@ -4728,5 +4724,4 @@
             {
                 r_dcache_fsm = DCACHE_MISS_DIR_UPDT;
-                r_dcache.reset_cache_mask(r_dcache_miss_way.read(), r_dcache_miss_set.read());
             }
         }
@@ -5340,5 +5335,4 @@
         int      cache_state = r_dcache_cc_state.read();
         bool     dirty_save = false;
-        uint32_t mask = 0;
 
         if (r_dcache_cc_need_write.read())
@@ -5406,7 +5400,4 @@
                         }
 
-                        mask = r_dcache.get_cache_mask(way, set);
-                      //  std::cout << "cc inval ncc dirty mask = " << mask << std::endl;
-
                         r_dcache_fsm          = DCACHE_CC_INVAL_DATA;
                     }
@@ -5417,7 +5408,4 @@
                                             CACHE_SLOT_STATE_ZOMBI );
  
-                        mask = r_dcache.get_cache_mask(way, set);
-                      //  std::cout << "cc inval ncc non dirty mask = " << mask << std::endl;
-
                         r_dcache_cc_cleanup_updt_data = false;
                         r_dcache_fsm = r_dcache_fsm_cc_save.read();
