Ignore:
Timestamp:
Nov 23, 2013, 1:25:13 AM (11 years ago)
Author:
bouyer
Message:

Add some basic DMA capabilities. Passes basic read/write tests.
Can only do line-aligned transfers which are multiple of a cache line in size,
but shouldn't be a strong limitation for real use.

File:
1 edited

Legend:

Unmodified
Added
Removed
  • trunk/modules/vci_spi/include/soclib/vcispi.h

    r573 r579  
    3535    SPI_CTRL,
    3636    SPI_DIVIDER,
    37     SPI_SS
     37    SPI_SS,
     38    SPI_DMA_BASE,
     39    SPI_DMA_BASEH,
     40    SPI_DMA_COUNT
    3841};
    3942
    40 #define SPI_CTRL_CPOL           (1 << 15) /* Clock polarity                */
    41 #define SPI_CTRL_CPHA           (1 << 14) /* Clock phase                   */
    42 #define SPI_CTRL_IE_EN          (1 << 12) /* Interrupt Enable              */
     43#define SPI_CTRL_DMA_BSY        (1 << 16) /* R   DMA in progress              */
     44#define SPI_CTRL_CPOL           (1 << 15) /* R/W Clock polarity               */
     45#define SPI_CTRL_CPHA           (1 << 14) /* R/W Clock phase                  */
     46#define SPI_CTRL_IE_EN          (1 << 12) /* R/W Interrupt Enable             */
    4347// 9-11 reserved
    44 #define SPI_CTRL_GO_BSY         (1 << 8 ) /* Start the transfer            */
    45 #define SPI_CTRL_CHAR_LEN_MASK  (0xFF   ) /* Bits transmited in 1 transfer */
     48#define SPI_CTRL_GO_BSY         (1 << 8 ) /* R/W Start the transfer           */
     49#define SPI_CTRL_CHAR_LEN_MASK  (0xFF   ) /* R/W Bits transmited in 1 transfer*/
     50
     51#define SPI_DMA_COUNT_READ      (1 << 0) /* operation is a read (else write) */
    4652
    4753#endif /* SPISD_H */
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