Index: /trunk/modules/vci_cc_vcache_wrapper/caba/source/src/vci_cc_vcache_wrapper.cpp
===================================================================
--- /trunk/modules/vci_cc_vcache_wrapper/caba/source/src/vci_cc_vcache_wrapper.cpp	(revision 582)
+++ /trunk/modules/vci_cc_vcache_wrapper/caba/source/src/vci_cc_vcache_wrapper.cpp	(revision 583)
@@ -4646,51 +4646,36 @@
         paddr_t  mask = ~((m_dcache_words<<2)-1);
 
+        // CLACK handler
+        // We switch the directory slot to EMPTY state and reset
+        // r_dcache_miss_clack if the cleanup ack is matching a pending miss.
+        if ( r_dcache_clack_req.read() )
+        {
+            if ( m_dreq.valid ) m_cost_data_miss_frz++;
+
+#ifdef INSTRUMENTATION
+m_cpt_dcache_dir_write++;
+#endif
+            r_dcache.write_dir( 0,
+                                r_dcache_clack_way.read(),
+                                r_dcache_clack_set.read(),
+                                CACHE_SLOT_STATE_EMPTY);
+
+            if ( (r_dcache_miss_set.read() == r_dcache_clack_set.read()) and
+                 (r_dcache_miss_way.read() == r_dcache_clack_way.read()) )
+            {
+                  r_dcache_miss_clack = false;
+            }
+
+            r_dcache_clack_req = false;
+
+            // return to cc_save state
+            r_dcache_fsm = r_dcache_fsm_cc_save.read() ;
+
 #if DEBUG_DCACHE
 if ( m_debug_activated )
 {
     std::cout << "  <PROC " << name()
-              << " DCACHE_CC_CHECK> paddr = " << paddr
-              << " r_dcache_vci_paddr = " << r_dcache_vci_paddr.read()
-              << " mask = " << mask 
-              << " (r_dcache_fsm_cc_save == DCACHE_MISS_WAIT) = " 
-              << (r_dcache_fsm_cc_save == DCACHE_MISS_WAIT)
-              << " (r_dcache_fsm_cc_save == DCACHE_MISS_DIR_UPDT) = " 
-              << (r_dcache_fsm_cc_save == DCACHE_MISS_DIR_UPDT)
-              << " ((r_dcache_vci_paddr.read() & mask) == (paddr & mask)) = " 
-              << ((r_dcache_vci_paddr.read() & mask) == (paddr & mask))
-              <<std::endl;
-}
-#endif
-        // CLACK handler
-        // We switch the directory slot to EMPTY state and reset
-        // r_dcache_miss_clack if the cleanup ack is matching a pending miss.
-        if ( r_dcache_clack_req.read() )
-        {
-            if ( m_dreq.valid ) m_cost_data_miss_frz++;
-
-#ifdef INSTRUMENTATION
-m_cpt_dcache_dir_write++;
-#endif
-            r_dcache.write_dir( 0,
-                                r_dcache_clack_way.read(),
-                                r_dcache_clack_set.read(),
-                                CACHE_SLOT_STATE_EMPTY);
-
-            if ( (r_dcache_miss_set.read() == r_dcache_clack_set.read()) and
-                 (r_dcache_miss_way.read() == r_dcache_clack_way.read()) )
-            {
-                  r_dcache_miss_clack = false;
-            }
-
-            r_dcache_clack_req = false;
-
-            // return to cc_save state
-            r_dcache_fsm = r_dcache_fsm_cc_save.read() ;
-
-#if DEBUG_DCACHE
-if ( m_debug_activated )
-{
-    std::cout << "  <PROC " << name()
-              << " DCACHE_CC_CHECK> CC_TYPE_CLACK Switch slot to EMPTY state"
+              << " DCACHE_CC_CHECK> CLACK for PADDR " << paddr
+              << " Switch slot to EMPTY state : "
               << " set = " << r_dcache_clack_set.read()
               << " / way = " << r_dcache_clack_way.read() << std::endl;
@@ -4700,5 +4685,6 @@
         }
 
-        assert ( not r_dcache_cc_send_req.read() and "CC_SEND must be available in DCACHE_CC_CHECK" );
+        assert ( not r_dcache_cc_send_req.read() and 
+        "CC_SEND must be available in DCACHE_CC_CHECK" );
 
         // Match between MISS address and CC address
