Ignore:
Timestamp:
Dec 4, 2013, 7:51:10 PM (11 years ago)
Author:
alain
Message:

debug...

File:
1 edited

Legend:

Unmodified
Added
Removed
  • trunk/modules/vci_io_bridge/caba/source/include/vci_io_bridge.h

    r434 r585  
    2828// This TSAR component is a bridge to access external peripherals
    2929// connected to an external I/O bus (such as Hypertransport or PCIe).
    30 // AT the moment, the external I/O bus is modeled by a VCI VGMN component.
    3130// It connects three VCI networks:
     31//
    3232// - INT network : to receive both configuration requests from processors
    3333//                 or software driven data access to peripherals.
     
    4040// an - optional - IOMMU service : the 32 bits virtual address is translated
    4141// to a (up to) 40 bits physical address by a standard SoCLib generic TLB.
    42 // In case of TLB MISS, the DMA is stalled until the TLB is updated.
     42// In case of TLB MISS, the DMA transaction is stalled until the TLB is updated.
    4343// In case of page fault (illegal access), a VCI error is returned to the
    4444// faulty peripheral.
     
    4646//   General Constraints:
    4747//
    48 // - All VCI fields have the same widths on the EXT and IOX networks.
    49 // - Only the VCI DATA field can differ between INT and EXT networks,
    50 //   and the width must be 32 or 64 bits.
     48// - All VCI fields have the same widths on the RAM and IOX networks,
     49//   and the VCI DATA field is 64 bits.
     50// - Only the VCI DATA field differ between INT and IOX/RAM networks,
     51//   as the VCI DATA field is 32 bits.
    5152// - The common VCI ADDRESS width cannot be larger than 64 bits.
    5253// - All VCI transactions must be included in a single cache line.
    5354// - Page Tables must have the format required by the SoCLib generic_tlb.
    5455// - IO's segments must be the same in INT and IOX networks
    55 // - Write operations on IOMMU configuration registers (PTPR, ACTIVE) can only
    56 //   be done when DMA_TLB FSM is IDLE. It should, preferably, be done before
     56// - Write operations on IOMMU configuration registers (PTPR, ACTIVE) are
     57//   delayed until DMA_TLB FSM is IDLE. It should, preferably, be done before
    5758//   starting any transfers. Pseudo register INVAL may be modified any time.
    5859////////////////////////////////////////////////////////////////////////////////
     
    9394    : public soclib::caba::BaseModule
    9495{
    95     // Data field can have different widths on INT and EXT networks
    96     typedef typename vci_param_ext::fast_data_t     ext_data_t;
    97     typedef typename vci_param_int::fast_data_t     int_data_t;
     96    // Data and be fields have different widths on INT and EXT networks
     97    typedef typename vci_param_ext::data_t          ext_data_t;
     98    typedef typename vci_param_int::data_t          int_data_t;
     99    typedef typename vci_param_ext::be_t            ext_be_t;
     100    typedef typename vci_param_int::be_t            ext_in_t;
    98101
    99102    // Other fields must be equal   
    100103    typedef typename vci_param_int::fast_addr_t     vci_addr_t;
    101104    typedef typename vci_param_int::srcid_t         vci_srcid_t; 
    102     typedef typename vci_param_int::be_t            vci_be_t;
    103105    typedef typename vci_param_int::trdid_t         vci_trdid_t;
    104106    typedef typename vci_param_int::pktid_t         vci_pktid_t;
     
    161163    { 
    162164        CONFIG_CMD_IDLE,
    163         CONFIG_CMD_FIFO_PUT_CMD,
    164         CONFIG_CMD_FIFO_PUT_RSP,
     165        CONFIG_CMD_NEXT,
     166        CONFIG_CMD_PUT,
     167        CONFIG_CMD_RSP,
    165168        };
    166169   
     
    169172    { 
    170173        CONFIG_RSP_IDLE,
    171         CONFIG_RSP_FIFO_PUT,
     174        CONFIG_RSP_PUT_LO,
     175        CONFIG_RSP_PUT_HI,
     176        CONFIG_RSP_PUT_UNC,
    172177    };
    173178   
     
    241246    sc_signal<uint32_t>         r_iommu_etr;            // iommu error type
    242247    sc_signal<uint32_t>         r_iommu_bad_id;         // SRCID of faulty peripheral
    243     sc_signal<uint32_t>         r_iommu_wti_enable;     // enable WTI transactions when true
     248    sc_signal<uint32_t>         r_iommu_wti_enable;     // enable WTI transactions
    244249    sc_signal<vci_addr_t>       r_iommu_wti_paddr;      // address of IOMMU WTI
    245250    sc_signal<vci_addr_t>*      r_iommu_peri_wti;       // array[32] WTI for peripherals
     
    264269    sc_signal<bool>             r_config_cmd_error;
    265270    sc_signal<uint32_t>         r_config_cmd_inval_vaddr;
    266    
     271
     272    sc_signal<ext_data_t>       r_config_cmd_wdata;
     273    sc_signal<ext_be_t>         r_config_cmd_be;
     274    sc_signal<vci_plen_t>       r_config_cmd_cmd;
     275    sc_signal<vci_addr_t>       r_config_cmd_address;
     276    sc_signal<vci_srcid_t>      r_config_cmd_srcid;
     277    sc_signal<vci_pktid_t>      r_config_cmd_pktid;
     278    sc_signal<vci_trdid_t>      r_config_cmd_trdid;
     279    sc_signal<vci_plen_t>       r_config_cmd_plen;
     280    sc_signal<vci_clen_t>       r_config_cmd_clen;
     281    sc_signal<vci_cons_t>       r_config_cmd_cons;
     282    sc_signal<vci_contig_t>     r_config_cmd_contig;
     283    sc_signal<vci_cfixed_t>     r_config_cmd_cfixed;
     284    sc_signal<vci_wrap_t>       r_config_cmd_wrap;
     285    sc_signal<vci_eop_t>        r_config_cmd_eop;
     286
    267287    ///////////////////////////////////
    268288    // CONFIG_RSP FSM REGISTERS
     
    342362    GenericFifo<vci_trdid_t>    m_dma_cmd_trdid_fifo;
    343363    GenericFifo<vci_pktid_t>    m_dma_cmd_pktid_fifo;
    344     GenericFifo<vci_be_t>       m_dma_cmd_be_fifo;
     364    GenericFifo<ext_be_t>       m_dma_cmd_be_fifo;
    345365    GenericFifo<vci_cmd_t>      m_dma_cmd_cmd_fifo;
    346366    GenericFifo<vci_contig_t>   m_dma_cmd_contig_fifo;
     
    366386    GenericFifo<vci_trdid_t>    m_config_cmd_trdid_fifo;
    367387    GenericFifo<vci_pktid_t>    m_config_cmd_pktid_fifo;
    368     GenericFifo<vci_be_t>       m_config_cmd_be_fifo;
     388    GenericFifo<ext_be_t>       m_config_cmd_be_fifo;
    369389    GenericFifo<vci_cmd_t>      m_config_cmd_cmd_fifo;
    370390    GenericFifo<vci_contig_t>   m_config_cmd_contig_fifo;
Note: See TracChangeset for help on using the changeset viewer.