Index: trunk/modules/vci_io_bridge/caba/source/include/vci_io_bridge.h =================================================================== --- trunk/modules/vci_io_bridge/caba/source/include/vci_io_bridge.h (revision 584) +++ trunk/modules/vci_io_bridge/caba/source/include/vci_io_bridge.h (revision 585) @@ -28,6 +28,6 @@ // This TSAR component is a bridge to access external peripherals // connected to an external I/O bus (such as Hypertransport or PCIe). -// AT the moment, the external I/O bus is modeled by a VCI VGMN component. // It connects three VCI networks: +// // - INT network : to receive both configuration requests from processors // or software driven data access to peripherals. @@ -40,5 +40,5 @@ // an - optional - IOMMU service : the 32 bits virtual address is translated // to a (up to) 40 bits physical address by a standard SoCLib generic TLB. -// In case of TLB MISS, the DMA is stalled until the TLB is updated. +// In case of TLB MISS, the DMA transaction is stalled until the TLB is updated. // In case of page fault (illegal access), a VCI error is returned to the // faulty peripheral. @@ -46,13 +46,14 @@ // General Constraints: // -// - All VCI fields have the same widths on the EXT and IOX networks. -// - Only the VCI DATA field can differ between INT and EXT networks, -// and the width must be 32 or 64 bits. +// - All VCI fields have the same widths on the RAM and IOX networks, +// and the VCI DATA field is 64 bits. +// - Only the VCI DATA field differ between INT and IOX/RAM networks, +// as the VCI DATA field is 32 bits. // - The common VCI ADDRESS width cannot be larger than 64 bits. // - All VCI transactions must be included in a single cache line. // - Page Tables must have the format required by the SoCLib generic_tlb. // - IO's segments must be the same in INT and IOX networks -// - Write operations on IOMMU configuration registers (PTPR, ACTIVE) can only -// be done when DMA_TLB FSM is IDLE. It should, preferably, be done before +// - Write operations on IOMMU configuration registers (PTPR, ACTIVE) are +// delayed until DMA_TLB FSM is IDLE. It should, preferably, be done before // starting any transfers. Pseudo register INVAL may be modified any time. //////////////////////////////////////////////////////////////////////////////// @@ -93,12 +94,13 @@ : public soclib::caba::BaseModule { - // Data field can have different widths on INT and EXT networks - typedef typename vci_param_ext::fast_data_t ext_data_t; - typedef typename vci_param_int::fast_data_t int_data_t; + // Data and be fields have different widths on INT and EXT networks + typedef typename vci_param_ext::data_t ext_data_t; + typedef typename vci_param_int::data_t int_data_t; + typedef typename vci_param_ext::be_t ext_be_t; + typedef typename vci_param_int::be_t ext_in_t; // Other fields must be equal typedef typename vci_param_int::fast_addr_t vci_addr_t; typedef typename vci_param_int::srcid_t vci_srcid_t; - typedef typename vci_param_int::be_t vci_be_t; typedef typename vci_param_int::trdid_t vci_trdid_t; typedef typename vci_param_int::pktid_t vci_pktid_t; @@ -161,6 +163,7 @@ { CONFIG_CMD_IDLE, - CONFIG_CMD_FIFO_PUT_CMD, - CONFIG_CMD_FIFO_PUT_RSP, + CONFIG_CMD_NEXT, + CONFIG_CMD_PUT, + CONFIG_CMD_RSP, }; @@ -169,5 +172,7 @@ { CONFIG_RSP_IDLE, - CONFIG_RSP_FIFO_PUT, + CONFIG_RSP_PUT_LO, + CONFIG_RSP_PUT_HI, + CONFIG_RSP_PUT_UNC, }; @@ -241,5 +246,5 @@ sc_signal r_iommu_etr; // iommu error type sc_signal r_iommu_bad_id; // SRCID of faulty peripheral - sc_signal r_iommu_wti_enable; // enable WTI transactions when true + sc_signal r_iommu_wti_enable; // enable WTI transactions sc_signal r_iommu_wti_paddr; // address of IOMMU WTI sc_signal* r_iommu_peri_wti; // array[32] WTI for peripherals @@ -264,5 +269,20 @@ sc_signal r_config_cmd_error; sc_signal r_config_cmd_inval_vaddr; - + + sc_signal r_config_cmd_wdata; + sc_signal r_config_cmd_be; + sc_signal r_config_cmd_cmd; + sc_signal r_config_cmd_address; + sc_signal r_config_cmd_srcid; + sc_signal r_config_cmd_pktid; + sc_signal r_config_cmd_trdid; + sc_signal r_config_cmd_plen; + sc_signal r_config_cmd_clen; + sc_signal r_config_cmd_cons; + sc_signal r_config_cmd_contig; + sc_signal r_config_cmd_cfixed; + sc_signal r_config_cmd_wrap; + sc_signal r_config_cmd_eop; + /////////////////////////////////// // CONFIG_RSP FSM REGISTERS @@ -342,5 +362,5 @@ GenericFifo m_dma_cmd_trdid_fifo; GenericFifo m_dma_cmd_pktid_fifo; - GenericFifo m_dma_cmd_be_fifo; + GenericFifo m_dma_cmd_be_fifo; GenericFifo m_dma_cmd_cmd_fifo; GenericFifo m_dma_cmd_contig_fifo; @@ -366,5 +386,5 @@ GenericFifo m_config_cmd_trdid_fifo; GenericFifo m_config_cmd_pktid_fifo; - GenericFifo m_config_cmd_be_fifo; + GenericFifo m_config_cmd_be_fifo; GenericFifo m_config_cmd_cmd_fifo; GenericFifo m_config_cmd_contig_fifo; Index: trunk/modules/vci_io_bridge/caba/source/src/vci_io_bridge.cpp =================================================================== --- trunk/modules/vci_io_bridge/caba/source/src/vci_io_bridge.cpp (revision 584) +++ trunk/modules/vci_io_bridge/caba/source/src/vci_io_bridge.cpp (revision 585) @@ -83,6 +83,7 @@ { "CONFIG_CMD_IDLE", - "CONFIG_CMD_FIFO_PUT_CMD", - "CONFIG_CMD_FIFO_PUT_RSP", + "CONFIG_CMD_NEXT", + "CONFIG_CMD_PUT", + "CONFIG_CMD_RSP", }; @@ -90,5 +91,7 @@ { "CONFIG_RSP_IDLE", - "CONFIG_RSP_FIFO_PUT", + "CONFIG_RSP_PUT_LO", + "CONFIG_RSP_PUT_HI", + "CONFIG_RSP_PUT_UNC", }; @@ -170,4 +173,18 @@ r_config_cmd_error("r_config_cmd_error"), r_config_cmd_inval_vaddr("r_config_cmd_inval_vaddr"), + r_config_cmd_wdata("r_config_cmd_wdata"), + r_config_cmd_be("r_config_cmd_be"), + r_config_cmd_cmd("r_config_cmd_wdata"), + r_config_cmd_address("r_config_cmd_address"), + r_config_cmd_srcid("r_config_cmd_srcid"), + r_config_cmd_pktid("r_config_cmd_pktid"), + r_config_cmd_trdid("r_config_cmd_trdid"), + r_config_cmd_plen("r_config_cmd_plen"), + r_config_cmd_clen("r_config_cmd_clen"), + r_config_cmd_cons("r_config_cmd_cons"), + r_config_cmd_contig("r_config_cmd_contig"), + r_config_cmd_cfixed("r_config_cmd_cfixed"), + r_config_cmd_wrap("r_config_cmd_wrap"), + r_config_cmd_eop("r_config_cmd_eop"), // CONFIG_RSP FSM registers @@ -294,9 +311,9 @@ "VCI_IO_BRIDGE ERROR: VCI ADDRESS width cannot be bigger than 64 bits"); - assert( ((vci_param_int::B == 4) or (vci_param_int::B == 8)) and - "VCI_IO_BRIDGE ERROR: VCI DATA width must be 32 or 64 bits on internal network"); - - assert( ((vci_param_ext::B == 4) or (vci_param_ext::B == 8)) and - "VCI_IO_BRIDGE ERROR: VCI DATA width must be 32 or 64 bits on external network"); + assert( (vci_param_int::B == 4) and + "VCI_IO_BRIDGE ERROR: VCI DATA width must be 32 bits on internal network"); + + assert( (vci_param_ext::B == 8) and + "VCI_IO_BRIDGE ERROR: VCI DATA width must be 64 bits on external network"); assert( (vci_param_int::S == vci_param_ext::S) and @@ -525,5 +542,13 @@ #if DEBUG_DMA_CMD if( m_debug_activated ) -std::cout << " IOMMU not activated" << std::endl; +std::cout << " @@@ dma command" << std::endl + << " address = " << std::hex << p_vci_tgt_iox.address.read() + << " / srcid = " << p_vci_tgt_iox.srcid.read() + << " / trdid = " << p_vci_tgt_iox.trdid.read() + << " / wdata = " << std::hex << p_vci_tgt_iox.wdata.read() + << " / be = " << p_vci_tgt_iox.be.read() + << " / plen = " << std::dec << p_vci_tgt_iox.plen.read() + << " / eop = " << p_vci_tgt_iox.eop.read() << std::endl; + #endif // put DMA transaction into DMA_CMD fifo @@ -1214,6 +1239,7 @@ //////////////////////////////////////////////////////////////////////////////// // The CONFIG_CMD_FSM handles the VCI commands from the INT network. - // This FSM is mainly intended to handle single flit config transactions, - // but it can also handle software driven, multi-flits data transactions. + // This FSM can handle single flit config transactions, but it can also handle + // software driven, multi-flits data transactions to ROM (read) or FBF (write). + // The write burst transactions must be serialised from 32 to 64 bits width. // The configuration requests can be local (IO_BRIDGE config registers) // or remote (config registers of peripherals on IOX network). @@ -1222,5 +1248,6 @@ // - In case of local config request, or in case of segmentation violation, // the FSM put a VCI response request in CONFIG_RSP fifo. - // - In case of remote transaction, it put the VCI command in CONFIG_CMD fifo. + // - In case of remote transaction, it put the VCI command in CONFIG_CMD fifo, + // and this require two cycles per IOX flit in case of write burst. /////////////////////////////////////////////////////////////////////////////// @@ -1228,5 +1255,5 @@ { ///////////////////// - case CONFIG_CMD_IDLE: // waiting VCI command + case CONFIG_CMD_IDLE: // A VCI INT command is always consumed in this state { if ( p_vci_tgt_int.cmdval.read() ) @@ -1235,7 +1262,7 @@ #if DEBUG_CONFIG_CMD if( m_debug_activated ) -std::cout << " Command received" - << " / address = " << std::hex << p_vci_tgt_int.address.read() - << " / srcid = " << std::dec << p_vci_tgt_int.srcid.read() +std::cout << " ### Config Command received" << std::endl + << " address = " << std::hex << p_vci_tgt_int.address.read() + << " / srcid = " << p_vci_tgt_int.srcid.read() << " / trdid = " << p_vci_tgt_int.trdid.read() << " / wdata = " << std::hex << p_vci_tgt_int.wdata.read() @@ -1247,5 +1274,7 @@ bool read = (p_vci_tgt_int.cmd.read() == vci_param_int::CMD_READ); uint32_t cell = (uint32_t)((paddr & 0x1FF)>>2); - + bool eop = p_vci_tgt_int.eop.read(); + bool high = (paddr & 0x4); + // chek segments std::list::iterator seg; @@ -1264,6 +1293,11 @@ if ( found and special ) // IO_BRIDGE itself { - uint32_t rdata = 0; - bool rerror = false; + bool rerror = false; + + assert( (p_vci_tgt_int.be.read() == 0xF) and + "ERROR in vci_io_bridge : BE != 0xF for a config access"); + + assert( ( eop ) and + "ERROR in vci_io_bridge : local config access must be one flit"); if ( not read && (cell == IOB_IOMMU_PTPR) ) // WRITE PTPR @@ -1273,5 +1307,5 @@ else if ( read && (cell == IOB_IOMMU_PTPR) ) // READ PTPR { - rdata = r_iommu_ptpr.read(); + r_config_cmd_rdata = r_iommu_ptpr.read(); } else if( not read && (cell == IOB_WTI_ENABLE)) // WRITE WTI_ENABLE @@ -1281,17 +1315,17 @@ else if( read && (cell == IOB_WTI_ENABLE)) // READ WTI ENABLE { - rdata = r_iommu_wti_enable.read(); + r_config_cmd_rdata = r_iommu_wti_enable.read(); } else if( read && (cell == IOB_IOMMU_BVAR)) // READ BVAR { - rdata = r_iommu_bvar.read(); + r_config_cmd_rdata = r_iommu_bvar.read(); } else if( read && (cell == IOB_IOMMU_ETR)) // READ ETR { - rdata = r_iommu_etr.read(); + r_config_cmd_rdata = r_iommu_etr.read(); } else if( read && (cell == IOB_IOMMU_BAD_ID)) // READ BAD_ID { - rdata = r_iommu_bad_id.read(); + r_config_cmd_rdata = r_iommu_bad_id.read(); } else if( not read && (cell == IOB_INVAL_PTE)) // WRITE INVAL_PTE @@ -1306,5 +1340,5 @@ else if( read && (cell == IOB_WTI_ADDR_LO)) // READ WTI_PADDR_LO { - rdata = (uint32_t)r_iommu_wti_paddr.read(); + r_config_cmd_rdata = (uint32_t)r_iommu_wti_paddr.read(); } else if( not read && (cell == IOB_WTI_ADDR_HI)) // WRITE WTI_PADDR_HI @@ -1315,5 +1349,5 @@ else if( read && (cell == IOB_WTI_ADDR_HI)) // READ WTI_PADDR_HI { - rdata = (uint32_t)(r_iommu_wti_paddr.read()>>32); + r_config_cmd_rdata = (uint32_t)(r_iommu_wti_paddr.read()>>32); } else if( not read && ((cell >= IOB_PERI_WTI_BEGIN) // WRITE PERI WTI @@ -1333,6 +1367,8 @@ size_t index = (cell - IOB_PERI_WTI_BEGIN)/2; bool high = (cell - IOB_PERI_WTI_BEGIN)%2; - if ( high ) rdata = (uint32_t)(r_iommu_peri_wti[index].read()>>32); - else rdata = (uint32_t)(r_iommu_peri_wti[index].read()); + if ( high ) r_config_cmd_rdata = + (uint32_t)(r_iommu_peri_wti[index].read()>>32); + else r_config_cmd_rdata = + (uint32_t)(r_iommu_peri_wti[index].read()); } else // Error: Wrong address, or invalid operation. @@ -1340,48 +1376,114 @@ rerror = true; } - r_config_cmd_rdata = rdata; r_config_cmd_error = rerror; - r_config_cmd_fsm = CONFIG_CMD_FIFO_PUT_RSP; + r_config_cmd_fsm = CONFIG_CMD_RSP; } else if ( found ) // remote peripheral { - r_config_cmd_fsm = CONFIG_CMD_FIFO_PUT_CMD; - } - else // out of segment - { - r_config_cmd_rdata = 0; + r_config_cmd_address = p_vci_tgt_int.address.read(); + r_config_cmd_srcid = p_vci_tgt_int.srcid.read(); + r_config_cmd_trdid = p_vci_tgt_int.trdid.read(); + r_config_cmd_pktid = p_vci_tgt_int.pktid.read(); + r_config_cmd_pktid = p_vci_tgt_int.pktid.read(); + r_config_cmd_plen = p_vci_tgt_int.plen.read(); + r_config_cmd_cmd = p_vci_tgt_int.cmd.read(); + r_config_cmd_cons = p_vci_tgt_int.cons.read(); + r_config_cmd_clen = p_vci_tgt_int.clen.read(); + r_config_cmd_wrap = p_vci_tgt_int.wrap.read(); + r_config_cmd_contig = p_vci_tgt_int.contig.read(); + r_config_cmd_cfixed = p_vci_tgt_int.cfixed.read(); + + if( eop ) // single flit command + { + if ( high ) // HI word + { + r_config_cmd_wdata = ((ext_data_t)p_vci_tgt_int.wdata.read())<<32; + r_config_cmd_be = ((ext_be_t)p_vci_tgt_int.be.read())<<4; + r_config_cmd_eop = true; + r_config_cmd_fsm = CONFIG_CMD_PUT; + } + else // LO word + { + r_config_cmd_wdata = ((ext_data_t)p_vci_tgt_int.wdata.read()); + r_config_cmd_be = ((ext_be_t)p_vci_tgt_int.be.read()); + r_config_cmd_eop = true; + r_config_cmd_fsm = CONFIG_CMD_PUT; + } + } + else // multi-flits write + { + if ( high ) // MSB word + { + r_config_cmd_wdata = ((ext_data_t)p_vci_tgt_int.wdata.read())<<32; + r_config_cmd_be = ((ext_be_t)p_vci_tgt_int.be.read())<<4; + r_config_cmd_eop = false; + r_config_cmd_fsm = CONFIG_CMD_PUT; + } + else // LSB word + { + r_config_cmd_wdata = ((ext_data_t)p_vci_tgt_int.wdata.read()); + r_config_cmd_be = ((ext_be_t)p_vci_tgt_int.be.read()); + r_config_cmd_eop = false; + r_config_cmd_fsm = CONFIG_CMD_NEXT; + } + } + } + else // out of segment address + { + r_config_cmd_rdata = 0; r_config_cmd_error = true; - r_config_cmd_fsm = CONFIG_CMD_FIFO_PUT_RSP; + if( eop ) r_config_cmd_fsm = CONFIG_CMD_RSP; } } // end if cmdval break; } - ///////////////////////////// - case CONFIG_CMD_FIFO_PUT_CMD: // transmit VCI command from the INT network - // to the CONFIG_CMD fifo to IOX network + ///////////////////// + case CONFIG_CMD_NEXT: // Consume the second flit for a multi-flits write + { + if ( p_vci_tgt_int.cmdval.read() ) + { + vci_addr_t paddr = p_vci_tgt_int.address.read(); + bool high = (paddr & 0x4 == 0x4); + bool eop = p_vci_tgt_int.eop.read(); + + assert( (paddr == r_config_cmd_address.read() + 4) and high and + "ERROR in vci_io_bridge : addresses must be contiguous in write burst" ); + + r_config_cmd_wdata = r_config_cmd_wdata.read() | + ((ext_data_t)p_vci_tgt_int.wdata.read()<<32); + r_config_cmd_be = r_config_cmd_be.read() | + ((ext_be_t)p_vci_tgt_int.be.read()<<4); + r_config_cmd_eop = eop; + r_config_cmd_fsm = CONFIG_CMD_PUT; + } + break; + } + //////////////////// + case CONFIG_CMD_PUT: // try to post a command to CONFIG_CMD fifo (to IOX network) { config_cmd_fifo_put = true; - if ( p_vci_tgt_int.cmdval.read() and m_config_cmd_addr_fifo.wok() ) + if ( m_config_cmd_addr_fifo.wok() ) { #if DEBUG_CONFIG_CMD if( m_debug_activated ) -std::cout << " Transmit VCI command to IOX network" - << " : address = " << std::hex << p_vci_tgt_int.address.read() - << " / srcid = " << p_vci_tgt_int.srcid.read() +std::cout << " Transmit VCI command to IOX network" + << " : address = " << std::hex << r_config_cmd_address.read() + << " / srcid = " << r_config_cmd_srcid.read() + << " / eop = " << r_config_cmd_eop.read() << std::endl; #endif - if( p_vci_tgt_int.eop.read() ) r_config_cmd_fsm = CONFIG_CMD_IDLE; - } - break; - } - ///////////////////////////// - case CONFIG_CMD_FIFO_PUT_RSP: // Try to put a response in CONFIG_RSP fifo, - // for a local configuration transaction. - // The FIFO is shared with CONFIG_RSP FSM - // and must we wait for allocation... - { - if ( p_vci_tgt_int.cmdval.read() and r_alloc_fifo_config_rsp_local.read() ) + r_config_cmd_fsm = CONFIG_CMD_IDLE; + } + break; + } + //////////////////// + case CONFIG_CMD_RSP: // Try to put a response in CONFIG_RSP fifo, for + // a local configuration transaction or a segment error. + // The FIFO is shared with CONFIG_RSP FSM + // and must we wait for allocation... + { + if ( r_alloc_fifo_config_rsp_local.read() ) { config_rsp_fifo_put = true; @@ -1392,8 +1494,8 @@ #if DEBUG_CONFIG_CMD if( m_debug_activated ) -std::cout << " Response to a local configuration request" +std::cout << " Response to a local configuration request" << std::endl; #endif - if( p_vci_tgt_int.eop.read() ) r_config_cmd_fsm = CONFIG_CMD_IDLE; + r_config_cmd_fsm = CONFIG_CMD_IDLE; } } @@ -1403,9 +1505,11 @@ ////////////////////////////////////////////////////////////////////////////// - // The CONFIG_RSP_FSM handles the VCI responses from the periherals + // The CONFIG_RSP_FSM handles the 64 bits VCI responses from the periherals // on the IOX network and writes the responses in the CONFIG_RSP fifo. - // The VCI response flit is only consumed in the FIFO_PUT state. - // This FSM is mainly intended to handle single flit config transactions, - // but it can also handle software driven, multi-flits data transactions. + // This FSM handle both single flit config responses, and multi-flits + // read responses (ROM), where data must be serialised (64 bits -> 32 bits). + // Note: We use the VCI RPKTID field to distinguish between read cached + // (multi-flits response) and others (single flit response). + // The VCI response flit is only consumed in the PUT_UNC or PUT_HI states. ////////////////////////////////////////////////////////////////////////////// @@ -1414,34 +1518,83 @@ ///////////////////// case CONFIG_RSP_IDLE: // waiting a VCI response from IOX network + // flit on IOX network is not consumed { if ( p_vci_ini_iox.rspval.read() ) { - r_config_rsp_fsm = CONFIG_RSP_FIFO_PUT; + if ( (p_vci_ini_iox.rpktid.read() & 0x5) == 0x1 ) // multi-flits response + { + r_config_rsp_fsm = CONFIG_RSP_PUT_LO; + } + else // single flit response + { + r_config_rsp_fsm = CONFIG_RSP_PUT_UNC; + + assert( p_vci_ini_iox.reop.read() and + "ERROR in vci_io_bridge : a remote config response should be one flit"); + } } break; } - ///////////////////////// - case CONFIG_RSP_FIFO_PUT: // try to write into CONFIG_RSP fifo - // as soon as it is allocated - { - if ( p_vci_ini_iox.rspval.read() and not r_alloc_fifo_config_rsp_local.read() ) - { - config_rsp_fifo_put = true; - - if ( m_config_rsp_data_fifo.wok() ) - { - if ( p_vci_ini_iox.reop.read() ) r_config_rsp_fsm = CONFIG_RSP_IDLE; + /////////////////////// + case CONFIG_RSP_PUT_LO: // try to write 32 low bits into CONFIG_RSP fifo + // flit on IOX network is not consumed + { + if ( not r_alloc_fifo_config_rsp_local.read() and m_config_rsp_data_fifo.wok() ) + { + r_config_rsp_fsm = CONFIG_RSP_PUT_HI; #if DEBUG_CONFIG_RSP if( m_debug_activated ) -std::cout << " Push response into CONFIG_RSP fifo:" +std::cout << " Push multi-flit response into CONFIG_RSP fifo:" << " / rsrcid = " << std::hex << p_vci_ini_iox.rsrcid.read() << " / rtrdid = " << p_vci_ini_iox.rtrdid.read() - << " / rdata = " << p_vci_ini_iox.rdata.read() + << " / rpktid = " << p_vci_ini_iox.rpktid.read() + << " / rdata = " << (uint32_t)p_vci_ini_iox.rdata.read() + << " / reop = " << false + << " / rerror = " << p_vci_ini_iox.rerror.read() << std::endl; +#endif + } + break; + } + /////////////////////// + case CONFIG_RSP_PUT_HI: // try to write 32 high bits into CONFIG_RSP fifo + // flit on IOX network is consumed if success + { + if ( not r_alloc_fifo_config_rsp_local.read() and m_config_rsp_data_fifo.wok() ) + { + if( p_vci_ini_iox.reop.read() ) r_config_rsp_fsm = CONFIG_RSP_IDLE; + else r_config_rsp_fsm = CONFIG_RSP_PUT_LO; + +#if DEBUG_CONFIG_RSP +if( m_debug_activated ) +std::cout << " Push multi-flit response into CONFIG_RSP fifo:" + << " / rsrcid = " << std::hex << p_vci_ini_iox.rsrcid.read() + << " / rtrdid = " << p_vci_ini_iox.rtrdid.read() + << " / rpktid = " << p_vci_ini_iox.rpktid.read() + << " / rdata = " << (uint32_t)(p_vci_ini_iox.rdata.read()>>32) << " / reop = " << p_vci_ini_iox.reop.read() << " / rerror = " << p_vci_ini_iox.rerror.read() << std::endl; #endif - } - + } + break; + } + //////////////////////// + case CONFIG_RSP_PUT_UNC: // try to write single flit into CONFIG_RSP fifo + // flit on IOX network is consumed if success + { + if ( not r_alloc_fifo_config_rsp_local.read() and m_config_rsp_data_fifo.wok() ) + { + r_config_rsp_fsm = CONFIG_RSP_IDLE; + +#if DEBUG_CONFIG_RSP +if( m_debug_activated ) +std::cout << " Push single flit response into CONFIG_RSP fifo:" + << " / rsrcid = " << std::hex << p_vci_ini_iox.rsrcid.read() + << " / rtrdid = " << p_vci_ini_iox.rtrdid.read() + << " / rpktid = " << p_vci_ini_iox.rpktid.read() + << " / rdata = " << (uint32_t)p_vci_ini_iox.rdata.read() + << " / reop = " << true + << " / rerror = " << p_vci_ini_iox.rerror.read() << std::endl; +#endif } break; @@ -1575,5 +1728,5 @@ assert( ( (p_vci_ini_int.rerror.read()&0x1) == 0 ) and "VCI_IO_BRIDGE ERROR: IRQ Write response error !!!" ); - // TODO traiter error using the IOMMU IRQ + // TODO handling error when using the IOMMU IRQ #if DEBUG_MISS_WTI @@ -1641,12 +1794,12 @@ if ( r_alloc_fifo_config_rsp_local.read() ) { - if ( (r_config_rsp_fsm.read() == CONFIG_RSP_FIFO_PUT) and - (r_config_cmd_fsm.read() != CONFIG_CMD_FIFO_PUT_RSP) ) + if ( (r_config_rsp_fsm.read() != CONFIG_RSP_IDLE) and // config_rsp_fsm requiring + (r_config_cmd_fsm.read() != CONFIG_CMD_RSP) ) // config_cmd_fsm not requiring r_alloc_fifo_config_rsp_local = false; } else { - if ( (r_config_cmd_fsm.read() == CONFIG_CMD_FIFO_PUT_RSP) and - (r_config_rsp_fsm.read() != CONFIG_RSP_FIFO_PUT) ) + if ( (r_config_cmd_fsm.read() == CONFIG_CMD_RSP) and // config_cmd_fsm requiring + (r_config_rsp_fsm.read() == CONFIG_RSP_IDLE) ) // config_rsp_fsm not requiring r_alloc_fifo_config_rsp_local = true; } @@ -1786,44 +1939,44 @@ m_config_cmd_addr_fifo.update( config_cmd_fifo_get, config_cmd_fifo_put, - p_vci_tgt_int.address.read() ); + r_config_cmd_address.read() ); m_config_cmd_cmd_fifo.update( config_cmd_fifo_get, config_cmd_fifo_put, - p_vci_tgt_int.cmd.read() ); + r_config_cmd_cmd.read() ); m_config_cmd_contig_fifo.update( config_cmd_fifo_get, config_cmd_fifo_put, - p_vci_tgt_int.contig.read() ); + r_config_cmd_contig.read() ); m_config_cmd_cons_fifo.update( config_cmd_fifo_get, config_cmd_fifo_put, - p_vci_tgt_int.cons.read() ); + r_config_cmd_cons.read() ); m_config_cmd_plen_fifo.update( config_cmd_fifo_get, config_cmd_fifo_put, - p_vci_tgt_int.plen.read() ); + r_config_cmd_plen.read() ); m_config_cmd_wrap_fifo.update( config_cmd_fifo_get, config_cmd_fifo_put, - p_vci_tgt_int.wrap.read() ); + r_config_cmd_wrap.read() ); m_config_cmd_cfixed_fifo.update( config_cmd_fifo_get, config_cmd_fifo_put, - p_vci_tgt_int.cfixed.read() ); + r_config_cmd_cfixed.read() ); m_config_cmd_clen_fifo.update( config_cmd_fifo_get, config_cmd_fifo_put, - p_vci_tgt_int.clen.read() ); + r_config_cmd_clen.read() ); m_config_cmd_srcid_fifo.update( config_cmd_fifo_get, config_cmd_fifo_put, - p_vci_tgt_int.srcid.read() ); + r_config_cmd_srcid.read() ); m_config_cmd_trdid_fifo.update( config_cmd_fifo_get, config_cmd_fifo_put, - p_vci_tgt_int.trdid.read() ); + r_config_cmd_trdid.read() ); m_config_cmd_pktid_fifo.update( config_cmd_fifo_get, config_cmd_fifo_put, - p_vci_tgt_int.pktid.read() ); + r_config_cmd_pktid.read() ); m_config_cmd_data_fifo.update( config_cmd_fifo_get, config_cmd_fifo_put, - (ext_data_t)p_vci_tgt_int.wdata.read() ); + r_config_cmd_wdata.read() ); m_config_cmd_be_fifo.update( config_cmd_fifo_get, config_cmd_fifo_put, - p_vci_tgt_int.be.read() ); + r_config_cmd_be.read() ); m_config_cmd_eop_fifo.update( config_cmd_fifo_get, config_cmd_fifo_put, - p_vci_tgt_int.eop.read() ); + r_config_cmd_eop.read() ); ////////////////////////////////////////////////////////////////////////// @@ -1837,5 +1990,5 @@ m_config_rsp_data_fifo.update( config_rsp_fifo_get, config_rsp_fifo_put, - (int_data_t)r_config_cmd_rdata.read() ); + r_config_cmd_rdata.read() ); m_config_rsp_rsrcid_fifo.update( config_rsp_fifo_get, config_rsp_fifo_put, @@ -1857,7 +2010,35 @@ // response for a remote transaction { + // PUT depends on CONFIG_RSP FSM state + uint32_t rdata; + bool reop; + if ( r_config_rsp_fsm.read() == CONFIG_RSP_PUT_HI ) + { + config_rsp_fifo_put = true; + rdata = (uint32_t)(p_vci_ini_iox.rdata.read()>>32); + reop = p_vci_ini_iox.reop.read(); + } + else if ( r_config_rsp_fsm.read() == CONFIG_RSP_PUT_LO ) + { + config_rsp_fifo_put = true; + rdata = (uint32_t)(p_vci_ini_iox.rdata.read()); + reop = false; + } + else if ( r_config_rsp_fsm.read() == CONFIG_RSP_PUT_UNC ) + { + config_rsp_fifo_put = true; + rdata = (uint32_t)(p_vci_ini_iox.rdata.read()); + reop = true; + } + else + { + config_rsp_fifo_put = false; + rdata = 0; + reop = false;; + } + m_config_rsp_data_fifo.update( config_rsp_fifo_get, config_rsp_fifo_put, - (int_data_t)p_vci_ini_iox.rdata.read() ); + rdata ); m_config_rsp_rsrcid_fifo.update( config_rsp_fifo_get, config_rsp_fifo_put, @@ -1871,5 +2052,5 @@ m_config_rsp_reop_fifo.update( config_rsp_fifo_get, config_rsp_fifo_put, - p_vci_ini_iox.reop.read() ); + reop ); m_config_rsp_rerror_fifo.update( config_rsp_fifo_get, config_rsp_fifo_put, @@ -1920,5 +2101,5 @@ p_vci_tgt_iox.cmdack = m_dma_rsp_data_fifo.wok(); break; - }// end switch r_dma_cmd_fsm + } // VCI target response on IOX network @@ -1948,5 +2129,5 @@ p_vci_ini_iox.cmd = m_config_cmd_cmd_fifo.read(); p_vci_ini_iox.contig = m_config_cmd_contig_fifo.read(); - p_vci_ini_iox.wdata = (ext_data_t)m_config_cmd_data_fifo.read(); + p_vci_ini_iox.wdata = m_config_cmd_data_fifo.read(); p_vci_ini_iox.eop = m_config_cmd_eop_fifo.read(); p_vci_ini_iox.cons = m_config_cmd_cons_fifo.read(); @@ -1965,14 +2146,16 @@ { case CONFIG_CMD_IDLE: + p_vci_tgt_int.cmdack = true; + break; + case CONFIG_CMD_NEXT: + p_vci_tgt_int.cmdack = true; + break; + case CONFIG_CMD_PUT: p_vci_tgt_int.cmdack = false; break; - case CONFIG_CMD_FIFO_PUT_CMD: - p_vci_tgt_int.cmdack = m_config_cmd_addr_fifo.wok(); - break; - case CONFIG_CMD_FIFO_PUT_RSP: - p_vci_tgt_int.cmdack = m_config_rsp_data_fifo.wok() and - r_alloc_fifo_config_rsp_local.read(); - break; - }// end switch r_config_cmd_fsm + case CONFIG_CMD_RSP: + p_vci_tgt_int.cmdack = false; + break; + } // VCI target response on INT network @@ -1991,6 +2174,7 @@ p_vci_ini_iox.rspack = m_config_rsp_data_fifo.wok() and - (r_config_rsp_fsm.read() == CONFIG_RSP_FIFO_PUT) and - not r_alloc_fifo_config_rsp_local.read(); + not r_alloc_fifo_config_rsp_local.read() and + ( (r_config_rsp_fsm.read() == CONFIG_RSP_PUT_UNC) or + (r_config_rsp_fsm.read() == CONFIG_RSP_PUT_HI) ); // VCI initiator command on INT network