Index: trunk/modules/vci_mem_cache/caba/source/include/vci_mem_cache.h =================================================================== --- trunk/modules/vci_mem_cache/caba/source/include/vci_mem_cache.h (revision 595) +++ trunk/modules/vci_mem_cache/caba/source/include/vci_mem_cache.h (revision 596) @@ -434,10 +434,10 @@ uint32_t m_cpt_update_cost; // Number of (flits * distance) for UPDT - uint32_t m_cpt_m_inval; // Number of requests causing M_INV - uint32_t m_cpt_m_inval_local; // Number of local M_INV transactions - uint32_t m_cpt_m_inval_remote; // Number of remote M_INV transactions - uint32_t m_cpt_m_inval_cost; // Number of (flits * distance) for M_INV - - uint32_t m_cpt_br_inval; // Number of BROADCAST INVAL + uint32_t m_cpt_minval; // Number of requests causing M_INV + uint32_t m_cpt_minval_local; // Number of local M_INV transactions + uint32_t m_cpt_minval_remote; // Number of remote M_INV transactions + uint32_t m_cpt_minval_cost; // Number of (flits * distance) for M_INV + + uint32_t m_cpt_binval; // Number of BROADCAST INVAL uint32_t m_cpt_cleanup_local; // Number of local CLEANUP transactions @@ -526,6 +526,8 @@ void genMoore(); void check_monitor(addr_t addr, data_t data, bool read); + uint32_t req_distance(uint32_t req_srcid); bool is_local_req(uint32_t req_srcid); + int read_instrumentation(uint32_t regr, uint32_t & rdata); // Component attributes @@ -569,4 +571,11 @@ uint32_t m_broadcast_boundaries; + // configuration interface constants + const uint32_t m_config_addr_mask; + const uint32_t m_config_regr_width; + const uint32_t m_config_func_width; + const uint32_t m_config_regr_idx_mask; + const uint32_t m_config_func_idx_mask; + // Fifo between TGT_CMD fsm and READ fsm GenericFifo m_cmd_read_addr_fifo; Index: trunk/modules/vci_mem_cache/caba/source/src/vci_mem_cache.cpp =================================================================== --- trunk/modules/vci_mem_cache/caba/source/src/vci_mem_cache.cpp (revision 595) +++ trunk/modules/vci_mem_cache/caba/source/src/vci_mem_cache.cpp (revision 596) @@ -33,4 +33,5 @@ #include "../include/vci_mem_cache.h" +#include "mem_cache.h" ////// debug services ///////////////////////////////////////////////////////////// @@ -392,4 +393,11 @@ m_broadcast_boundaries(0x7C1F), + // CONFIG interface + m_config_addr_mask((1<<12)-1), + + m_config_regr_width(7), + m_config_func_width(3), + m_config_regr_idx_mask((1< Configuration request:" << " address = " << std::hex << p_vci_tgt.address.read() + << " / func = " << func + << " / regr = " << regr + << " / rdata = " << rdata << " / wdata = " << p_vci_tgt.wdata.read() << " / need_rsp = " << need_rsp @@ -1355,5 +1545,5 @@ if (is_local_req(p_vci_tgt.srcid.read())) m_cpt_read_local++; else m_cpt_read_remote++; - m_cpt_read_cost += m_words * req_distance(p_vci_tgt.srcid.read()); + m_cpt_read_cost += req_distance(p_vci_tgt.srcid.read()); } // @@ -1677,8 +1867,8 @@ #if DEBUG_MEMC_CONFIG if (m_debug) -std::cout << " Config Request received" - << " / address = " << std::hex << r_config_address.read() - << " / lines = " << std::dec << r_config_cmd_lines.read() - << " / type = " << r_config_cmd.read() << std::endl; + std::cout << " Config Request received" + << " / address = " << std::hex << r_config_address.read() + << " / lines = " << std::dec << r_config_cmd_lines.read() + << " / type = " << r_config_cmd.read() << std::endl; #endif } @@ -4699,13 +4889,4 @@ "MEMC ERROR in CLEANUP_IDLE state : illegal SRCID value"); - // - if (is_local_req(srcid)) { - m_cpt_cleanup_local++; - } - else { - m_cpt_cleanup_remote++; - m_cpt_cleanup_cost += req_distance(srcid); - } - // cc_receive_to_cleanup_fifo_get = true; r_cleanup_fsm = CLEANUP_GET_NLINE; @@ -6207,10 +6388,10 @@ if (is_local_req(m_config_to_cc_send_srcid_fifo.read())) { - m_cpt_m_inval_local++; + m_cpt_minval_local++; } else { - m_cpt_m_inval_remote++; - m_cpt_m_inval_cost += req_distance(m_config_to_cc_send_srcid_fifo.read()); + m_cpt_minval_remote++; + m_cpt_minval_cost += req_distance(m_config_to_cc_send_srcid_fifo.read()); } // @@ -6220,5 +6401,5 @@ if (r_config_to_cc_send_multi_req.read()) r_config_to_cc_send_multi_req = false; // - m_cpt_m_inval++; + m_cpt_minval++; // r_cc_send_fsm = CC_SEND_CONFIG_IDLE; @@ -6252,5 +6433,5 @@ if (not p_dspin_m2p.read) break; // - m_cpt_br_inval++; + m_cpt_binval++; // r_config_to_cc_send_brdcast_req = false; @@ -6274,10 +6455,10 @@ if (is_local_req(m_xram_rsp_to_cc_send_srcid_fifo.read())) { - m_cpt_m_inval_local++; + m_cpt_minval_local++; } else { - m_cpt_m_inval_remote++; - m_cpt_m_inval_cost += req_distance(m_xram_rsp_to_cc_send_srcid_fifo.read()); + m_cpt_minval_remote++; + m_cpt_minval_cost += req_distance(m_xram_rsp_to_cc_send_srcid_fifo.read()); } // @@ -6287,5 +6468,5 @@ if (r_xram_rsp_to_cc_send_multi_req.read()) r_xram_rsp_to_cc_send_multi_req = false; // - m_cpt_m_inval++; + m_cpt_minval++; // r_cc_send_fsm = CC_SEND_XRAM_RSP_IDLE; @@ -6319,5 +6500,5 @@ if (not p_dspin_m2p.read) break; // - m_cpt_br_inval++; + m_cpt_binval++; // r_xram_rsp_to_cc_send_brdcast_req = false; @@ -6345,5 +6526,5 @@ // - m_cpt_br_inval++; + m_cpt_binval++; // @@ -6434,5 +6615,5 @@ if (not p_dspin_m2p.read) break; // - m_cpt_br_inval++; + m_cpt_binval++; // @@ -6576,4 +6757,18 @@ cc_receive_to_cleanup_fifo_put = true; r_cc_receive_fsm = CC_RECEIVE_CLEANUP_EOP; + + // + uint32_t srcid = DspinDhccpParam::dspin_get( + p_dspin_p2m.data.read(), + DspinDhccpParam::CLEANUP_SRCID); + + if (is_local_req(srcid)) { + m_cpt_cleanup_local++; + } + else { + m_cpt_cleanup_remote++; + m_cpt_cleanup_cost += req_distance(srcid); + } + // break; @@ -8029,4 +8224,37 @@ case TGT_CMD_CONFIG: + { + addr_t addr_lsb = p_vci_tgt.address.read() & + m_config_addr_mask; + + addr_t cell = (addr_lsb / vci_param_int::B); + + size_t regr = cell & + m_config_regr_idx_mask; + + size_t func = (cell >> m_config_regr_width) & + m_config_func_idx_mask; + + switch(func) + { + case MEMC_CONFIG: + if ((p_vci_tgt.cmd.read() == vci_param_int::CMD_WRITE) + and (regr == MEMC_CMD_TYPE)) + { + p_vci_tgt.cmdack = true; + } + else + { + p_vci_tgt.cmdack = not r_tgt_cmd_to_tgt_rsp_req.read(); + } + break; + + default: + p_vci_tgt.cmdack = not r_tgt_cmd_to_tgt_rsp_req.read(); + break; + } + + break; + } case TGT_CMD_ERROR: p_vci_tgt.cmdack = not r_tgt_cmd_to_tgt_rsp_req.read(); Index: trunk/modules/vci_mem_cache/include/soclib/mem_cache.h =================================================================== --- trunk/modules/vci_mem_cache/include/soclib/mem_cache.h (revision 595) +++ trunk/modules/vci_mem_cache/include/soclib/mem_cache.h (revision 596) @@ -28,4 +28,12 @@ #define MEM_CACHE_REGS_H +enum SoclibMemCacheFunc +{ + MEMC_CONFIG = 0, + MEMC_INSTRM = 1, + + MEMC_FUNC_SPAN = 0x200 +}; + enum SoclibMemCacheConfigRegs { @@ -44,4 +52,120 @@ }; +/////////////////////////////////////////////////////////// +// Decoding CONFIG interface commands // +// // +// VCI ADDRESS // +// ================================================ // +// GLOBAL | LOCAL | ... | FUNC_IDX | REGS_IDX | 00 // +// IDX | IDX | | (3 bits) | (7 bits) | // +// ================================================ // +// // +// For instrumentation: FUNC_IDX = 0b001 // +// // +// REGS_IDX // +// ============================================ // +// Z | Y | X | W // +// (1 bit) | (2 bits) | (3 bits) | (1 bit) // +// ============================================ // +// // +// For configuration: FUNC_IDX = 0b000 // +// // +// REGS_IDX // +// ============================================ // +// RESERVED | X | // +// (4 bits) | (3 bits) | // +// ============================================ // +// // +// X : REGISTER INDEX // +// // +/////////////////////////////////////////////////////////// + +enum SoclibMemCacheInstrRegs { + /////////////////////////////////////////////////////// + // DIRECT instrumentation registers // + /////////////////////////////////////////////////////// + + // LOCAL + + MEMC_LOCAL_READ_LO = 0x00, + MEMC_LOCAL_READ_HI = 0x01, + MEMC_LOCAL_WRITE_LO = 0x02, + MEMC_LOCAL_WRITE_HI = 0x03, + MEMC_LOCAL_LL_LO = 0x04, + MEMC_LOCAL_LL_HI = 0x05, + MEMC_LOCAL_SC_LO = 0x06, + MEMC_LOCAL_SC_HI = 0x07, + MEMC_LOCAL_CAS_LO = 0x08, + MEMC_LOCAL_CAS_HI = 0x09, + + // REMOTE + + MEMC_REMOTE_READ_LO = 0x10, + MEMC_REMOTE_READ_HI = 0x11, + MEMC_REMOTE_WRITE_LO = 0x12, + MEMC_REMOTE_WRITE_HI = 0x13, + MEMC_REMOTE_LL_LO = 0x14, + MEMC_REMOTE_LL_HI = 0x15, + MEMC_REMOTE_SC_LO = 0x16, + MEMC_REMOTE_SC_HI = 0x17, + MEMC_REMOTE_CAS_LO = 0x18, + MEMC_REMOTE_CAS_HI = 0x19, + + // COST + + MEMC_COST_READ_LO = 0x20, + MEMC_COST_READ_HI = 0x21, + MEMC_COST_WRITE_LO = 0x22, + MEMC_COST_WRITE_HI = 0x23, + MEMC_COST_LL_LO = 0x24, + MEMC_COST_LL_HI = 0x25, + MEMC_COST_SC_LO = 0x26, + MEMC_COST_SC_HI = 0x27, + MEMC_COST_CAS_LO = 0x28, + MEMC_COST_CAS_HI = 0x29, + + /////////////////////////////////////////////////////// + // COHERENCE instrumentation registers // + /////////////////////////////////////////////////////// + + // LOCAL + + MEMC_LOCAL_MUPDATE_LO = 0x40, + MEMC_LOCAL_MUPDATE_HI = 0x41, + MEMC_LOCAL_MINVAL_LO = 0x42, + MEMC_LOCAL_MINVAL_HI = 0x43, + MEMC_LOCAL_CLEANUP_LO = 0x44, + MEMC_LOCAL_CLEANUP_HI = 0x45, + + // REMOTE + + MEMC_REMOTE_MUPDATE_LO = 0x50, + MEMC_REMOTE_MUPDATE_HI = 0x51, + MEMC_REMOTE_MINVAL_LO = 0x52, + MEMC_REMOTE_MINVAL_HI = 0x53, + MEMC_REMOTE_CLEANUP_LO = 0x54, + MEMC_REMOTE_CLEANUP_HI = 0x55, + + // COST + + MEMC_COST_MUPDATE_LO = 0x60, + MEMC_COST_MUPDATE_HI = 0x61, + MEMC_COST_MINVAL_LO = 0x62, + MEMC_COST_MINVAL_HI = 0x63, + MEMC_COST_CLEANUP_LO = 0x64, + MEMC_COST_CLEANUP_HI = 0x65, + + // TOTAL + + MEMC_TOTAL_MUPDATE_LO = 0x68, + MEMC_TOTAL_MUPDATE_HI = 0x69, + MEMC_TOTAL_MINVAL_LO = 0x6A, + MEMC_TOTAL_MINVAL_HI = 0x6B, + MEMC_TOTAL_BINVAL_LO = 0x6C, + MEMC_TOTAL_BINVAL_HI = 0x6D, +}; + +#define MEMC_REG(func,idx) ((func<<7)|idx) + #endif /* MEM_CACHE_REGS_H */