Changeset 628 for trunk/platforms/tsar_generic_leti/tsar_leti_cluster/caba
- Timestamp:
- Feb 12, 2014, 9:43:49 AM (11 years ago)
- Location:
- trunk/platforms/tsar_generic_leti/tsar_leti_cluster/caba
- Files:
-
- 3 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/platforms/tsar_generic_leti/tsar_leti_cluster/caba/metadata/tsar_leti_cluster.sd
r621 r628 40 40 cell_size = parameter.Reference('vci_data_width_ext')), 41 41 42 Uses('caba:vci_simple_ram',43 cell_size = parameter.Reference('vci_data_width_int')),44 45 42 Uses('caba:vci_xicu', 46 43 cell_size = parameter.Reference('vci_data_width_int')), … … 52 49 flit_width = parameter.Reference('dspin_rsp_width')), 53 50 54 Uses('caba: virtual_dspin_router',51 Uses('caba:dspin_router', 55 52 flit_width = parameter.Reference('dspin_cmd_width')), 56 53 57 Uses('caba: virtual_dspin_router',54 Uses('caba:dspin_router', 58 55 flit_width = parameter.Reference('dspin_rsp_width')), 59 56 … … 61 58 cell_size = parameter.Reference('vci_data_width_int')), 62 59 63 Uses('caba:vci_framebuffer',64 cell_size = parameter.Reference('vci_data_width_int')),65 66 Uses('caba:vci_multi_nic',67 cell_size = parameter.Reference('vci_data_width_int')),68 69 Uses('caba:vci_chbuf_dma',70 cell_size = parameter.Reference('vci_data_width_int')),71 72 60 Uses('caba:vci_block_device_tsar', 73 cell_size = parameter.Reference('vci_data_width_int')),74 75 Uses('caba:vci_multi_dma',76 61 cell_size = parameter.Reference('vci_data_width_int')), 77 62 … … 82 67 cell_size = parameter.Reference('vci_data_width_int')), 83 68 84 Uses('caba:vci_simhelper',85 cell_size = parameter.Reference('vci_data_width_int')),86 87 69 Uses('common:elf_file_loader'), 88 70 ], … … 91 73 Port('caba:bit_in', 'p_resetn', auto = 'resetn'), 92 74 Port('caba:clock_in', 'p_clk', auto = 'clock'), 93 Port('caba:dspin_output', 'p_cmd_out', [4, 3], 75 76 Port('caba:dspin_output', 'p_cmd_out', [4], 94 77 dspin_data_size = parameter.Reference('dspin_cmd_width')), 95 Port('caba:dspin_input', 'p_cmd_in', [4 , 3],78 Port('caba:dspin_input', 'p_cmd_in', [4], 96 79 dspin_data_size = parameter.Reference('dspin_cmd_width')), 97 Port('caba:dspin_output', 'p_rsp_out', [4, 2], 80 81 Port('caba:dspin_output', 'p_rsp_out', [4], 98 82 dspin_data_size = parameter.Reference('dspin_rsp_width')), 99 Port('caba:dspin_input', 'p_rsp_in', [4 , 2],83 Port('caba:dspin_input', 'p_rsp_in', [4], 100 84 dspin_data_size = parameter.Reference('dspin_rsp_width')), 85 86 Port('caba:dspin_output', 'p_m2p_out', [4], 87 dspin_data_size = parameter.Reference('dspin_cmd_width')), 88 Port('caba:dspin_input', 'p_m2p_in', [4], 89 dspin_data_size = parameter.Reference('dspin_cmd_width')), 90 91 Port('caba:dspin_output', 'p_p2m_out', [4], 92 dspin_data_size = parameter.Reference('dspin_rsp_width')), 93 Port('caba:dspin_input', 'p_p2m_in', [4], 94 dspin_data_size = parameter.Reference('dspin_rsp_width')), 95 96 Port('caba:dspin_output', 'p_cla_out', [4], 97 dspin_data_size = parameter.Reference('dspin_cmd_width')), 98 Port('caba:dspin_input', 'p_cla_in', [4], 99 dspin_data_size = parameter.Reference('dspin_cmd_width')), 101 100 ], 102 101 ) -
trunk/platforms/tsar_generic_leti/tsar_leti_cluster/caba/source/include/tsar_leti_cluster.h
r621 r628 25 25 #include "vci_dspin_initiator_wrapper.h" 26 26 #include "vci_dspin_target_wrapper.h" 27 #include " virtual_dspin_router.h"27 #include "dspin_router.h" 28 28 #include "vci_multi_tty.h" 29 #include "vci_multi_nic.h"30 #include "vci_chbuf_dma.h"31 29 #include "vci_block_device_tsar.h" 32 #include "vci_framebuffer.h"33 #include "vci_multi_dma.h"34 30 #include "vci_mem_cache.h" 35 31 #include "vci_cc_vcache_wrapper.h" 36 #include "vci_simhelper.h"37 32 38 33 namespace soclib { namespace caba { … … 54 49 sc_in<bool> p_clk; 55 50 sc_in<bool> p_resetn; 56 soclib::caba::DspinOutput<dspin_cmd_width> **p_cmd_out; 57 soclib::caba::DspinInput<dspin_cmd_width> **p_cmd_in; 58 soclib::caba::DspinOutput<dspin_rsp_width> **p_rsp_out; 59 soclib::caba::DspinInput<dspin_rsp_width> **p_rsp_in; 51 52 soclib::caba::DspinOutput<dspin_cmd_width> *p_cmd_out; 53 soclib::caba::DspinInput<dspin_cmd_width> *p_cmd_in; 54 55 soclib::caba::DspinOutput<dspin_rsp_width> *p_rsp_out; 56 soclib::caba::DspinInput<dspin_rsp_width> *p_rsp_in; 57 58 soclib::caba::DspinOutput<dspin_cmd_width> *p_m2p_out; 59 soclib::caba::DspinInput<dspin_cmd_width> *p_m2p_in; 60 61 soclib::caba::DspinOutput<dspin_rsp_width> *p_p2m_out; 62 soclib::caba::DspinInput<dspin_rsp_width> *p_p2m_in; 63 64 soclib::caba::DspinOutput<dspin_cmd_width> *p_cla_out; 65 soclib::caba::DspinInput<dspin_cmd_width> *p_cla_in; 60 66 61 67 // interrupt signals 62 68 sc_signal<bool> signal_false; 63 sc_signal<bool> signal_proc_it[8]; 64 sc_signal<bool> signal_irq_mdma[8]; 65 sc_signal<bool> signal_irq_mtty[23]; 66 sc_signal<bool> signal_irq_mnic_rx[8]; // unused 67 sc_signal<bool> signal_irq_mnic_tx[8]; // unused 68 sc_signal<bool> signal_irq_chbuf[8]; // unused 69 sc_signal<bool> signal_proc_irq[16]; 70 sc_signal<bool> signal_irq_mtty; 69 71 sc_signal<bool> signal_irq_memc; 70 72 sc_signal<bool> signal_irq_bdev; … … 83 85 84 86 // Direct VCI signals to VCI/DSPIN wrappers 85 VciSignals<vci_param_int> signal_vci_ini_proc[ 8];87 VciSignals<vci_param_int> signal_vci_ini_proc[4]; 86 88 VciSignals<vci_param_int> signal_vci_ini_mdma; 87 89 VciSignals<vci_param_int> signal_vci_ini_bdev; … … 99 101 100 102 // Direct DSPIN signals to local crossbars 101 DspinSignals<dspin_cmd_width> signal_dspin_cmd_proc_i[ 8];102 DspinSignals<dspin_rsp_width> signal_dspin_rsp_proc_i[ 8];103 DspinSignals<dspin_cmd_width> signal_dspin_cmd_proc_i[4]; 104 DspinSignals<dspin_rsp_width> signal_dspin_rsp_proc_i[4]; 103 105 DspinSignals<dspin_cmd_width> signal_dspin_cmd_mdma_i; 104 106 DspinSignals<dspin_rsp_width> signal_dspin_rsp_mdma_i; … … 131 133 DspinSignals<dspin_cmd_width> signal_dspin_clack_memc; 132 134 DspinSignals<dspin_rsp_width> signal_dspin_p2m_memc; 133 DspinSignals<dspin_cmd_width> signal_dspin_m2p_proc[ 8];134 DspinSignals<dspin_cmd_width> signal_dspin_clack_proc[ 8];135 DspinSignals<dspin_rsp_width> signal_dspin_p2m_proc[ 8];135 DspinSignals<dspin_cmd_width> signal_dspin_m2p_proc[4]; 136 DspinSignals<dspin_cmd_width> signal_dspin_clack_proc[4]; 137 DspinSignals<dspin_rsp_width> signal_dspin_p2m_proc[4]; 136 138 137 139 // external RAM to MEMC VCI signal … … 143 145 dspin_cmd_width, 144 146 dspin_rsp_width, 145 GdbServer<Mips32ElIss> >* proc[ 8];147 GdbServer<Mips32ElIss> >* proc[4]; 146 148 147 149 VciDspinInitiatorWrapper<vci_param_int, 148 150 dspin_cmd_width, 149 dspin_rsp_width>* wi_proc[ 8];151 dspin_rsp_width>* wi_proc[4]; 150 152 151 153 VciMemCache<vci_param_int, … … 164 166 dspin_rsp_width>* wt_xicu; 165 167 166 VciMultiDma<vci_param_int>* mdma;167 168 VciDspinInitiatorWrapper<vci_param_int,169 dspin_cmd_width,170 dspin_rsp_width>* wi_mdma;171 172 VciDspinTargetWrapper<vci_param_int,173 dspin_cmd_width,174 dspin_rsp_width>* wt_mdma;175 176 168 VciSimpleRam<vci_param_ext>* xram; 177 169 … … 181 173 dspin_cmd_width, 182 174 dspin_rsp_width>* wt_mtty; 183 184 VciSimhelper<vci_param_int>* simhelper;185 186 VciDspinTargetWrapper<vci_param_int,187 dspin_cmd_width,188 dspin_rsp_width>* wt_simhelper;189 190 VciFrameBuffer<vci_param_int>* fbuf;191 192 VciDspinTargetWrapper<vci_param_int,193 dspin_cmd_width,194 dspin_rsp_width>* wt_fbuf;195 196 VciMultiNic<vci_param_int>* mnic;197 198 VciDspinTargetWrapper<vci_param_int,199 dspin_cmd_width,200 dspin_rsp_width>* wt_mnic;201 202 VciChbufDma<vci_param_int>* chbuf;203 204 VciDspinTargetWrapper<vci_param_int,205 dspin_cmd_width,206 dspin_rsp_width>* wt_chbuf;207 208 VciDspinInitiatorWrapper<vci_param_int,209 dspin_cmd_width,210 dspin_rsp_width>* wi_chbuf;211 175 212 176 VciBlockDeviceTsar<vci_param_int>* bdev; … … 220 184 dspin_rsp_width>* wt_bdev; 221 185 222 DspinLocalCrossbar<dspin_cmd_width>* xbar_cmd_d; 223 DspinLocalCrossbar<dspin_rsp_width>* xbar_rsp_d; 224 DspinLocalCrossbar<dspin_cmd_width>* xbar_m2p_c; 225 DspinLocalCrossbar<dspin_rsp_width>* xbar_p2m_c; 226 DspinLocalCrossbar<dspin_cmd_width>* xbar_clack_c; 227 228 VirtualDspinRouter<dspin_cmd_width>* router_cmd; 229 VirtualDspinRouter<dspin_rsp_width>* router_rsp; 186 DspinLocalCrossbar<dspin_cmd_width>* xbar_cmd; 187 DspinLocalCrossbar<dspin_rsp_width>* xbar_rsp; 188 DspinLocalCrossbar<dspin_cmd_width>* xbar_m2p; 189 DspinLocalCrossbar<dspin_rsp_width>* xbar_p2m; 190 DspinLocalCrossbar<dspin_cmd_width>* xbar_cla; 191 192 DspinRouter<dspin_cmd_width>* router_cmd; 193 DspinRouter<dspin_rsp_width>* router_rsp; 194 DspinRouter<dspin_cmd_width>* router_m2p; 195 DspinRouter<dspin_rsp_width>* router_p2m; 196 DspinRouter<dspin_cmd_width>* router_cla; 230 197 231 198 TsarLetiCluster( sc_module_name insname, 232 199 size_t nb_procs, // processors 233 size_t nb_ttys, // TTY terminals234 size_t nb_dmas, // DMA channels235 200 size_t x, // x coordinate 236 201 size_t y, // y coordinate … … 244 209 size_t tgtid_memc, 245 210 size_t tgtid_xicu, 246 size_t tgtid_mdma,247 size_t tgtid_fbuf,248 211 size_t tgtid_mtty, 249 size_t tgtid_mnic,250 size_t tgtid_chbuf,251 212 size_t tgtid_bdev, 252 size_t tgtid_simh,213 const char* disk_pathname, 253 214 size_t memc_ways, 254 215 size_t memc_sets, … … 258 219 size_t l1_d_sets, 259 220 size_t xram_latency, // external ram 260 bool io, // I/O cluster261 size_t xfb, // fbf pixels262 size_t yfb, // fbf lines263 char* disk_name, // virtual disk264 size_t block_size, // block size265 size_t nic_channels, // number channels266 char* nic_rx_name, // filename rx267 char* nic_tx_name, // filename tx268 uint32_t nic_timeout, // cycles269 size_t chbufdma_channels, // number channels270 221 const Loader &loader, 271 222 uint32_t frozen_cycles, -
trunk/platforms/tsar_generic_leti/tsar_leti_cluster/caba/source/src/tsar_leti_cluster.cpp
r621 r628 3 3 // Author: Alain Greiner 4 4 // Copyright: UPMC/LIP6 5 // Date : march 20115 // Date : february 2014 6 6 // This program is released under the GNU public license 7 7 ////////////////////////////////////////////////////////////////////////////// 8 // This file define a TSAR cluster architecture with virtual memory:9 // - It uses two virtual_dspin_router as distributed global interconnect10 // - It uses five dspin_local_crossbar as local interconnect11 // - It uses the vci_cc_vcache_wrapper12 // - It uses the vci_mem_cache13 // - It contains a private RAM with a variable latency to emulate the L3 cache14 // - It can contains 1, 2 or 4 processors15 // - Each processor has a private dma channel (vci_multi_dma)16 // - It uses the vci_xicu interrupt controller17 // - The peripherals MTTY, BDEV, FBUF, MNIC,CDMA are in cluster (0,0)18 // - The Multi-TTY component controls up to 16 terminals.19 // - The BDEV IRQ is connected to IRQ_IN[0] in cluster(0,0).20 // - The DMA IRQs are connected to IRQ_IN[8:11] in all clusters.21 // - The MEMC IRQ is connected to IRQ_IN[12] in all clusters.22 // - The TTY IRQs are connected to IRQ_IN[16:31] in cluster (0,0).23 //////////////////////////////////////////////////////////////////////////////////24 8 25 9 #include "../include/tsar_leti_cluster.h" 26 27 10 28 11 namespace soclib { … … 40 23 sc_module_name insname, 41 24 size_t nb_procs, 42 size_t nb_ttys,43 size_t nb_dmas,44 25 size_t x_id, 45 26 size_t y_id, … … 53 34 size_t tgtid_memc, 54 35 size_t tgtid_xicu, 55 size_t tgtid_mdma,56 size_t tgtid_fbuf,57 36 size_t tgtid_mtty, 58 size_t tgtid_mnic,59 size_t tgtid_chbuf,60 37 size_t tgtid_bdev, 61 size_t tgtid_simh,38 const char* disk_pathname, 62 39 size_t memc_ways, 63 40 size_t memc_sets, … … 67 44 size_t l1_d_sets, 68 45 size_t xram_latency, 69 bool io,70 size_t xfb,71 size_t yfb,72 char* disk_name,73 size_t block_size,74 size_t nic_channels,75 char* nic_rx_name,76 char* nic_tx_name,77 uint32_t nic_timeout,78 size_t chbufdma_channels,79 46 const Loader &loader, 80 47 uint32_t frozen_cycles, … … 89 56 90 57 { 91 92 n_procs = nb_procs; 93 94 // Vectors of ports definition 95 p_cmd_in = alloc_elems<DspinInput<dspin_cmd_width> > ("p_cmd_in", 4, 3); 96 p_cmd_out = alloc_elems<DspinOutput<dspin_cmd_width> > ("p_cmd_out", 4, 3); 97 p_rsp_in = alloc_elems<DspinInput<dspin_rsp_width> > ("p_rsp_in", 4, 2); 98 p_rsp_out = alloc_elems<DspinOutput<dspin_rsp_width> > ("p_rsp_out", 4, 2); 99 100 ///////////////////////////////////////////////////////////////////////////// 101 // Components definition 58 ///////////////////////////////////////////////////////////////////////////// 59 // Vectors of ports definition and allocation 60 ///////////////////////////////////////////////////////////////////////////// 61 62 p_cmd_in = alloc_elems<DspinInput<dspin_cmd_width> > ("p_cmd_in", 4); 63 p_cmd_out = alloc_elems<DspinOutput<dspin_cmd_width> > ("p_cmd_out", 4); 64 65 p_rsp_in = alloc_elems<DspinInput<dspin_rsp_width> > ("p_rsp_in", 4); 66 p_rsp_out = alloc_elems<DspinOutput<dspin_rsp_width> > ("p_rsp_out", 4); 67 68 p_m2p_in = alloc_elems<DspinInput<dspin_cmd_width> > ("p_m2p_in", 4); 69 p_m2p_out = alloc_elems<DspinOutput<dspin_cmd_width> > ("p_m2p_out", 4); 70 71 p_p2m_in = alloc_elems<DspinInput<dspin_rsp_width> > ("p_p2m_in", 4); 72 p_p2m_out = alloc_elems<DspinOutput<dspin_rsp_width> > ("p_p2m_out", 4); 73 74 p_cla_in = alloc_elems<DspinInput<dspin_cmd_width> > ("p_cla_in", 4); 75 p_cla_out = alloc_elems<DspinOutput<dspin_cmd_width> > ("p_cla_out", 4); 76 77 ///////////////////////////////////////////////////////////////////////////// 78 // Components definition and allocation 102 79 ///////////////////////////////////////////////////////////////////////////// 103 80 … … 194 171 mtd, // mapping table 195 172 IntTab(cluster_xy, tgtid_xicu), // TGTID_D 196 32, // number of timer IRQs197 32, // number of hard IRQs198 32, // number of soft IRQs199 nb_procs);// number of output IRQs173 16, // number of timer IRQs 174 16, // number of hard IRQs 175 16, // number of soft IRQs 176 16 ); // number of output IRQs 200 177 201 178 wt_xicu = new VciDspinTargetWrapper<vci_param_int, … … 206 183 207 184 ///////////////////////////////////////////////////////////////////////////// 208 std::ostringstream smdma; 209 smdma << "mdma_" << x_id << "_" << y_id; 210 mdma = new VciMultiDma<vci_param_int>( 211 smdma.str().c_str(), 212 mtd, 213 IntTab(cluster_xy, nb_procs), // SRCID 214 IntTab(cluster_xy, tgtid_mdma), // TGTID 215 64, // burst size 216 nb_dmas); // number of IRQs 217 218 wt_mdma = new VciDspinTargetWrapper<vci_param_int, 219 dspin_cmd_width, 220 dspin_rsp_width>( 221 "wt_mdma", 222 x_width + y_width + l_width); 223 224 wi_mdma = new VciDspinInitiatorWrapper<vci_param_int, 225 dspin_cmd_width, 226 dspin_rsp_width>( 227 "wi_mdma", 228 x_width + y_width + l_width); 229 230 ///////////////////////////////////////////////////////////////////////////// 231 size_t nb_direct_initiators = nb_procs + 1; 232 size_t nb_direct_targets = 3; 233 if (io) 234 { 235 nb_direct_initiators = nb_procs + 3; 236 nb_direct_targets = 9; 237 } 238 239 xbar_cmd_d = new DspinLocalCrossbar<dspin_cmd_width>( 240 "xbar_cmd_d", 185 size_t nb_initiators = nb_procs; 186 size_t nb_targets = 2; 187 188 if ((x_id == 0) and (y_id == 0)) // cluster(0,0) 189 { 190 nb_initiators = nb_procs + 1; 191 nb_targets = 4; 192 } 193 194 std::ostringstream s_xbar_cmd; 195 s_xbar_cmd << "xbar_cmd_" << x_id << "_" << y_id; 196 xbar_cmd = new DspinLocalCrossbar<dspin_cmd_width>( 197 s_xbar_cmd.str().c_str(), 241 198 mtd, // mapping table 242 199 x_id, y_id, // cluster coordinates 243 200 x_width, y_width, l_width, 244 nb_ direct_initiators,// number of local of sources245 nb_ direct_targets,// number of local dests201 nb_initiators, // number of local of sources 202 nb_targets, // number of local dests 246 203 2, 2, // fifo depths 247 204 true, // CMD … … 250 207 251 208 ///////////////////////////////////////////////////////////////////////////// 252 xbar_rsp_d = new DspinLocalCrossbar<dspin_rsp_width>( 253 "xbar_rsp_d", 209 std::ostringstream s_xbar_rsp; 210 s_xbar_rsp << "xbar_rsp_" << x_id << "_" << y_id; 211 xbar_rsp = new DspinLocalCrossbar<dspin_rsp_width>( 212 s_xbar_rsp.str().c_str(), 254 213 mtd, // mapping table 255 214 x_id, y_id, // cluster coordinates 256 215 x_width, y_width, l_width, 257 nb_ direct_targets,// number of local sources258 nb_ direct_initiators,// number of local dests216 nb_targets, // number of local sources 217 nb_initiators, // number of local dests 259 218 2, 2, // fifo depths 260 219 false, // RSP … … 263 222 264 223 ///////////////////////////////////////////////////////////////////////////// 265 xbar_m2p_c = new DspinLocalCrossbar<dspin_cmd_width>( 266 "xbar_m2p_c", 224 std::ostringstream s_xbar_m2p; 225 s_xbar_m2p << "xbar_m2p_" << x_id << "_" << y_id; 226 xbar_m2p = new DspinLocalCrossbar<dspin_cmd_width>( 227 s_xbar_m2p.str().c_str(), 267 228 mtd, // mapping table 268 229 x_id, y_id, // cluster coordinates 269 230 x_width, y_width, l_width, 270 231 1, // number of local sources 271 nb_procs, // number of local targets232 nb_procs, // number of local dests 272 233 2, 2, // fifo depths 273 234 true, // CMD … … 276 237 277 238 ///////////////////////////////////////////////////////////////////////////// 278 xbar_p2m_c = new DspinLocalCrossbar<dspin_rsp_width>( 279 "xbar_p2m_c", 239 std::ostringstream s_xbar_p2m; 240 s_xbar_p2m << "xbar_p2m_" << x_id << "_" << y_id; 241 xbar_p2m = new DspinLocalCrossbar<dspin_rsp_width>( 242 s_xbar_p2m.str().c_str(), 280 243 mtd, // mapping table 281 244 x_id, y_id, // cluster coordinates … … 289 252 290 253 ///////////////////////////////////////////////////////////////////////////// 291 xbar_clack_c = new DspinLocalCrossbar<dspin_cmd_width>( 292 "xbar_clack_c", 254 std::ostringstream s_xbar_cla; 255 s_xbar_cla << "xbar_cla_" << x_id << "_" << y_id; 256 xbar_cla = new DspinLocalCrossbar<dspin_cmd_width>( 257 s_xbar_cla.str().c_str(), 293 258 mtd, // mapping table 294 259 x_id, y_id, // cluster coordinates 295 260 x_width, y_width, l_width, 296 261 1, // number of local sources 297 nb_procs, // number of local targets298 1, 1, // fifo depths262 nb_procs, // number of local dests 263 2, 2, // fifo depths 299 264 true, // CMD 300 265 false, // don't use local routing table 301 false); // broadcast 302 303 ///////////////////////////////////////////////////////////////////////////// 304 router_cmd = new VirtualDspinRouter<dspin_cmd_width>( 305 "router_cmd", 266 false); // no broadcast 267 268 ///////////////////////////////////////////////////////////////////////////// 269 std::ostringstream s_router_cmd; 270 s_router_cmd << "router_cmd_" << x_id << "_" << y_id; 271 router_cmd = new DspinRouter<dspin_cmd_width>( 272 s_router_cmd.str().c_str(), 306 273 x_id,y_id, // coordinate in the mesh 307 274 x_width, y_width, // x & y fields width 308 3, // nb virtual channels309 275 4,4); // input & output fifo depths 310 276 311 277 ///////////////////////////////////////////////////////////////////////////// 312 router_rsp = new VirtualDspinRouter<dspin_rsp_width>( 313 "router_rsp", 278 std::ostringstream s_router_rsp; 279 s_router_rsp << "router_rsp_" << x_id << "_" << y_id; 280 router_rsp = new DspinRouter<dspin_rsp_width>( 281 s_router_rsp.str().c_str(), 314 282 x_id,y_id, // coordinates in mesh 315 283 x_width, y_width, // x & y fields width 316 2, // nb virtual channels317 284 4,4); // input & output fifo depths 318 285 319 // IO cluster components 320 if (io) 321 { 322 ///////////////////////////////////////////// 323 fbuf = new VciFrameBuffer<vci_param_int>( 324 "fbuf", 325 IntTab(cluster_xy, tgtid_fbuf), 326 mtd, 327 xfb, yfb); 328 329 wt_fbuf = new VciDspinTargetWrapper<vci_param_int, 330 dspin_cmd_width, 331 dspin_rsp_width>( 332 "wt_fbuf", 333 x_width + y_width + l_width); 334 286 ///////////////////////////////////////////////////////////////////////////// 287 std::ostringstream s_router_m2p; 288 s_router_m2p << "router_m2p_" << x_id << "_" << y_id; 289 router_m2p = new DspinRouter<dspin_cmd_width>( 290 s_router_m2p.str().c_str(), 291 x_id,y_id, // coordinate in the mesh 292 x_width, y_width, // x & y fields width 293 4,4, // input & output fifo depths 294 true); // broadcast supported 295 296 ///////////////////////////////////////////////////////////////////////////// 297 std::ostringstream s_router_p2m; 298 s_router_p2m << "router_p2m_" << x_id << "_" << y_id; 299 router_p2m = new DspinRouter<dspin_rsp_width>( 300 s_router_p2m.str().c_str(), 301 x_id,y_id, // coordinates in mesh 302 x_width, y_width, // x & y fields width 303 4,4); // input & output fifo depths 304 305 ///////////////////////////////////////////////////////////////////////////// 306 std::ostringstream s_router_cla; 307 s_router_cla << "router_cla_" << x_id << "_" << y_id; 308 router_cla = new DspinRouter<dspin_cmd_width>( 309 s_router_cla.str().c_str(), 310 x_id,y_id, // coordinate in the mesh 311 x_width, y_width, // x & y fields width 312 4,4); // input & output fifo depths 313 314 if ((x_id == 0) and (y_id == 0)) 315 { 335 316 ///////////////////////////////////////////// 336 317 bdev = new VciBlockDeviceTsar<vci_param_int>( 337 318 "bdev", 338 319 mtd, 339 IntTab(cluster_xy, nb_procs + 1),320 IntTab(cluster_xy, nb_procs), 340 321 IntTab(cluster_xy, tgtid_bdev), 341 disk_ name,342 block_size,343 64 ); // burst size322 disk_pathname, 323 512, 324 64 ); // burst size 344 325 345 326 wt_bdev = new VciDspinTargetWrapper<vci_param_int, … … 355 336 x_width + y_width + l_width); 356 337 357 //////////////////////////////////////358 mnic = new VciMultiNic<vci_param_int>(359 "mnic",360 IntTab(cluster_xy, tgtid_mnic),361 mtd,362 nic_channels,363 0xBEEF0000, // mac_4 address364 0xBABE, // mac_2 address365 nic_rx_name,366 nic_tx_name);367 368 wt_mnic = new VciDspinTargetWrapper<vci_param_int,369 dspin_cmd_width,370 dspin_rsp_width>(371 "wt_mnic",372 x_width + y_width + l_width);373 374 338 ///////////////////////////////////////////// 375 chbuf = new VciChbufDma<vci_param_int>(376 "chbuf_dma",377 mtd,378 IntTab(cluster_xy, nb_procs + 2),379 IntTab(cluster_xy, tgtid_chbuf),380 64,381 chbufdma_channels);382 383 wt_chbuf = new VciDspinTargetWrapper<vci_param_int,384 dspin_cmd_width,385 dspin_rsp_width>(386 "wt_chbuf",387 x_width + y_width + l_width);388 389 wi_chbuf = new VciDspinInitiatorWrapper<vci_param_int,390 dspin_cmd_width,391 dspin_rsp_width>(392 "wi_chbuf",393 x_width + y_width + l_width);394 395 /////////////////////////////////////////////396 std::vector<std::string> vect_names;397 for (size_t tid = 0; tid < nb_ttys; tid++)398 {399 std::ostringstream term_name;400 term_name << "term" << tid;401 vect_names.push_back(term_name.str().c_str());402 }403 339 mtty = new VciMultiTty<vci_param_int>( 404 340 "mtty", 405 341 IntTab(cluster_xy, tgtid_mtty), 406 342 mtd, 407 vect_names);343 "tty_0_0", NULL ); 408 344 409 345 wt_mtty = new VciDspinTargetWrapper<vci_param_int, … … 412 348 "wt_mtty", 413 349 x_width + y_width + l_width); 414 415 //////////////////////////////////////////// 416 simhelper = new VciSimhelper<vci_param_int>( 417 "sim_helper", 418 IntTab(cluster_xy, tgtid_simh), 419 mtd); 420 421 wt_simhelper = new VciDspinTargetWrapper<vci_param_int, 422 dspin_cmd_width, 423 dspin_rsp_width>( 424 "wt_simhelper", 425 x_width + y_width + l_width); 426 } 350 } 351 352 std::cout << std::endl; 427 353 428 354 //////////////////////////////////// … … 430 356 //////////////////////////////////// 431 357 432 //////////////////////// CMD ROUTER and RSP ROUTER 433 router_cmd->p_clk (this->p_clk); 434 router_cmd->p_resetn (this->p_resetn); 435 router_rsp->p_clk (this->p_clk); 436 router_rsp->p_resetn (this->p_resetn); 437 438 for (int i = 0; i < 4; i++) 439 { 440 for (int k = 0; k < 3; k++) 441 { 442 router_cmd->p_out[i][k] (this->p_cmd_out[i][k]); 443 router_cmd->p_in[i][k] (this->p_cmd_in[i][k]); 444 } 445 446 for (int k = 0; k < 2; k++) 447 { 448 router_rsp->p_out[i][k] (this->p_rsp_out[i][k]); 449 router_rsp->p_in[i][k] (this->p_rsp_in[i][k]); 450 } 451 } 452 453 router_cmd->p_out[4][0] (signal_dspin_cmd_g2l_d); 454 router_cmd->p_out[4][1] (signal_dspin_m2p_g2l_c); 455 router_cmd->p_out[4][2] (signal_dspin_clack_g2l_c); 456 router_cmd->p_in[4][0] (signal_dspin_cmd_l2g_d); 457 router_cmd->p_in[4][1] (signal_dspin_m2p_l2g_c); 458 router_cmd->p_in[4][2] (signal_dspin_clack_l2g_c); 459 460 router_rsp->p_out[4][0] (signal_dspin_rsp_g2l_d); 461 router_rsp->p_out[4][1] (signal_dspin_p2m_g2l_c); 462 router_rsp->p_in[4][0] (signal_dspin_rsp_l2g_d); 463 router_rsp->p_in[4][1] (signal_dspin_p2m_l2g_c); 464 465 466 std::cout << " - CMD & RSP routers connected" << std::endl; 358 //////////////////////// ROUTERS 359 router_cmd->p_clk (this->p_clk); 360 router_cmd->p_resetn (this->p_resetn); 361 router_rsp->p_clk (this->p_clk); 362 router_rsp->p_resetn (this->p_resetn); 363 router_m2p->p_clk (this->p_clk); 364 router_m2p->p_resetn (this->p_resetn); 365 router_p2m->p_clk (this->p_clk); 366 router_p2m->p_resetn (this->p_resetn); 367 router_cla->p_clk (this->p_clk); 368 router_cla->p_resetn (this->p_resetn); 369 370 // loop on N/S/E/W ports 371 for (size_t i = 0; i < 4; i++) 372 { 373 router_cmd->p_out[i] (this->p_cmd_out[i]); 374 router_cmd->p_in[i] (this->p_cmd_in[i]); 375 376 router_rsp->p_out[i] (this->p_rsp_out[i]); 377 router_rsp->p_in[i] (this->p_rsp_in[i]); 378 379 router_m2p->p_out[i] (this->p_m2p_out[i]); 380 router_m2p->p_in[i] (this->p_m2p_in[i]); 381 382 router_p2m->p_out[i] (this->p_p2m_out[i]); 383 router_p2m->p_in[i] (this->p_p2m_in[i]); 384 385 router_cla->p_out[i] (this->p_cla_out[i]); 386 router_cla->p_in[i] (this->p_cla_in[i]); 387 } 388 389 router_cmd->p_out[4] (signal_dspin_cmd_g2l_d); 390 router_cmd->p_in[4] (signal_dspin_cmd_l2g_d); 391 392 router_rsp->p_out[4] (signal_dspin_rsp_g2l_d); 393 router_rsp->p_in[4] (signal_dspin_rsp_l2g_d); 394 395 router_m2p->p_out[4] (signal_dspin_m2p_g2l_c); 396 router_m2p->p_in[4] (signal_dspin_m2p_l2g_c); 397 398 router_p2m->p_out[4] (signal_dspin_p2m_g2l_c); 399 router_p2m->p_in[4] (signal_dspin_p2m_l2g_c); 400 401 router_cla->p_out[4] (signal_dspin_clack_g2l_c); 402 router_cla->p_in[4] (signal_dspin_clack_l2g_c); 403 404 std::cout << " - routers connected" << std::endl; 467 405 468 406 ///////////////////// CMD DSPIN local crossbar direct 469 xbar_cmd_d->p_clk (this->p_clk); 470 xbar_cmd_d->p_resetn (this->p_resetn); 471 xbar_cmd_d->p_global_out (signal_dspin_cmd_l2g_d); 472 xbar_cmd_d->p_global_in (signal_dspin_cmd_g2l_d); 473 474 xbar_cmd_d->p_local_out[tgtid_memc] (signal_dspin_cmd_memc_t); 475 xbar_cmd_d->p_local_out[tgtid_xicu] (signal_dspin_cmd_xicu_t); 476 xbar_cmd_d->p_local_out[tgtid_mdma] (signal_dspin_cmd_mdma_t); 477 478 xbar_cmd_d->p_local_in[nb_procs] (signal_dspin_cmd_mdma_i); 407 xbar_cmd->p_clk (this->p_clk); 408 xbar_cmd->p_resetn (this->p_resetn); 409 xbar_cmd->p_global_out (signal_dspin_cmd_l2g_d); 410 xbar_cmd->p_global_in (signal_dspin_cmd_g2l_d); 411 412 xbar_cmd->p_local_out[tgtid_memc] (signal_dspin_cmd_memc_t); 413 xbar_cmd->p_local_out[tgtid_xicu] (signal_dspin_cmd_xicu_t); 479 414 480 415 for (size_t p = 0; p < nb_procs; p++) 481 xbar_cmd_d->p_local_in[p] (signal_dspin_cmd_proc_i[p]); 482 483 if (io) 484 { 485 xbar_cmd_d->p_local_out[tgtid_mtty] (signal_dspin_cmd_mtty_t); 486 xbar_cmd_d->p_local_out[tgtid_bdev] (signal_dspin_cmd_bdev_t); 487 xbar_cmd_d->p_local_out[tgtid_fbuf] (signal_dspin_cmd_fbuf_t); 488 xbar_cmd_d->p_local_out[tgtid_mnic] (signal_dspin_cmd_mnic_t); 489 xbar_cmd_d->p_local_out[tgtid_chbuf] (signal_dspin_cmd_chbuf_t); 490 xbar_cmd_d->p_local_out[tgtid_simh] (signal_dspin_cmd_simh_t); 491 492 xbar_cmd_d->p_local_in[nb_procs + 1] (signal_dspin_cmd_bdev_i); 493 xbar_cmd_d->p_local_in[nb_procs + 2] (signal_dspin_cmd_chbuf_i); 494 } 495 496 std::cout << " - Command Direct crossbar connected" << std::endl; 416 xbar_cmd->p_local_in[p] (signal_dspin_cmd_proc_i[p]); 417 418 if ((x_id == 0) and (y_id == 0)) // cluster(0,0) 419 { 420 xbar_cmd->p_local_out[tgtid_mtty] (signal_dspin_cmd_mtty_t); 421 xbar_cmd->p_local_out[tgtid_bdev] (signal_dspin_cmd_bdev_t); 422 423 xbar_cmd->p_local_in[nb_procs] (signal_dspin_cmd_bdev_i); 424 } 425 426 std::cout << " - CMD Direct crossbar connected" << std::endl; 497 427 498 428 //////////////////////// RSP DSPIN local crossbar direct 499 xbar_rsp_d->p_clk (this->p_clk); 500 xbar_rsp_d->p_resetn (this->p_resetn); 501 xbar_rsp_d->p_global_out (signal_dspin_rsp_l2g_d); 502 xbar_rsp_d->p_global_in (signal_dspin_rsp_g2l_d); 503 504 xbar_rsp_d->p_local_in[tgtid_memc] (signal_dspin_rsp_memc_t); 505 xbar_rsp_d->p_local_in[tgtid_xicu] (signal_dspin_rsp_xicu_t); 506 xbar_rsp_d->p_local_in[tgtid_mdma] (signal_dspin_rsp_mdma_t); 507 508 xbar_rsp_d->p_local_out[nb_procs] (signal_dspin_rsp_mdma_i); 429 xbar_rsp->p_clk (this->p_clk); 430 xbar_rsp->p_resetn (this->p_resetn); 431 xbar_rsp->p_global_out (signal_dspin_rsp_l2g_d); 432 xbar_rsp->p_global_in (signal_dspin_rsp_g2l_d); 433 434 xbar_rsp->p_local_in[tgtid_memc] (signal_dspin_rsp_memc_t); 435 xbar_rsp->p_local_in[tgtid_xicu] (signal_dspin_rsp_xicu_t); 509 436 510 437 for (size_t p = 0; p < nb_procs; p++) 511 xbar_rsp_d->p_local_out[p] (signal_dspin_rsp_proc_i[p]); 512 513 if (io) 514 { 515 xbar_rsp_d->p_local_in[tgtid_mtty] (signal_dspin_rsp_mtty_t); 516 xbar_rsp_d->p_local_in[tgtid_bdev] (signal_dspin_rsp_bdev_t); 517 xbar_rsp_d->p_local_in[tgtid_fbuf] (signal_dspin_rsp_fbuf_t); 518 xbar_rsp_d->p_local_in[tgtid_mnic] (signal_dspin_rsp_mnic_t); 519 xbar_rsp_d->p_local_in[tgtid_chbuf] (signal_dspin_rsp_chbuf_t); 520 xbar_rsp_d->p_local_in[tgtid_simh] (signal_dspin_rsp_simh_t); 521 522 xbar_rsp_d->p_local_out[nb_procs + 1] (signal_dspin_rsp_bdev_i); 523 xbar_rsp_d->p_local_out[nb_procs + 2] (signal_dspin_rsp_chbuf_i); 524 } 525 526 std::cout << " - Response Direct crossbar connected" << std::endl; 438 xbar_rsp->p_local_out[p] (signal_dspin_rsp_proc_i[p]); 439 440 if ((x_id == 0) and (y_id == 0)) // cluster(0,0) 441 { 442 xbar_rsp->p_local_in[tgtid_mtty] (signal_dspin_rsp_mtty_t); 443 xbar_rsp->p_local_in[tgtid_bdev] (signal_dspin_rsp_bdev_t); 444 445 xbar_rsp->p_local_out[nb_procs] (signal_dspin_rsp_bdev_i); 446 } 447 448 std::cout << " - RSP Direct crossbar connected" << std::endl; 527 449 528 450 ////////////////////// M2P DSPIN local crossbar coherence 529 xbar_m2p _c->p_clk (this->p_clk);530 xbar_m2p _c->p_resetn (this->p_resetn);531 xbar_m2p _c->p_global_out (signal_dspin_m2p_l2g_c);532 xbar_m2p _c->p_global_in (signal_dspin_m2p_g2l_c);533 xbar_m2p _c->p_local_in[0] (signal_dspin_m2p_memc);451 xbar_m2p->p_clk (this->p_clk); 452 xbar_m2p->p_resetn (this->p_resetn); 453 xbar_m2p->p_global_out (signal_dspin_m2p_l2g_c); 454 xbar_m2p->p_global_in (signal_dspin_m2p_g2l_c); 455 xbar_m2p->p_local_in[0] (signal_dspin_m2p_memc); 534 456 for (size_t p = 0; p < nb_procs; p++) 535 xbar_m2p _c->p_local_out[p] (signal_dspin_m2p_proc[p]);457 xbar_m2p->p_local_out[p] (signal_dspin_m2p_proc[p]); 536 458 537 459 std::cout << " - M2P Coherence crossbar connected" << std::endl; 538 460 461 ////////////////////////// P2M DSPIN local crossbar coherence 462 xbar_p2m->p_clk (this->p_clk); 463 xbar_p2m->p_resetn (this->p_resetn); 464 xbar_p2m->p_global_out (signal_dspin_p2m_l2g_c); 465 xbar_p2m->p_global_in (signal_dspin_p2m_g2l_c); 466 xbar_p2m->p_local_out[0] (signal_dspin_p2m_memc); 467 for (size_t p = 0; p < nb_procs; p++) 468 xbar_p2m->p_local_in[p] (signal_dspin_p2m_proc[p]); 469 470 std::cout << " - P2M Coherence crossbar connected" << std::endl; 471 539 472 ////////////////////// CLACK DSPIN local crossbar coherence 540 xbar_cla ck_c->p_clk (this->p_clk);541 xbar_cla ck_c->p_resetn (this->p_resetn);542 xbar_cla ck_c->p_global_out (signal_dspin_clack_l2g_c);543 xbar_cla ck_c->p_global_in (signal_dspin_clack_g2l_c);544 xbar_cla ck_c->p_local_in[0] (signal_dspin_clack_memc);473 xbar_cla->p_clk (this->p_clk); 474 xbar_cla->p_resetn (this->p_resetn); 475 xbar_cla->p_global_out (signal_dspin_clack_l2g_c); 476 xbar_cla->p_global_in (signal_dspin_clack_g2l_c); 477 xbar_cla->p_local_in[0] (signal_dspin_clack_memc); 545 478 for (size_t p = 0; p < nb_procs; p++) 546 xbar_clack_c->p_local_out[p] (signal_dspin_clack_proc[p]); 547 548 std::cout << " - Clack Coherence crossbar connected" << std::endl; 549 550 ////////////////////////// P2M DSPIN local crossbar coherence 551 xbar_p2m_c->p_clk (this->p_clk); 552 xbar_p2m_c->p_resetn (this->p_resetn); 553 xbar_p2m_c->p_global_out (signal_dspin_p2m_l2g_c); 554 xbar_p2m_c->p_global_in (signal_dspin_p2m_g2l_c); 555 xbar_p2m_c->p_local_out[0] (signal_dspin_p2m_memc); 556 for (size_t p = 0; p < nb_procs; p++) 557 xbar_p2m_c->p_local_in[p] (signal_dspin_p2m_proc[p]); 558 559 std::cout << " - P2M Coherence crossbar connected" << std::endl; 560 479 xbar_cla->p_local_out[p] (signal_dspin_clack_proc[p]); 480 481 std::cout << " - CLA Coherence crossbar connected" << std::endl; 561 482 562 483 //////////////////////////////////// Processors … … 569 490 proc[p]->p_dspin_p2m (signal_dspin_p2m_proc[p]); 570 491 proc[p]->p_dspin_clack (signal_dspin_clack_proc[p]); 571 proc[p]->p_irq[0] (signal_proc_it[p]); 572 for ( size_t j = 1; j < 6 ; j++)492 493 for ( size_t j = 0 ; j < 6 ; j++) 573 494 { 574 proc[p]->p_irq[j] (signal_false); 495 if ( j < 4 ) proc[p]->p_irq[j] (signal_proc_irq[4*p + j]); 496 else proc[p]->p_irq[j] (signal_false); 575 497 } 576 498 … … 588 510 xicu->p_resetn (this->p_resetn); 589 511 xicu->p_vci (signal_vci_tgt_xicu); 590 for (size_t p = 0; p < nb_procs; p++) 591 { 592 xicu->p_irq[p] (signal_proc_it[p]); 593 } 594 595 for (size_t i = 0; i < 32; i++) 596 { 597 if (io) // I/O cluster 512 513 for (size_t i = 0 ; i < 16 ; i++) 514 { 515 xicu->p_irq[i] (signal_proc_irq[i]); 516 } 517 518 for (size_t i = 0; i < 16; i++) 519 { 520 if ((x_id == 0) and (y_id == 0)) // cluster (0,0) 598 521 { 599 if (i == 0) xicu->p_hwi[i] (signal_irq_bdev); 600 else if (i < 8) xicu->p_hwi[i] (signal_false); 601 else if (i < (8 + nb_dmas)) xicu->p_hwi[i] (signal_irq_mdma[i - 8]); 602 else if (i < 12) xicu->p_hwi[i] (signal_false); 603 else if (i == 12) xicu->p_hwi[i] (signal_irq_memc); 604 else if (i < 16) xicu->p_hwi[i] (signal_false); 605 else if (i < (16 + nb_ttys)) xicu->p_hwi[i] (signal_irq_mtty[i - 16]); 606 else xicu->p_hwi[i] (signal_false); 522 if (i == 8) xicu->p_hwi[i] (signal_irq_memc); 523 else if (i == 9) xicu->p_hwi[i] (signal_irq_bdev); 524 else if (i == 10) xicu->p_hwi[i] (signal_irq_mtty); 525 else xicu->p_hwi[i] (signal_false); 607 526 } 608 else // other clusters527 else // other clusters 609 528 { 610 if (i < 8) xicu->p_hwi[i] (signal_false); 611 else if (i < (8 + nb_dmas)) xicu->p_hwi[i] (signal_irq_mdma[i - 8]); 612 else if (i < 12) xicu->p_hwi[i] (signal_false); 613 else if (i == 12) xicu->p_hwi[i] (signal_irq_memc); 614 else xicu->p_hwi[i] (signal_false); 529 if (i == 1) xicu->p_hwi[i] (signal_irq_memc); 530 else xicu->p_hwi[i] (signal_false); 615 531 } 616 532 } … … 651 567 std::cout << " - XRAM connected" << std::endl; 652 568 653 ////////////////////////////////////////////// MDMA 654 mdma->p_clk (this->p_clk); 655 mdma->p_resetn (this->p_resetn); 656 mdma->p_vci_target (signal_vci_tgt_mdma); 657 mdma->p_vci_initiator (signal_vci_ini_mdma); 658 for (size_t i = 0; i < nb_dmas; i++) 659 mdma->p_irq[i] (signal_irq_mdma[i]); 660 661 // wrapper tgt MDMA 662 wt_mdma->p_clk (this->p_clk); 663 wt_mdma->p_resetn (this->p_resetn); 664 wt_mdma->p_dspin_cmd (signal_dspin_cmd_mdma_t); 665 wt_mdma->p_dspin_rsp (signal_dspin_rsp_mdma_t); 666 wt_mdma->p_vci (signal_vci_tgt_mdma); 667 668 // wrapper ini MDMA 669 wi_mdma->p_clk (this->p_clk); 670 wi_mdma->p_resetn (this->p_resetn); 671 wi_mdma->p_dspin_cmd (signal_dspin_cmd_mdma_i); 672 wi_mdma->p_dspin_rsp (signal_dspin_rsp_mdma_i); 673 wi_mdma->p_vci (signal_vci_ini_mdma); 674 675 std::cout << " - MDMA connected" << std::endl; 676 677 /////////////////////////////// Components in I/O cluster 678 679 if (io) 569 /////////////////////////////// Extra Components in cluster(0,0) 570 571 if ((x_id == 0) and (y_id == 0)) 680 572 { 681 573 // BDEV … … 702 594 std::cout << " - BDEV connected" << std::endl; 703 595 704 // FBUF 705 fbuf->p_clk (this->p_clk); 706 fbuf->p_resetn (this->p_resetn); 707 fbuf->p_vci (signal_vci_tgt_fbuf); 708 709 // wrapper tgt FBUF 710 wt_fbuf->p_clk (this->p_clk); 711 wt_fbuf->p_resetn (this->p_resetn); 712 wt_fbuf->p_dspin_cmd (signal_dspin_cmd_fbuf_t); 713 wt_fbuf->p_dspin_rsp (signal_dspin_rsp_fbuf_t); 714 wt_fbuf->p_vci (signal_vci_tgt_fbuf); 715 716 std::cout << " - FBUF connected" << std::endl; 717 718 // MNIC 719 mnic->p_clk (this->p_clk); 720 mnic->p_resetn (this->p_resetn); 721 mnic->p_vci (signal_vci_tgt_mnic); 722 for (size_t i = 0; i < nic_channels; i++) 723 { 724 mnic->p_rx_irq[i] (signal_irq_mnic_rx[i]); 725 mnic->p_tx_irq[i] (signal_irq_mnic_tx[i]); 726 } 727 728 // wrapper tgt MNIC 729 wt_mnic->p_clk (this->p_clk); 730 wt_mnic->p_resetn (this->p_resetn); 731 wt_mnic->p_dspin_cmd (signal_dspin_cmd_mnic_t); 732 wt_mnic->p_dspin_rsp (signal_dspin_rsp_mnic_t); 733 wt_mnic->p_vci (signal_vci_tgt_mnic); 734 735 std::cout << " - MNIC connected" << std::endl; 736 737 // CHBUF 738 chbuf->p_clk (this->p_clk); 739 chbuf->p_resetn (this->p_resetn); 740 chbuf->p_vci_target (signal_vci_tgt_chbuf); 741 chbuf->p_vci_initiator (signal_vci_ini_chbuf); 742 for (size_t i = 0; i < chbufdma_channels; i++) 743 { 744 chbuf->p_irq[i] (signal_irq_chbuf[i]); 745 } 746 747 // wrapper tgt CHBUF 748 wt_chbuf->p_clk (this->p_clk); 749 wt_chbuf->p_resetn (this->p_resetn); 750 wt_chbuf->p_dspin_cmd (signal_dspin_cmd_chbuf_t); 751 wt_chbuf->p_dspin_rsp (signal_dspin_rsp_chbuf_t); 752 wt_chbuf->p_vci (signal_vci_tgt_chbuf); 753 754 // wrapper ini CHBUF 755 wi_chbuf->p_clk (this->p_clk); 756 wi_chbuf->p_resetn (this->p_resetn); 757 wi_chbuf->p_dspin_cmd (signal_dspin_cmd_chbuf_i); 758 wi_chbuf->p_dspin_rsp (signal_dspin_rsp_chbuf_i); 759 wi_chbuf->p_vci (signal_vci_ini_chbuf); 760 761 std::cout << " - CHBUF connected" << std::endl; 762 763 // MTTY 596 // MTTY (single channel) 764 597 mtty->p_clk (this->p_clk); 765 598 mtty->p_resetn (this->p_resetn); 766 599 mtty->p_vci (signal_vci_tgt_mtty); 767 for (size_t i = 0; i < nb_ttys; i++) 768 { 769 mtty->p_irq[i] (signal_irq_mtty[i]); 770 } 600 mtty->p_irq[0] (signal_irq_mtty); 771 601 772 602 // wrapper tgt MTTY … … 777 607 wt_mtty->p_vci (signal_vci_tgt_mtty); 778 608 779 780 // Sim Helper781 simhelper->p_clk (this->p_clk);782 simhelper->p_resetn (this->p_resetn);783 simhelper->p_vci (signal_vci_tgt_simh);784 785 // wrapper tgt Sim Helper786 wt_simhelper->p_clk (this->p_clk);787 wt_simhelper->p_resetn (this->p_resetn);788 wt_simhelper->p_dspin_cmd (signal_dspin_cmd_simh_t);789 wt_simhelper->p_dspin_rsp (signal_dspin_rsp_simh_t);790 wt_simhelper->p_vci (signal_vci_tgt_simh);791 792 609 std::cout << " - MTTY connected" << std::endl; 793 }610 } 794 611 } // end constructor 795 612 … … 804 621 vci_param_ext>::~TsarLetiCluster() { 805 622 806 dealloc_elems<DspinInput<dspin_cmd_width> > (p_cmd_in, 4, 3); 807 dealloc_elems<DspinOutput<dspin_cmd_width> >(p_cmd_out, 4, 3); 808 dealloc_elems<DspinInput<dspin_rsp_width> > (p_rsp_in, 4, 2); 809 dealloc_elems<DspinOutput<dspin_rsp_width> >(p_rsp_out, 4, 2); 810 811 for (size_t p = 0; p < n_procs; p++) 812 { 813 delete proc[p]; 814 delete wi_proc[p]; 623 dealloc_elems<DspinInput<dspin_cmd_width> > (p_cmd_in, 4); 624 dealloc_elems<DspinOutput<dspin_cmd_width> >(p_cmd_out, 4); 625 626 dealloc_elems<DspinInput<dspin_rsp_width> > (p_rsp_in, 4); 627 dealloc_elems<DspinOutput<dspin_rsp_width> >(p_rsp_out, 4); 628 629 dealloc_elems<DspinInput<dspin_cmd_width> > (p_m2p_in, 4); 630 dealloc_elems<DspinOutput<dspin_cmd_width> >(p_m2p_out, 4); 631 632 dealloc_elems<DspinInput<dspin_rsp_width> > (p_p2m_in, 4); 633 dealloc_elems<DspinOutput<dspin_rsp_width> >(p_p2m_out, 4); 634 635 dealloc_elems<DspinInput<dspin_cmd_width> > (p_cla_in, 4); 636 dealloc_elems<DspinOutput<dspin_cmd_width> >(p_cla_out, 4); 637 638 for (size_t p = 0; p < 4 ; p++) 639 { 640 if ( proc[p] ) delete proc[p]; 641 if ( wi_proc[p] ) delete wi_proc[p]; 815 642 } 816 643 … … 820 647 delete xicu; 821 648 delete wt_xicu; 822 delete mdma; 823 delete wt_mdma; 824 delete wi_mdma; 825 delete xbar_cmd_d; 826 delete xbar_rsp_d; 827 delete xbar_m2p_c; 828 delete xbar_p2m_c; 829 delete xbar_clack_c; 649 delete xbar_cmd; 650 delete xbar_rsp; 651 delete xbar_m2p; 652 delete xbar_p2m; 653 delete xbar_cla; 830 654 delete router_cmd; 831 655 delete router_rsp; 832 if (bdev != NULL) 833 { 834 delete fbuf; 835 delete wt_fbuf; 656 delete router_m2p; 657 delete router_p2m; 658 delete router_cla; 659 660 if ( bdev ) 661 { 836 662 delete bdev; 837 663 delete wt_bdev; 838 664 delete wi_bdev; 839 delete mnic; 840 delete wt_mnic; 841 delete chbuf; 842 delete wt_chbuf; 843 delete wi_chbuf; 665 } 666 667 if ( mtty ) 668 { 844 669 delete mtty; 845 670 delete wt_mtty; 846 delete simhelper;847 delete wt_simhelper;848 671 } 849 672 }
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